Energy Micro IEC60355 Library Project 1.037 GCC-Version
IEC60355 Library documentation and API

iec60335_class_b_wdt_test.c

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00001 /***************************************************************************/
00033 #include "iec60335_class_b_wdt_test.h"
00034 
00035 
00036 #ifdef TESSY
00037 
00038 uint32_t TS_TessyDummyWDOGCTRL(void);
00039 uint32_t TS_TessyDummyWDOGCMD(void);
00040 #define SyncWDOGCTRL()   (TS_TessyDummyWDOGCTRL())
00041 #define SyncWDOGCMD()    (TS_TessyDummyWDOGCMD())
00042 
00043 #else
00044 #define SyncWDOGCTRL()   (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
00045 #define SyncWDOGCMD()    (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CMD)
00046 #endif
00047 
00048 
00050 #if defined (__ICCARM__)
00051     #pragma section="IEC60335_code"
00052 #else
00053 __attribute__((section(".IEC60335_code")))
00054 #endif
00055 
00056 testResult_t IEC60335_ClassB_initWDT(void)
00057 {
00058   testResult_t result = IEC60335_testFailed;
00059   uint32_t     resetcause;
00060   /* check for core locked condition */
00061   resetcause = RMU->RSTCAUSE;
00062   if (!(RMU->CTRL & (1 << _RMU_CTRL_LOCKUPRDIS_SHIFT)))
00063   {
00064     /* check POR or Ext-reset reset as last reset event */
00065     if ((resetcause == RMU_RSTCAUSE_PORST)
00066         || ((resetcause & RMU_RSTCAUSE_EXTRST) && ((~resetcause) & 0x3)))
00067     {
00068       /* enable LE clock */
00069       CMU->HFCORECLKEN0 |= CMU_HFCORECLKEN0_LE;
00070       /* clear flag */
00071       RMU->CMD     = RMU_CMD_RCCLR;
00072       EMU->AUXCTRL = EMU_AUXCTRL_HRCCLR;
00073       EMU->AUXCTRL = 0;
00074       /* init WDOG and start */
00075       while (SyncWDOGCTRL()) ;
00076       WDOG->CTRL = 0x80D;
00077       /* optional WDOG_CTRL_DEBUGRUN */
00078       result = IEC60335_testInProgress;
00079     }
00080     /* WDOG reset detected (second entry) */
00081     else if ((resetcause & RMU_RSTCAUSE_WDOGRST) && (~resetcause & 0x03))
00082     {
00083       /* test has been successful */
00084       result = IEC60335_testPassed;
00085       /* optional clear flag */
00086 /*    RMU->CMD = RMU_CMD_RCCLR; */
00087     }
00088   }
00089 
00090   return result;
00091 }
00092 
00094 #if defined (__ICCARM__)
00095     #pragma section="IEC60335_code"
00096 #else
00097 __attribute__((section(".IEC60335_code")))
00098 #endif
00099 
00100 void IEC60335_ClassB_Refresh_WDT(void)
00101 {
00102   /* If a previous clearing is being synchronized to LF domain, then there
00103    * is no point in waiting for it to complete before clearing over again.
00104    * This avoids stalling the core in the typical use case where some idle loop
00105    * keeps clearing the watchdog. */
00106   if (SyncWDOGCMD())
00107   {
00108     return;
00109   }
00110 
00111   WDOG->CMD = WDOG_CMD_CLEAR;
00112 }
00113 
00115 #if defined (__ICCARM__)
00116     #pragma section="IEC60335_code"
00117 #else
00118 __attribute__((section(".IEC60335_code")))
00119 #endif
00120 
00121 testResult_t IEC60335_ClassB_Force_WDT_Reset(void)
00122 {
00123   testResult_t result = IEC60335_testFailed;
00124   /* no debugger allowed here */
00125   result = IEC60335_ClassB_initWDT();
00126 
00127   return result;
00128 }
00129 
00134 /************************************** EOF *********************************/