Collaboration diagram for EFM32G890F128_CMU:

Data Structures
struct	CMU_TypeDef
Defines
#define	_CMU_CTRL_RESETVALUE 0x000C262CUL
#define	_CMU_CTRL_MASK 0x00FE3EEFUL
#define	_CMU_CTRL_HFXOMODE_SHIFT 0
#define	_CMU_CTRL_HFXOMODE_MASK 0x3UL
#define	_CMU_CTRL_HFXOMODE_DEFAULT 0x00000000UL
#define	_CMU_CTRL_HFXOMODE_XTAL 0x00000000UL
#define	_CMU_CTRL_HFXOMODE_BUFEXTCLK 0x00000001UL
#define	_CMU_CTRL_HFXOMODE_DIGEXTCLK 0x00000002UL
#define	CMU_CTRL_HFXOMODE_DEFAULT (_CMU_CTRL_HFXOMODE_DEFAULT << 0)
#define	CMU_CTRL_HFXOMODE_XTAL (_CMU_CTRL_HFXOMODE_XTAL << 0)
#define	CMU_CTRL_HFXOMODE_BUFEXTCLK (_CMU_CTRL_HFXOMODE_BUFEXTCLK << 0)
#define	CMU_CTRL_HFXOMODE_DIGEXTCLK (_CMU_CTRL_HFXOMODE_DIGEXTCLK << 0)
#define	_CMU_CTRL_HFXOBOOST_SHIFT 2
#define	_CMU_CTRL_HFXOBOOST_MASK 0xCUL
#define	_CMU_CTRL_HFXOBOOST_50PCENT 0x00000000UL
#define	_CMU_CTRL_HFXOBOOST_70PCENT 0x00000001UL
#define	_CMU_CTRL_HFXOBOOST_80PCENT 0x00000002UL
#define	_CMU_CTRL_HFXOBOOST_DEFAULT 0x00000003UL
#define	_CMU_CTRL_HFXOBOOST_100PCENT 0x00000003UL
#define	CMU_CTRL_HFXOBOOST_50PCENT (_CMU_CTRL_HFXOBOOST_50PCENT << 2)
#define	CMU_CTRL_HFXOBOOST_70PCENT (_CMU_CTRL_HFXOBOOST_70PCENT << 2)
#define	CMU_CTRL_HFXOBOOST_80PCENT (_CMU_CTRL_HFXOBOOST_80PCENT << 2)
#define	CMU_CTRL_HFXOBOOST_DEFAULT (_CMU_CTRL_HFXOBOOST_DEFAULT << 2)
#define	CMU_CTRL_HFXOBOOST_100PCENT (_CMU_CTRL_HFXOBOOST_100PCENT << 2)
#define	_CMU_CTRL_HFXOBUFCUR_SHIFT 5
#define	_CMU_CTRL_HFXOBUFCUR_MASK 0x60UL
#define	_CMU_CTRL_HFXOBUFCUR_DEFAULT 0x00000001UL
#define	CMU_CTRL_HFXOBUFCUR_DEFAULT (_CMU_CTRL_HFXOBUFCUR_DEFAULT << 5)
#define	CMU_CTRL_HFXOGLITCHDETEN (0x1UL << 7)
#define	_CMU_CTRL_HFXOGLITCHDETEN_SHIFT 7
#define	_CMU_CTRL_HFXOGLITCHDETEN_MASK 0x80UL
#define	_CMU_CTRL_HFXOGLITCHDETEN_DEFAULT 0x00000000UL
#define	CMU_CTRL_HFXOGLITCHDETEN_DEFAULT (_CMU_CTRL_HFXOGLITCHDETEN_DEFAULT << 7)
#define	_CMU_CTRL_HFXOTIMEOUT_SHIFT 9
#define	_CMU_CTRL_HFXOTIMEOUT_MASK 0x600UL
#define	_CMU_CTRL_HFXOTIMEOUT_8CYCLES 0x00000000UL
#define	_CMU_CTRL_HFXOTIMEOUT_256CYCLES 0x00000001UL
#define	_CMU_CTRL_HFXOTIMEOUT_1KCYCLES 0x00000002UL
#define	_CMU_CTRL_HFXOTIMEOUT_DEFAULT 0x00000003UL
#define	_CMU_CTRL_HFXOTIMEOUT_16KCYCLES 0x00000003UL
#define	CMU_CTRL_HFXOTIMEOUT_8CYCLES (_CMU_CTRL_HFXOTIMEOUT_8CYCLES << 9)
#define	CMU_CTRL_HFXOTIMEOUT_256CYCLES (_CMU_CTRL_HFXOTIMEOUT_256CYCLES << 9)
#define	CMU_CTRL_HFXOTIMEOUT_1KCYCLES (_CMU_CTRL_HFXOTIMEOUT_1KCYCLES << 9)
#define	CMU_CTRL_HFXOTIMEOUT_DEFAULT (_CMU_CTRL_HFXOTIMEOUT_DEFAULT << 9)
#define	CMU_CTRL_HFXOTIMEOUT_16KCYCLES (_CMU_CTRL_HFXOTIMEOUT_16KCYCLES << 9)
#define	_CMU_CTRL_LFXOMODE_SHIFT 11
#define	_CMU_CTRL_LFXOMODE_MASK 0x1800UL
#define	_CMU_CTRL_LFXOMODE_DEFAULT 0x00000000UL
#define	_CMU_CTRL_LFXOMODE_XTAL 0x00000000UL
#define	_CMU_CTRL_LFXOMODE_BUFEXTCLK 0x00000001UL
#define	_CMU_CTRL_LFXOMODE_DIGEXTCLK 0x00000002UL
#define	CMU_CTRL_LFXOMODE_DEFAULT (_CMU_CTRL_LFXOMODE_DEFAULT << 11)
#define	CMU_CTRL_LFXOMODE_XTAL (_CMU_CTRL_LFXOMODE_XTAL << 11)
#define	CMU_CTRL_LFXOMODE_BUFEXTCLK (_CMU_CTRL_LFXOMODE_BUFEXTCLK << 11)
#define	CMU_CTRL_LFXOMODE_DIGEXTCLK (_CMU_CTRL_LFXOMODE_DIGEXTCLK << 11)
#define	CMU_CTRL_LFXOBOOST (0x1UL << 13)
#define	_CMU_CTRL_LFXOBOOST_SHIFT 13
#define	_CMU_CTRL_LFXOBOOST_MASK 0x2000UL
#define	_CMU_CTRL_LFXOBOOST_70PCENT 0x00000000UL
#define	_CMU_CTRL_LFXOBOOST_DEFAULT 0x00000001UL
#define	_CMU_CTRL_LFXOBOOST_100PCENT 0x00000001UL
#define	CMU_CTRL_LFXOBOOST_70PCENT (_CMU_CTRL_LFXOBOOST_70PCENT << 13)
#define	CMU_CTRL_LFXOBOOST_DEFAULT (_CMU_CTRL_LFXOBOOST_DEFAULT << 13)
#define	CMU_CTRL_LFXOBOOST_100PCENT (_CMU_CTRL_LFXOBOOST_100PCENT << 13)
#define	CMU_CTRL_LFXOBUFCUR (0x1UL << 17)
#define	_CMU_CTRL_LFXOBUFCUR_SHIFT 17
#define	_CMU_CTRL_LFXOBUFCUR_MASK 0x20000UL
#define	_CMU_CTRL_LFXOBUFCUR_DEFAULT 0x00000000UL
#define	CMU_CTRL_LFXOBUFCUR_DEFAULT (_CMU_CTRL_LFXOBUFCUR_DEFAULT << 17)
#define	_CMU_CTRL_LFXOTIMEOUT_SHIFT 18
#define	_CMU_CTRL_LFXOTIMEOUT_MASK 0xC0000UL
#define	_CMU_CTRL_LFXOTIMEOUT_8CYCLES 0x00000000UL
#define	_CMU_CTRL_LFXOTIMEOUT_1KCYCLES 0x00000001UL
#define	_CMU_CTRL_LFXOTIMEOUT_16KCYCLES 0x00000002UL
#define	_CMU_CTRL_LFXOTIMEOUT_DEFAULT 0x00000003UL
#define	_CMU_CTRL_LFXOTIMEOUT_32KCYCLES 0x00000003UL
#define	CMU_CTRL_LFXOTIMEOUT_8CYCLES (_CMU_CTRL_LFXOTIMEOUT_8CYCLES << 18)
#define	CMU_CTRL_LFXOTIMEOUT_1KCYCLES (_CMU_CTRL_LFXOTIMEOUT_1KCYCLES << 18)
#define	CMU_CTRL_LFXOTIMEOUT_16KCYCLES (_CMU_CTRL_LFXOTIMEOUT_16KCYCLES << 18)
#define	CMU_CTRL_LFXOTIMEOUT_DEFAULT (_CMU_CTRL_LFXOTIMEOUT_DEFAULT << 18)
#define	CMU_CTRL_LFXOTIMEOUT_32KCYCLES (_CMU_CTRL_LFXOTIMEOUT_32KCYCLES << 18)
#define	_CMU_CTRL_CLKOUTSEL0_SHIFT 20
#define	_CMU_CTRL_CLKOUTSEL0_MASK 0x700000UL
#define	_CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL
#define	_CMU_CTRL_CLKOUTSEL0_HFRCO 0x00000000UL
#define	_CMU_CTRL_CLKOUTSEL0_HFXO 0x00000001UL
#define	_CMU_CTRL_CLKOUTSEL0_HFCLK2 0x00000002UL
#define	_CMU_CTRL_CLKOUTSEL0_HFCLK4 0x00000003UL
#define	_CMU_CTRL_CLKOUTSEL0_HFCLK8 0x00000004UL
#define	_CMU_CTRL_CLKOUTSEL0_HFCLK16 0x00000005UL
#define	_CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000006UL
#define	CMU_CTRL_CLKOUTSEL0_DEFAULT (_CMU_CTRL_CLKOUTSEL0_DEFAULT << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFRCO (_CMU_CTRL_CLKOUTSEL0_HFRCO << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFXO (_CMU_CTRL_CLKOUTSEL0_HFXO << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFCLK2 (_CMU_CTRL_CLKOUTSEL0_HFCLK2 << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFCLK4 (_CMU_CTRL_CLKOUTSEL0_HFCLK4 << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFCLK8 (_CMU_CTRL_CLKOUTSEL0_HFCLK8 << 20)
#define	CMU_CTRL_CLKOUTSEL0_HFCLK16 (_CMU_CTRL_CLKOUTSEL0_HFCLK16 << 20)
#define	CMU_CTRL_CLKOUTSEL0_ULFRCO (_CMU_CTRL_CLKOUTSEL0_ULFRCO << 20)
#define	CMU_CTRL_CLKOUTSEL1 (0x1UL << 23)
#define	_CMU_CTRL_CLKOUTSEL1_SHIFT 23
#define	_CMU_CTRL_CLKOUTSEL1_MASK 0x800000UL
#define	_CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL
#define	_CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000000UL
#define	_CMU_CTRL_CLKOUTSEL1_LFXO 0x00000001UL
#define	CMU_CTRL_CLKOUTSEL1_DEFAULT (_CMU_CTRL_CLKOUTSEL1_DEFAULT << 23)
#define	CMU_CTRL_CLKOUTSEL1_LFRCO (_CMU_CTRL_CLKOUTSEL1_LFRCO << 23)
#define	CMU_CTRL_CLKOUTSEL1_LFXO (_CMU_CTRL_CLKOUTSEL1_LFXO << 23)
#define	_CMU_HFCORECLKDIV_RESETVALUE 0x00000000UL
#define	_CMU_HFCORECLKDIV_MASK 0x0000000FUL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT 0
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_MASK 0xFUL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK 0x00000000UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 0x00000001UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 0x00000002UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 0x00000003UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 0x00000004UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 0x00000005UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 0x00000006UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 0x00000007UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 0x00000008UL
#define	_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 0x00000009UL
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 << 0)
#define	CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 << 0)
#define	_CMU_HFPERCLKDIV_RESETVALUE 0x00000100UL
#define	_CMU_HFPERCLKDIV_MASK 0x0000010FUL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT 0
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_MASK 0xFUL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT 0x00000000UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK 0x00000000UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 0x00000001UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 0x00000002UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 0x00000003UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 0x00000004UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 0x00000005UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 0x00000006UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 0x00000007UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 0x00000008UL
#define	_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 0x00000009UL
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT (_CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 << 0)
#define	CMU_HFPERCLKDIV_HFPERCLKEN (0x1UL << 8)
#define	_CMU_HFPERCLKDIV_HFPERCLKEN_SHIFT 8
#define	_CMU_HFPERCLKDIV_HFPERCLKEN_MASK 0x100UL
#define	_CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT 0x00000001UL
#define	CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT (_CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT << 8)
#define	_CMU_HFRCOCTRL_RESETVALUE 0x00000380UL
#define	_CMU_HFRCOCTRL_MASK 0x0001F7FFUL
#define	_CMU_HFRCOCTRL_TUNING_SHIFT 0
#define	_CMU_HFRCOCTRL_TUNING_MASK 0xFFUL
#define	_CMU_HFRCOCTRL_TUNING_DEFAULT 0x00000080UL
#define	CMU_HFRCOCTRL_TUNING_DEFAULT (_CMU_HFRCOCTRL_TUNING_DEFAULT << 0)
#define	_CMU_HFRCOCTRL_BAND_SHIFT 8
#define	_CMU_HFRCOCTRL_BAND_MASK 0x700UL
#define	_CMU_HFRCOCTRL_BAND_1MHZ 0x00000000UL
#define	_CMU_HFRCOCTRL_BAND_7MHZ 0x00000001UL
#define	_CMU_HFRCOCTRL_BAND_11MHZ 0x00000002UL
#define	_CMU_HFRCOCTRL_BAND_DEFAULT 0x00000003UL
#define	_CMU_HFRCOCTRL_BAND_14MHZ 0x00000003UL
#define	_CMU_HFRCOCTRL_BAND_21MHZ 0x00000004UL
#define	_CMU_HFRCOCTRL_BAND_28MHZ 0x00000005UL
#define	CMU_HFRCOCTRL_BAND_1MHZ (_CMU_HFRCOCTRL_BAND_1MHZ << 8)
#define	CMU_HFRCOCTRL_BAND_7MHZ (_CMU_HFRCOCTRL_BAND_7MHZ << 8)
#define	CMU_HFRCOCTRL_BAND_11MHZ (_CMU_HFRCOCTRL_BAND_11MHZ << 8)
#define	CMU_HFRCOCTRL_BAND_DEFAULT (_CMU_HFRCOCTRL_BAND_DEFAULT << 8)
#define	CMU_HFRCOCTRL_BAND_14MHZ (_CMU_HFRCOCTRL_BAND_14MHZ << 8)
#define	CMU_HFRCOCTRL_BAND_21MHZ (_CMU_HFRCOCTRL_BAND_21MHZ << 8)
#define	CMU_HFRCOCTRL_BAND_28MHZ (_CMU_HFRCOCTRL_BAND_28MHZ << 8)
#define	_CMU_HFRCOCTRL_SUDELAY_SHIFT 12
#define	_CMU_HFRCOCTRL_SUDELAY_MASK 0x1F000UL
#define	_CMU_HFRCOCTRL_SUDELAY_DEFAULT 0x00000000UL
#define	CMU_HFRCOCTRL_SUDELAY_DEFAULT (_CMU_HFRCOCTRL_SUDELAY_DEFAULT << 12)
#define	_CMU_LFRCOCTRL_RESETVALUE 0x00000040UL
#define	_CMU_LFRCOCTRL_MASK 0x0000007FUL
#define	_CMU_LFRCOCTRL_TUNING_SHIFT 0
#define	_CMU_LFRCOCTRL_TUNING_MASK 0x7FUL
#define	_CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000040UL
#define	CMU_LFRCOCTRL_TUNING_DEFAULT (_CMU_LFRCOCTRL_TUNING_DEFAULT << 0)
#define	_CMU_AUXHFRCOCTRL_RESETVALUE 0x00000080UL
#define	_CMU_AUXHFRCOCTRL_MASK 0x000000FFUL
#define	_CMU_AUXHFRCOCTRL_TUNING_SHIFT 0
#define	_CMU_AUXHFRCOCTRL_TUNING_MASK 0xFFUL
#define	_CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL
#define	CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)
#define	_CMU_CALCTRL_RESETVALUE 0x00000000UL
#define	_CMU_CALCTRL_MASK 0x00000007UL
#define	_CMU_CALCTRL_REFSEL_SHIFT 0
#define	_CMU_CALCTRL_REFSEL_MASK 0x7UL
#define	_CMU_CALCTRL_REFSEL_DEFAULT 0x00000000UL
#define	_CMU_CALCTRL_REFSEL_HFXO 0x00000000UL
#define	_CMU_CALCTRL_REFSEL_LFXO 0x00000001UL
#define	_CMU_CALCTRL_REFSEL_HFRCO 0x00000002UL
#define	_CMU_CALCTRL_REFSEL_LFRCO 0x00000003UL
#define	_CMU_CALCTRL_REFSEL_AUXHFRCO 0x00000004UL
#define	CMU_CALCTRL_REFSEL_DEFAULT (_CMU_CALCTRL_REFSEL_DEFAULT << 0)
#define	CMU_CALCTRL_REFSEL_HFXO (_CMU_CALCTRL_REFSEL_HFXO << 0)
#define	CMU_CALCTRL_REFSEL_LFXO (_CMU_CALCTRL_REFSEL_LFXO << 0)
#define	CMU_CALCTRL_REFSEL_HFRCO (_CMU_CALCTRL_REFSEL_HFRCO << 0)
#define	CMU_CALCTRL_REFSEL_LFRCO (_CMU_CALCTRL_REFSEL_LFRCO << 0)
#define	CMU_CALCTRL_REFSEL_AUXHFRCO (_CMU_CALCTRL_REFSEL_AUXHFRCO << 0)
#define	_CMU_CALCNT_RESETVALUE 0x00000000UL
#define	_CMU_CALCNT_MASK 0x000FFFFFUL
#define	_CMU_CALCNT_CALCNT_SHIFT 0
#define	_CMU_CALCNT_CALCNT_MASK 0xFFFFFUL
#define	_CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL
#define	CMU_CALCNT_CALCNT_DEFAULT (_CMU_CALCNT_CALCNT_DEFAULT << 0)
#define	_CMU_OSCENCMD_RESETVALUE 0x00000000UL
#define	_CMU_OSCENCMD_MASK 0x000003FFUL
#define	CMU_OSCENCMD_HFRCOEN (0x1UL << 0)
#define	_CMU_OSCENCMD_HFRCOEN_SHIFT 0
#define	_CMU_OSCENCMD_HFRCOEN_MASK 0x1UL
#define	_CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_HFRCOEN_DEFAULT (_CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)
#define	CMU_OSCENCMD_HFRCODIS (0x1UL << 1)
#define	_CMU_OSCENCMD_HFRCODIS_SHIFT 1
#define	_CMU_OSCENCMD_HFRCODIS_MASK 0x2UL
#define	_CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_HFRCODIS_DEFAULT (_CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)
#define	CMU_OSCENCMD_HFXOEN (0x1UL << 2)
#define	_CMU_OSCENCMD_HFXOEN_SHIFT 2
#define	_CMU_OSCENCMD_HFXOEN_MASK 0x4UL
#define	_CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_HFXOEN_DEFAULT (_CMU_OSCENCMD_HFXOEN_DEFAULT << 2)
#define	CMU_OSCENCMD_HFXODIS (0x1UL << 3)
#define	_CMU_OSCENCMD_HFXODIS_SHIFT 3
#define	_CMU_OSCENCMD_HFXODIS_MASK 0x8UL
#define	_CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_HFXODIS_DEFAULT (_CMU_OSCENCMD_HFXODIS_DEFAULT << 3)
#define	CMU_OSCENCMD_AUXHFRCOEN (0x1UL << 4)
#define	_CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4
#define	_CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL
#define	_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_AUXHFRCOEN_DEFAULT (_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)
#define	CMU_OSCENCMD_AUXHFRCODIS (0x1UL << 5)
#define	_CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5
#define	_CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL
#define	_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_AUXHFRCODIS_DEFAULT (_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)
#define	CMU_OSCENCMD_LFRCOEN (0x1UL << 6)
#define	_CMU_OSCENCMD_LFRCOEN_SHIFT 6
#define	_CMU_OSCENCMD_LFRCOEN_MASK 0x40UL
#define	_CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_LFRCOEN_DEFAULT (_CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)
#define	CMU_OSCENCMD_LFRCODIS (0x1UL << 7)
#define	_CMU_OSCENCMD_LFRCODIS_SHIFT 7
#define	_CMU_OSCENCMD_LFRCODIS_MASK 0x80UL
#define	_CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_LFRCODIS_DEFAULT (_CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)
#define	CMU_OSCENCMD_LFXOEN (0x1UL << 8)
#define	_CMU_OSCENCMD_LFXOEN_SHIFT 8
#define	_CMU_OSCENCMD_LFXOEN_MASK 0x100UL
#define	_CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_LFXOEN_DEFAULT (_CMU_OSCENCMD_LFXOEN_DEFAULT << 8)
#define	CMU_OSCENCMD_LFXODIS (0x1UL << 9)
#define	_CMU_OSCENCMD_LFXODIS_SHIFT 9
#define	_CMU_OSCENCMD_LFXODIS_MASK 0x200UL
#define	_CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL
#define	CMU_OSCENCMD_LFXODIS_DEFAULT (_CMU_OSCENCMD_LFXODIS_DEFAULT << 9)
#define	_CMU_CMD_RESETVALUE 0x00000000UL
#define	_CMU_CMD_MASK 0x0000000FUL
#define	_CMU_CMD_HFCLKSEL_SHIFT 0
#define	_CMU_CMD_HFCLKSEL_MASK 0x7UL
#define	_CMU_CMD_HFCLKSEL_DEFAULT 0x00000000UL
#define	_CMU_CMD_HFCLKSEL_HFRCO 0x00000001UL
#define	_CMU_CMD_HFCLKSEL_HFXO 0x00000002UL
#define	_CMU_CMD_HFCLKSEL_LFRCO 0x00000003UL
#define	_CMU_CMD_HFCLKSEL_LFXO 0x00000004UL
#define	CMU_CMD_HFCLKSEL_DEFAULT (_CMU_CMD_HFCLKSEL_DEFAULT << 0)
#define	CMU_CMD_HFCLKSEL_HFRCO (_CMU_CMD_HFCLKSEL_HFRCO << 0)
#define	CMU_CMD_HFCLKSEL_HFXO (_CMU_CMD_HFCLKSEL_HFXO << 0)
#define	CMU_CMD_HFCLKSEL_LFRCO (_CMU_CMD_HFCLKSEL_LFRCO << 0)
#define	CMU_CMD_HFCLKSEL_LFXO (_CMU_CMD_HFCLKSEL_LFXO << 0)
#define	CMU_CMD_CALSTART (0x1UL << 3)
#define	_CMU_CMD_CALSTART_SHIFT 3
#define	_CMU_CMD_CALSTART_MASK 0x8UL
#define	_CMU_CMD_CALSTART_DEFAULT 0x00000000UL
#define	CMU_CMD_CALSTART_DEFAULT (_CMU_CMD_CALSTART_DEFAULT << 3)
#define	_CMU_LFCLKSEL_RESETVALUE 0x00000005UL
#define	_CMU_LFCLKSEL_MASK 0x0000000FUL
#define	_CMU_LFCLKSEL_LFA_SHIFT 0
#define	_CMU_LFCLKSEL_LFA_MASK 0x3UL
#define	_CMU_LFCLKSEL_LFA_DISABLED 0x00000000UL
#define	_CMU_LFCLKSEL_LFA_DEFAULT 0x00000001UL
#define	_CMU_LFCLKSEL_LFA_LFRCO 0x00000001UL
#define	_CMU_LFCLKSEL_LFA_LFXO 0x00000002UL
#define	_CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 0x00000003UL
#define	CMU_LFCLKSEL_LFA_DISABLED (_CMU_LFCLKSEL_LFA_DISABLED << 0)
#define	CMU_LFCLKSEL_LFA_DEFAULT (_CMU_LFCLKSEL_LFA_DEFAULT << 0)
#define	CMU_LFCLKSEL_LFA_LFRCO (_CMU_LFCLKSEL_LFA_LFRCO << 0)
#define	CMU_LFCLKSEL_LFA_LFXO (_CMU_LFCLKSEL_LFA_LFXO << 0)
#define	CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 (_CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 << 0)
#define	_CMU_LFCLKSEL_LFB_SHIFT 2
#define	_CMU_LFCLKSEL_LFB_MASK 0xCUL
#define	_CMU_LFCLKSEL_LFB_DISABLED 0x00000000UL
#define	_CMU_LFCLKSEL_LFB_DEFAULT 0x00000001UL
#define	_CMU_LFCLKSEL_LFB_LFRCO 0x00000001UL
#define	_CMU_LFCLKSEL_LFB_LFXO 0x00000002UL
#define	_CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 0x00000003UL
#define	CMU_LFCLKSEL_LFB_DISABLED (_CMU_LFCLKSEL_LFB_DISABLED << 2)
#define	CMU_LFCLKSEL_LFB_DEFAULT (_CMU_LFCLKSEL_LFB_DEFAULT << 2)
#define	CMU_LFCLKSEL_LFB_LFRCO (_CMU_LFCLKSEL_LFB_LFRCO << 2)
#define	CMU_LFCLKSEL_LFB_LFXO (_CMU_LFCLKSEL_LFB_LFXO << 2)
#define	CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 (_CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 << 2)
#define	_CMU_STATUS_RESETVALUE 0x00000403UL
#define	_CMU_STATUS_MASK 0x00007FFFUL
#define	CMU_STATUS_HFRCOENS (0x1UL << 0)
#define	_CMU_STATUS_HFRCOENS_SHIFT 0
#define	_CMU_STATUS_HFRCOENS_MASK 0x1UL
#define	_CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL
#define	CMU_STATUS_HFRCOENS_DEFAULT (_CMU_STATUS_HFRCOENS_DEFAULT << 0)
#define	CMU_STATUS_HFRCORDY (0x1UL << 1)
#define	_CMU_STATUS_HFRCORDY_SHIFT 1
#define	_CMU_STATUS_HFRCORDY_MASK 0x2UL
#define	_CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL
#define	CMU_STATUS_HFRCORDY_DEFAULT (_CMU_STATUS_HFRCORDY_DEFAULT << 1)
#define	CMU_STATUS_HFXOENS (0x1UL << 2)
#define	_CMU_STATUS_HFXOENS_SHIFT 2
#define	_CMU_STATUS_HFXOENS_MASK 0x4UL
#define	_CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL
#define	CMU_STATUS_HFXOENS_DEFAULT (_CMU_STATUS_HFXOENS_DEFAULT << 2)
#define	CMU_STATUS_HFXORDY (0x1UL << 3)
#define	_CMU_STATUS_HFXORDY_SHIFT 3
#define	_CMU_STATUS_HFXORDY_MASK 0x8UL
#define	_CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL
#define	CMU_STATUS_HFXORDY_DEFAULT (_CMU_STATUS_HFXORDY_DEFAULT << 3)
#define	CMU_STATUS_AUXHFRCOENS (0x1UL << 4)
#define	_CMU_STATUS_AUXHFRCOENS_SHIFT 4
#define	_CMU_STATUS_AUXHFRCOENS_MASK 0x10UL
#define	_CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL
#define	CMU_STATUS_AUXHFRCOENS_DEFAULT (_CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)
#define	CMU_STATUS_AUXHFRCORDY (0x1UL << 5)
#define	_CMU_STATUS_AUXHFRCORDY_SHIFT 5
#define	_CMU_STATUS_AUXHFRCORDY_MASK 0x20UL
#define	_CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL
#define	CMU_STATUS_AUXHFRCORDY_DEFAULT (_CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)
#define	CMU_STATUS_LFRCOENS (0x1UL << 6)
#define	_CMU_STATUS_LFRCOENS_SHIFT 6
#define	_CMU_STATUS_LFRCOENS_MASK 0x40UL
#define	_CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFRCOENS_DEFAULT (_CMU_STATUS_LFRCOENS_DEFAULT << 6)
#define	CMU_STATUS_LFRCORDY (0x1UL << 7)
#define	_CMU_STATUS_LFRCORDY_SHIFT 7
#define	_CMU_STATUS_LFRCORDY_MASK 0x80UL
#define	_CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFRCORDY_DEFAULT (_CMU_STATUS_LFRCORDY_DEFAULT << 7)
#define	CMU_STATUS_LFXOENS (0x1UL << 8)
#define	_CMU_STATUS_LFXOENS_SHIFT 8
#define	_CMU_STATUS_LFXOENS_MASK 0x100UL
#define	_CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFXOENS_DEFAULT (_CMU_STATUS_LFXOENS_DEFAULT << 8)
#define	CMU_STATUS_LFXORDY (0x1UL << 9)
#define	_CMU_STATUS_LFXORDY_SHIFT 9
#define	_CMU_STATUS_LFXORDY_MASK 0x200UL
#define	_CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFXORDY_DEFAULT (_CMU_STATUS_LFXORDY_DEFAULT << 9)
#define	CMU_STATUS_HFRCOSEL (0x1UL << 10)
#define	_CMU_STATUS_HFRCOSEL_SHIFT 10
#define	_CMU_STATUS_HFRCOSEL_MASK 0x400UL
#define	_CMU_STATUS_HFRCOSEL_DEFAULT 0x00000001UL
#define	CMU_STATUS_HFRCOSEL_DEFAULT (_CMU_STATUS_HFRCOSEL_DEFAULT << 10)
#define	CMU_STATUS_HFXOSEL (0x1UL << 11)
#define	_CMU_STATUS_HFXOSEL_SHIFT 11
#define	_CMU_STATUS_HFXOSEL_MASK 0x800UL
#define	_CMU_STATUS_HFXOSEL_DEFAULT 0x00000000UL
#define	CMU_STATUS_HFXOSEL_DEFAULT (_CMU_STATUS_HFXOSEL_DEFAULT << 11)
#define	CMU_STATUS_LFRCOSEL (0x1UL << 12)
#define	_CMU_STATUS_LFRCOSEL_SHIFT 12
#define	_CMU_STATUS_LFRCOSEL_MASK 0x1000UL
#define	_CMU_STATUS_LFRCOSEL_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFRCOSEL_DEFAULT (_CMU_STATUS_LFRCOSEL_DEFAULT << 12)
#define	CMU_STATUS_LFXOSEL (0x1UL << 13)
#define	_CMU_STATUS_LFXOSEL_SHIFT 13
#define	_CMU_STATUS_LFXOSEL_MASK 0x2000UL
#define	_CMU_STATUS_LFXOSEL_DEFAULT 0x00000000UL
#define	CMU_STATUS_LFXOSEL_DEFAULT (_CMU_STATUS_LFXOSEL_DEFAULT << 13)
#define	CMU_STATUS_CALBSY (0x1UL << 14)
#define	_CMU_STATUS_CALBSY_SHIFT 14
#define	_CMU_STATUS_CALBSY_MASK 0x4000UL
#define	_CMU_STATUS_CALBSY_DEFAULT 0x00000000UL
#define	CMU_STATUS_CALBSY_DEFAULT (_CMU_STATUS_CALBSY_DEFAULT << 14)
#define	_CMU_IF_RESETVALUE 0x00000001UL
#define	_CMU_IF_MASK 0x0000003FUL
#define	CMU_IF_HFRCORDY (0x1UL << 0)
#define	_CMU_IF_HFRCORDY_SHIFT 0
#define	_CMU_IF_HFRCORDY_MASK 0x1UL
#define	_CMU_IF_HFRCORDY_DEFAULT 0x00000001UL
#define	CMU_IF_HFRCORDY_DEFAULT (_CMU_IF_HFRCORDY_DEFAULT << 0)
#define	CMU_IF_HFXORDY (0x1UL << 1)
#define	_CMU_IF_HFXORDY_SHIFT 1
#define	_CMU_IF_HFXORDY_MASK 0x2UL
#define	_CMU_IF_HFXORDY_DEFAULT 0x00000000UL
#define	CMU_IF_HFXORDY_DEFAULT (_CMU_IF_HFXORDY_DEFAULT << 1)
#define	CMU_IF_LFRCORDY (0x1UL << 2)
#define	_CMU_IF_LFRCORDY_SHIFT 2
#define	_CMU_IF_LFRCORDY_MASK 0x4UL
#define	_CMU_IF_LFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IF_LFRCORDY_DEFAULT (_CMU_IF_LFRCORDY_DEFAULT << 2)
#define	CMU_IF_LFXORDY (0x1UL << 3)
#define	_CMU_IF_LFXORDY_SHIFT 3
#define	_CMU_IF_LFXORDY_MASK 0x8UL
#define	_CMU_IF_LFXORDY_DEFAULT 0x00000000UL
#define	CMU_IF_LFXORDY_DEFAULT (_CMU_IF_LFXORDY_DEFAULT << 3)
#define	CMU_IF_AUXHFRCORDY (0x1UL << 4)
#define	_CMU_IF_AUXHFRCORDY_SHIFT 4
#define	_CMU_IF_AUXHFRCORDY_MASK 0x10UL
#define	_CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IF_AUXHFRCORDY_DEFAULT (_CMU_IF_AUXHFRCORDY_DEFAULT << 4)
#define	CMU_IF_CALRDY (0x1UL << 5)
#define	_CMU_IF_CALRDY_SHIFT 5
#define	_CMU_IF_CALRDY_MASK 0x20UL
#define	_CMU_IF_CALRDY_DEFAULT 0x00000000UL
#define	CMU_IF_CALRDY_DEFAULT (_CMU_IF_CALRDY_DEFAULT << 5)
#define	_CMU_IFS_RESETVALUE 0x00000000UL
#define	_CMU_IFS_MASK 0x0000003FUL
#define	CMU_IFS_HFRCORDY (0x1UL << 0)
#define	_CMU_IFS_HFRCORDY_SHIFT 0
#define	_CMU_IFS_HFRCORDY_MASK 0x1UL
#define	_CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFS_HFRCORDY_DEFAULT (_CMU_IFS_HFRCORDY_DEFAULT << 0)
#define	CMU_IFS_HFXORDY (0x1UL << 1)
#define	_CMU_IFS_HFXORDY_SHIFT 1
#define	_CMU_IFS_HFXORDY_MASK 0x2UL
#define	_CMU_IFS_HFXORDY_DEFAULT 0x00000000UL
#define	CMU_IFS_HFXORDY_DEFAULT (_CMU_IFS_HFXORDY_DEFAULT << 1)
#define	CMU_IFS_LFRCORDY (0x1UL << 2)
#define	_CMU_IFS_LFRCORDY_SHIFT 2
#define	_CMU_IFS_LFRCORDY_MASK 0x4UL
#define	_CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFS_LFRCORDY_DEFAULT (_CMU_IFS_LFRCORDY_DEFAULT << 2)
#define	CMU_IFS_LFXORDY (0x1UL << 3)
#define	_CMU_IFS_LFXORDY_SHIFT 3
#define	_CMU_IFS_LFXORDY_MASK 0x8UL
#define	_CMU_IFS_LFXORDY_DEFAULT 0x00000000UL
#define	CMU_IFS_LFXORDY_DEFAULT (_CMU_IFS_LFXORDY_DEFAULT << 3)
#define	CMU_IFS_AUXHFRCORDY (0x1UL << 4)
#define	_CMU_IFS_AUXHFRCORDY_SHIFT 4
#define	_CMU_IFS_AUXHFRCORDY_MASK 0x10UL
#define	_CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFS_AUXHFRCORDY_DEFAULT (_CMU_IFS_AUXHFRCORDY_DEFAULT << 4)
#define	CMU_IFS_CALRDY (0x1UL << 5)
#define	_CMU_IFS_CALRDY_SHIFT 5
#define	_CMU_IFS_CALRDY_MASK 0x20UL
#define	_CMU_IFS_CALRDY_DEFAULT 0x00000000UL
#define	CMU_IFS_CALRDY_DEFAULT (_CMU_IFS_CALRDY_DEFAULT << 5)
#define	_CMU_IFC_RESETVALUE 0x00000000UL
#define	_CMU_IFC_MASK 0x0000003FUL
#define	CMU_IFC_HFRCORDY (0x1UL << 0)
#define	_CMU_IFC_HFRCORDY_SHIFT 0
#define	_CMU_IFC_HFRCORDY_MASK 0x1UL
#define	_CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFC_HFRCORDY_DEFAULT (_CMU_IFC_HFRCORDY_DEFAULT << 0)
#define	CMU_IFC_HFXORDY (0x1UL << 1)
#define	_CMU_IFC_HFXORDY_SHIFT 1
#define	_CMU_IFC_HFXORDY_MASK 0x2UL
#define	_CMU_IFC_HFXORDY_DEFAULT 0x00000000UL
#define	CMU_IFC_HFXORDY_DEFAULT (_CMU_IFC_HFXORDY_DEFAULT << 1)
#define	CMU_IFC_LFRCORDY (0x1UL << 2)
#define	_CMU_IFC_LFRCORDY_SHIFT 2
#define	_CMU_IFC_LFRCORDY_MASK 0x4UL
#define	_CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFC_LFRCORDY_DEFAULT (_CMU_IFC_LFRCORDY_DEFAULT << 2)
#define	CMU_IFC_LFXORDY (0x1UL << 3)
#define	_CMU_IFC_LFXORDY_SHIFT 3
#define	_CMU_IFC_LFXORDY_MASK 0x8UL
#define	_CMU_IFC_LFXORDY_DEFAULT 0x00000000UL
#define	CMU_IFC_LFXORDY_DEFAULT (_CMU_IFC_LFXORDY_DEFAULT << 3)
#define	CMU_IFC_AUXHFRCORDY (0x1UL << 4)
#define	_CMU_IFC_AUXHFRCORDY_SHIFT 4
#define	_CMU_IFC_AUXHFRCORDY_MASK 0x10UL
#define	_CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IFC_AUXHFRCORDY_DEFAULT (_CMU_IFC_AUXHFRCORDY_DEFAULT << 4)
#define	CMU_IFC_CALRDY (0x1UL << 5)
#define	_CMU_IFC_CALRDY_SHIFT 5
#define	_CMU_IFC_CALRDY_MASK 0x20UL
#define	_CMU_IFC_CALRDY_DEFAULT 0x00000000UL
#define	CMU_IFC_CALRDY_DEFAULT (_CMU_IFC_CALRDY_DEFAULT << 5)
#define	_CMU_IEN_RESETVALUE 0x00000000UL
#define	_CMU_IEN_MASK 0x0000003FUL
#define	CMU_IEN_HFRCORDY (0x1UL << 0)
#define	_CMU_IEN_HFRCORDY_SHIFT 0
#define	_CMU_IEN_HFRCORDY_MASK 0x1UL
#define	_CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IEN_HFRCORDY_DEFAULT (_CMU_IEN_HFRCORDY_DEFAULT << 0)
#define	CMU_IEN_HFXORDY (0x1UL << 1)
#define	_CMU_IEN_HFXORDY_SHIFT 1
#define	_CMU_IEN_HFXORDY_MASK 0x2UL
#define	_CMU_IEN_HFXORDY_DEFAULT 0x00000000UL
#define	CMU_IEN_HFXORDY_DEFAULT (_CMU_IEN_HFXORDY_DEFAULT << 1)
#define	CMU_IEN_LFRCORDY (0x1UL << 2)
#define	_CMU_IEN_LFRCORDY_SHIFT 2
#define	_CMU_IEN_LFRCORDY_MASK 0x4UL
#define	_CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IEN_LFRCORDY_DEFAULT (_CMU_IEN_LFRCORDY_DEFAULT << 2)
#define	CMU_IEN_LFXORDY (0x1UL << 3)
#define	_CMU_IEN_LFXORDY_SHIFT 3
#define	_CMU_IEN_LFXORDY_MASK 0x8UL
#define	_CMU_IEN_LFXORDY_DEFAULT 0x00000000UL
#define	CMU_IEN_LFXORDY_DEFAULT (_CMU_IEN_LFXORDY_DEFAULT << 3)
#define	CMU_IEN_AUXHFRCORDY (0x1UL << 4)
#define	_CMU_IEN_AUXHFRCORDY_SHIFT 4
#define	_CMU_IEN_AUXHFRCORDY_MASK 0x10UL
#define	_CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL
#define	CMU_IEN_AUXHFRCORDY_DEFAULT (_CMU_IEN_AUXHFRCORDY_DEFAULT << 4)
#define	CMU_IEN_CALRDY (0x1UL << 5)
#define	_CMU_IEN_CALRDY_SHIFT 5
#define	_CMU_IEN_CALRDY_MASK 0x20UL
#define	_CMU_IEN_CALRDY_DEFAULT 0x00000000UL
#define	CMU_IEN_CALRDY_DEFAULT (_CMU_IEN_CALRDY_DEFAULT << 5)
#define	_CMU_HFCORECLKEN0_RESETVALUE 0x00000000UL
#define	_CMU_HFCORECLKEN0_MASK 0x0000000FUL
#define	CMU_HFCORECLKEN0_AES (0x1UL << 0)
#define	_CMU_HFCORECLKEN0_AES_SHIFT 0
#define	_CMU_HFCORECLKEN0_AES_MASK 0x1UL
#define	_CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL
#define	CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0)
#define	CMU_HFCORECLKEN0_DMA (0x1UL << 1)
#define	_CMU_HFCORECLKEN0_DMA_SHIFT 1
#define	_CMU_HFCORECLKEN0_DMA_MASK 0x2UL
#define	_CMU_HFCORECLKEN0_DMA_DEFAULT 0x00000000UL
#define	CMU_HFCORECLKEN0_DMA_DEFAULT (_CMU_HFCORECLKEN0_DMA_DEFAULT << 1)
#define	CMU_HFCORECLKEN0_LE (0x1UL << 2)
#define	_CMU_HFCORECLKEN0_LE_SHIFT 2
#define	_CMU_HFCORECLKEN0_LE_MASK 0x4UL
#define	_CMU_HFCORECLKEN0_LE_DEFAULT 0x00000000UL
#define	CMU_HFCORECLKEN0_LE_DEFAULT (_CMU_HFCORECLKEN0_LE_DEFAULT << 2)
#define	CMU_HFCORECLKEN0_EBI (0x1UL << 3)
#define	_CMU_HFCORECLKEN0_EBI_SHIFT 3
#define	_CMU_HFCORECLKEN0_EBI_MASK 0x8UL
#define	_CMU_HFCORECLKEN0_EBI_DEFAULT 0x00000000UL
#define	CMU_HFCORECLKEN0_EBI_DEFAULT (_CMU_HFCORECLKEN0_EBI_DEFAULT << 3)
#define	_CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL
#define	_CMU_HFPERCLKEN0_MASK 0x0000FFFFUL
#define	CMU_HFPERCLKEN0_USART0 (0x1UL << 0)
#define	_CMU_HFPERCLKEN0_USART0_SHIFT 0
#define	_CMU_HFPERCLKEN0_USART0_MASK 0x1UL
#define	_CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_USART0_DEFAULT (_CMU_HFPERCLKEN0_USART0_DEFAULT << 0)
#define	CMU_HFPERCLKEN0_USART1 (0x1UL << 1)
#define	_CMU_HFPERCLKEN0_USART1_SHIFT 1
#define	_CMU_HFPERCLKEN0_USART1_MASK 0x2UL
#define	_CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_USART1_DEFAULT (_CMU_HFPERCLKEN0_USART1_DEFAULT << 1)
#define	CMU_HFPERCLKEN0_USART2 (0x1UL << 2)
#define	_CMU_HFPERCLKEN0_USART2_SHIFT 2
#define	_CMU_HFPERCLKEN0_USART2_MASK 0x4UL
#define	_CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_USART2_DEFAULT (_CMU_HFPERCLKEN0_USART2_DEFAULT << 2)
#define	CMU_HFPERCLKEN0_UART0 (0x1UL << 3)
#define	_CMU_HFPERCLKEN0_UART0_SHIFT 3
#define	_CMU_HFPERCLKEN0_UART0_MASK 0x8UL
#define	_CMU_HFPERCLKEN0_UART0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_UART0_DEFAULT (_CMU_HFPERCLKEN0_UART0_DEFAULT << 3)
#define	CMU_HFPERCLKEN0_TIMER0 (0x1UL << 4)
#define	_CMU_HFPERCLKEN0_TIMER0_SHIFT 4
#define	_CMU_HFPERCLKEN0_TIMER0_MASK 0x10UL
#define	_CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_TIMER0_DEFAULT (_CMU_HFPERCLKEN0_TIMER0_DEFAULT << 4)
#define	CMU_HFPERCLKEN0_TIMER1 (0x1UL << 5)
#define	_CMU_HFPERCLKEN0_TIMER1_SHIFT 5
#define	_CMU_HFPERCLKEN0_TIMER1_MASK 0x20UL
#define	_CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_TIMER1_DEFAULT (_CMU_HFPERCLKEN0_TIMER1_DEFAULT << 5)
#define	CMU_HFPERCLKEN0_TIMER2 (0x1UL << 6)
#define	_CMU_HFPERCLKEN0_TIMER2_SHIFT 6
#define	_CMU_HFPERCLKEN0_TIMER2_MASK 0x40UL
#define	_CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_TIMER2_DEFAULT (_CMU_HFPERCLKEN0_TIMER2_DEFAULT << 6)
#define	CMU_HFPERCLKEN0_ACMP0 (0x1UL << 7)
#define	_CMU_HFPERCLKEN0_ACMP0_SHIFT 7
#define	_CMU_HFPERCLKEN0_ACMP0_MASK 0x80UL
#define	_CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_ACMP0_DEFAULT (_CMU_HFPERCLKEN0_ACMP0_DEFAULT << 7)
#define	CMU_HFPERCLKEN0_ACMP1 (0x1UL << 8)
#define	_CMU_HFPERCLKEN0_ACMP1_SHIFT 8
#define	_CMU_HFPERCLKEN0_ACMP1_MASK 0x100UL
#define	_CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_ACMP1_DEFAULT (_CMU_HFPERCLKEN0_ACMP1_DEFAULT << 8)
#define	CMU_HFPERCLKEN0_PRS (0x1UL << 10)
#define	_CMU_HFPERCLKEN0_PRS_SHIFT 10
#define	_CMU_HFPERCLKEN0_PRS_MASK 0x400UL
#define	_CMU_HFPERCLKEN0_PRS_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_PRS_DEFAULT (_CMU_HFPERCLKEN0_PRS_DEFAULT << 10)
#define	CMU_HFPERCLKEN0_DAC0 (0x1UL << 11)
#define	_CMU_HFPERCLKEN0_DAC0_SHIFT 11
#define	_CMU_HFPERCLKEN0_DAC0_MASK 0x800UL
#define	_CMU_HFPERCLKEN0_DAC0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_DAC0_DEFAULT (_CMU_HFPERCLKEN0_DAC0_DEFAULT << 11)
#define	CMU_HFPERCLKEN0_GPIO (0x1UL << 12)
#define	_CMU_HFPERCLKEN0_GPIO_SHIFT 12
#define	_CMU_HFPERCLKEN0_GPIO_MASK 0x1000UL
#define	_CMU_HFPERCLKEN0_GPIO_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_GPIO_DEFAULT (_CMU_HFPERCLKEN0_GPIO_DEFAULT << 12)
#define	CMU_HFPERCLKEN0_VCMP (0x1UL << 13)
#define	_CMU_HFPERCLKEN0_VCMP_SHIFT 13
#define	_CMU_HFPERCLKEN0_VCMP_MASK 0x2000UL
#define	_CMU_HFPERCLKEN0_VCMP_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_VCMP_DEFAULT (_CMU_HFPERCLKEN0_VCMP_DEFAULT << 13)
#define	CMU_HFPERCLKEN0_ADC0 (0x1UL << 14)
#define	_CMU_HFPERCLKEN0_ADC0_SHIFT 14
#define	_CMU_HFPERCLKEN0_ADC0_MASK 0x4000UL
#define	_CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_ADC0_DEFAULT (_CMU_HFPERCLKEN0_ADC0_DEFAULT << 14)
#define	CMU_HFPERCLKEN0_I2C0 (0x1UL << 15)
#define	_CMU_HFPERCLKEN0_I2C0_SHIFT 15
#define	_CMU_HFPERCLKEN0_I2C0_MASK 0x8000UL
#define	_CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL
#define	CMU_HFPERCLKEN0_I2C0_DEFAULT (_CMU_HFPERCLKEN0_I2C0_DEFAULT << 15)
#define	_CMU_SYNCBUSY_RESETVALUE 0x00000000UL
#define	_CMU_SYNCBUSY_MASK 0x00000055UL
#define	CMU_SYNCBUSY_LFACLKEN0 (0x1UL << 0)
#define	_CMU_SYNCBUSY_LFACLKEN0_SHIFT 0
#define	_CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL
#define	_CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL
#define	CMU_SYNCBUSY_LFACLKEN0_DEFAULT (_CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)
#define	CMU_SYNCBUSY_LFAPRESC0 (0x1UL << 2)
#define	_CMU_SYNCBUSY_LFAPRESC0_SHIFT 2
#define	_CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL
#define	_CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL
#define	CMU_SYNCBUSY_LFAPRESC0_DEFAULT (_CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)
#define	CMU_SYNCBUSY_LFBCLKEN0 (0x1UL << 4)
#define	_CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4
#define	_CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL
#define	_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL
#define	CMU_SYNCBUSY_LFBCLKEN0_DEFAULT (_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)
#define	CMU_SYNCBUSY_LFBPRESC0 (0x1UL << 6)
#define	_CMU_SYNCBUSY_LFBPRESC0_SHIFT 6
#define	_CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL
#define	_CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL
#define	CMU_SYNCBUSY_LFBPRESC0_DEFAULT (_CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)
#define	_CMU_FREEZE_RESETVALUE 0x00000000UL
#define	_CMU_FREEZE_MASK 0x00000001UL
#define	CMU_FREEZE_REGFREEZE (0x1UL << 0)
#define	_CMU_FREEZE_REGFREEZE_SHIFT 0
#define	_CMU_FREEZE_REGFREEZE_MASK 0x1UL
#define	_CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL
#define	_CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL
#define	_CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL
#define	CMU_FREEZE_REGFREEZE_DEFAULT (_CMU_FREEZE_REGFREEZE_DEFAULT << 0)
#define	CMU_FREEZE_REGFREEZE_UPDATE (_CMU_FREEZE_REGFREEZE_UPDATE << 0)
#define	CMU_FREEZE_REGFREEZE_FREEZE (_CMU_FREEZE_REGFREEZE_FREEZE << 0)
#define	_CMU_LFACLKEN0_RESETVALUE 0x00000000UL
#define	_CMU_LFACLKEN0_MASK 0x00000007UL
#define	CMU_LFACLKEN0_RTC (0x1UL << 0)
#define	_CMU_LFACLKEN0_RTC_SHIFT 0
#define	_CMU_LFACLKEN0_RTC_MASK 0x1UL
#define	_CMU_LFACLKEN0_RTC_DEFAULT 0x00000000UL
#define	CMU_LFACLKEN0_RTC_DEFAULT (_CMU_LFACLKEN0_RTC_DEFAULT << 0)
#define	CMU_LFACLKEN0_LETIMER0 (0x1UL << 1)
#define	_CMU_LFACLKEN0_LETIMER0_SHIFT 1
#define	_CMU_LFACLKEN0_LETIMER0_MASK 0x2UL
#define	_CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL
#define	CMU_LFACLKEN0_LETIMER0_DEFAULT (_CMU_LFACLKEN0_LETIMER0_DEFAULT << 1)
#define	CMU_LFACLKEN0_LCD (0x1UL << 2)
#define	_CMU_LFACLKEN0_LCD_SHIFT 2
#define	_CMU_LFACLKEN0_LCD_MASK 0x4UL
#define	_CMU_LFACLKEN0_LCD_DEFAULT 0x00000000UL
#define	CMU_LFACLKEN0_LCD_DEFAULT (_CMU_LFACLKEN0_LCD_DEFAULT << 2)
#define	_CMU_LFBCLKEN0_RESETVALUE 0x00000000UL
#define	_CMU_LFBCLKEN0_MASK 0x00000003UL
#define	CMU_LFBCLKEN0_LEUART0 (0x1UL << 0)
#define	_CMU_LFBCLKEN0_LEUART0_SHIFT 0
#define	_CMU_LFBCLKEN0_LEUART0_MASK 0x1UL
#define	_CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000000UL
#define	CMU_LFBCLKEN0_LEUART0_DEFAULT (_CMU_LFBCLKEN0_LEUART0_DEFAULT << 0)
#define	CMU_LFBCLKEN0_LEUART1 (0x1UL << 1)
#define	_CMU_LFBCLKEN0_LEUART1_SHIFT 1
#define	_CMU_LFBCLKEN0_LEUART1_MASK 0x2UL
#define	_CMU_LFBCLKEN0_LEUART1_DEFAULT 0x00000000UL
#define	CMU_LFBCLKEN0_LEUART1_DEFAULT (_CMU_LFBCLKEN0_LEUART1_DEFAULT << 1)
#define	_CMU_LFAPRESC0_RESETVALUE 0x00000000UL
#define	_CMU_LFAPRESC0_MASK 0x000003FFUL
#define	_CMU_LFAPRESC0_RTC_SHIFT 0
#define	_CMU_LFAPRESC0_RTC_MASK 0xFUL
#define	_CMU_LFAPRESC0_RTC_DIV1 0x00000000UL
#define	_CMU_LFAPRESC0_RTC_DIV2 0x00000001UL
#define	_CMU_LFAPRESC0_RTC_DIV4 0x00000002UL
#define	_CMU_LFAPRESC0_RTC_DIV8 0x00000003UL
#define	_CMU_LFAPRESC0_RTC_DIV16 0x00000004UL
#define	_CMU_LFAPRESC0_RTC_DIV32 0x00000005UL
#define	_CMU_LFAPRESC0_RTC_DIV64 0x00000006UL
#define	_CMU_LFAPRESC0_RTC_DIV128 0x00000007UL
#define	_CMU_LFAPRESC0_RTC_DIV256 0x00000008UL
#define	_CMU_LFAPRESC0_RTC_DIV512 0x00000009UL
#define	_CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL
#define	_CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL
#define	_CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL
#define	_CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL
#define	_CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL
#define	_CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL
#define	CMU_LFAPRESC0_RTC_DIV1 (_CMU_LFAPRESC0_RTC_DIV1 << 0)
#define	CMU_LFAPRESC0_RTC_DIV2 (_CMU_LFAPRESC0_RTC_DIV2 << 0)
#define	CMU_LFAPRESC0_RTC_DIV4 (_CMU_LFAPRESC0_RTC_DIV4 << 0)
#define	CMU_LFAPRESC0_RTC_DIV8 (_CMU_LFAPRESC0_RTC_DIV8 << 0)
#define	CMU_LFAPRESC0_RTC_DIV16 (_CMU_LFAPRESC0_RTC_DIV16 << 0)
#define	CMU_LFAPRESC0_RTC_DIV32 (_CMU_LFAPRESC0_RTC_DIV32 << 0)
#define	CMU_LFAPRESC0_RTC_DIV64 (_CMU_LFAPRESC0_RTC_DIV64 << 0)
#define	CMU_LFAPRESC0_RTC_DIV128 (_CMU_LFAPRESC0_RTC_DIV128 << 0)
#define	CMU_LFAPRESC0_RTC_DIV256 (_CMU_LFAPRESC0_RTC_DIV256 << 0)
#define	CMU_LFAPRESC0_RTC_DIV512 (_CMU_LFAPRESC0_RTC_DIV512 << 0)
#define	CMU_LFAPRESC0_RTC_DIV1024 (_CMU_LFAPRESC0_RTC_DIV1024 << 0)
#define	CMU_LFAPRESC0_RTC_DIV2048 (_CMU_LFAPRESC0_RTC_DIV2048 << 0)
#define	CMU_LFAPRESC0_RTC_DIV4096 (_CMU_LFAPRESC0_RTC_DIV4096 << 0)
#define	CMU_LFAPRESC0_RTC_DIV8192 (_CMU_LFAPRESC0_RTC_DIV8192 << 0)
#define	CMU_LFAPRESC0_RTC_DIV16384 (_CMU_LFAPRESC0_RTC_DIV16384 << 0)
#define	CMU_LFAPRESC0_RTC_DIV32768 (_CMU_LFAPRESC0_RTC_DIV32768 << 0)
#define	_CMU_LFAPRESC0_LETIMER0_SHIFT 4
#define	_CMU_LFAPRESC0_LETIMER0_MASK 0xF0UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL
#define	_CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL
#define	_CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL
#define	_CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL
#define	_CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL
#define	_CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL
#define	_CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL
#define	CMU_LFAPRESC0_LETIMER0_DIV1 (_CMU_LFAPRESC0_LETIMER0_DIV1 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV2 (_CMU_LFAPRESC0_LETIMER0_DIV2 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV4 (_CMU_LFAPRESC0_LETIMER0_DIV4 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV8 (_CMU_LFAPRESC0_LETIMER0_DIV8 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV16 (_CMU_LFAPRESC0_LETIMER0_DIV16 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV32 (_CMU_LFAPRESC0_LETIMER0_DIV32 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV64 (_CMU_LFAPRESC0_LETIMER0_DIV64 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV128 (_CMU_LFAPRESC0_LETIMER0_DIV128 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV256 (_CMU_LFAPRESC0_LETIMER0_DIV256 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV512 (_CMU_LFAPRESC0_LETIMER0_DIV512 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV1024 (_CMU_LFAPRESC0_LETIMER0_DIV1024 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV2048 (_CMU_LFAPRESC0_LETIMER0_DIV2048 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV4096 (_CMU_LFAPRESC0_LETIMER0_DIV4096 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV8192 (_CMU_LFAPRESC0_LETIMER0_DIV8192 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV16384 (_CMU_LFAPRESC0_LETIMER0_DIV16384 << 4)
#define	CMU_LFAPRESC0_LETIMER0_DIV32768 (_CMU_LFAPRESC0_LETIMER0_DIV32768 << 4)
#define	_CMU_LFAPRESC0_LCD_SHIFT 8
#define	_CMU_LFAPRESC0_LCD_MASK 0x300UL
#define	_CMU_LFAPRESC0_LCD_DIV16 0x00000000UL
#define	_CMU_LFAPRESC0_LCD_DIV32 0x00000001UL
#define	_CMU_LFAPRESC0_LCD_DIV64 0x00000002UL
#define	_CMU_LFAPRESC0_LCD_DIV128 0x00000003UL
#define	CMU_LFAPRESC0_LCD_DIV16 (_CMU_LFAPRESC0_LCD_DIV16 << 8)
#define	CMU_LFAPRESC0_LCD_DIV32 (_CMU_LFAPRESC0_LCD_DIV32 << 8)
#define	CMU_LFAPRESC0_LCD_DIV64 (_CMU_LFAPRESC0_LCD_DIV64 << 8)
#define	CMU_LFAPRESC0_LCD_DIV128 (_CMU_LFAPRESC0_LCD_DIV128 << 8)
#define	_CMU_LFBPRESC0_RESETVALUE 0x00000000UL
#define	_CMU_LFBPRESC0_MASK 0x00000033UL
#define	_CMU_LFBPRESC0_LEUART0_SHIFT 0
#define	_CMU_LFBPRESC0_LEUART0_MASK 0x3UL
#define	_CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL
#define	_CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL
#define	_CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL
#define	_CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL
#define	CMU_LFBPRESC0_LEUART0_DIV1 (_CMU_LFBPRESC0_LEUART0_DIV1 << 0)
#define	CMU_LFBPRESC0_LEUART0_DIV2 (_CMU_LFBPRESC0_LEUART0_DIV2 << 0)
#define	CMU_LFBPRESC0_LEUART0_DIV4 (_CMU_LFBPRESC0_LEUART0_DIV4 << 0)
#define	CMU_LFBPRESC0_LEUART0_DIV8 (_CMU_LFBPRESC0_LEUART0_DIV8 << 0)
#define	_CMU_LFBPRESC0_LEUART1_SHIFT 4
#define	_CMU_LFBPRESC0_LEUART1_MASK 0x30UL
#define	_CMU_LFBPRESC0_LEUART1_DIV1 0x00000000UL
#define	_CMU_LFBPRESC0_LEUART1_DIV2 0x00000001UL
#define	_CMU_LFBPRESC0_LEUART1_DIV4 0x00000002UL
#define	_CMU_LFBPRESC0_LEUART1_DIV8 0x00000003UL
#define	CMU_LFBPRESC0_LEUART1_DIV1 (_CMU_LFBPRESC0_LEUART1_DIV1 << 4)
#define	CMU_LFBPRESC0_LEUART1_DIV2 (_CMU_LFBPRESC0_LEUART1_DIV2 << 4)
#define	CMU_LFBPRESC0_LEUART1_DIV4 (_CMU_LFBPRESC0_LEUART1_DIV4 << 4)
#define	CMU_LFBPRESC0_LEUART1_DIV8 (_CMU_LFBPRESC0_LEUART1_DIV8 << 4)
#define	_CMU_PCNTCTRL_RESETVALUE 0x00000000UL
#define	_CMU_PCNTCTRL_MASK 0x0000003FUL
#define	CMU_PCNTCTRL_PCNT0CLKEN (0x1UL << 0)
#define	_CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0
#define	_CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL
#define	_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000000UL
#define	CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)
#define	CMU_PCNTCTRL_PCNT0CLKSEL (0x1UL << 1)
#define	_CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1
#define	_CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL
#define	_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL
#define	CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)
#define	CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)
#define	CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 (_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)
#define	CMU_PCNTCTRL_PCNT1CLKEN (0x1UL << 2)
#define	_CMU_PCNTCTRL_PCNT1CLKEN_SHIFT 2
#define	_CMU_PCNTCTRL_PCNT1CLKEN_MASK 0x4UL
#define	_CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT 0x00000000UL
#define	CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT << 2)
#define	CMU_PCNTCTRL_PCNT1CLKSEL (0x1UL << 3)
#define	_CMU_PCNTCTRL_PCNT1CLKSEL_SHIFT 3
#define	_CMU_PCNTCTRL_PCNT1CLKSEL_MASK 0x8UL
#define	_CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 0x00000001UL
#define	CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT << 3)
#define	CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK << 3)
#define	CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 (_CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 << 3)
#define	CMU_PCNTCTRL_PCNT2CLKEN (0x1UL << 4)
#define	_CMU_PCNTCTRL_PCNT2CLKEN_SHIFT 4
#define	_CMU_PCNTCTRL_PCNT2CLKEN_MASK 0x10UL
#define	_CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT 0x00000000UL
#define	CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT << 4)
#define	CMU_PCNTCTRL_PCNT2CLKSEL (0x1UL << 5)
#define	_CMU_PCNTCTRL_PCNT2CLKSEL_SHIFT 5
#define	_CMU_PCNTCTRL_PCNT2CLKSEL_MASK 0x20UL
#define	_CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK 0x00000000UL
#define	_CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 0x00000001UL
#define	CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT << 5)
#define	CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK << 5)
#define	CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 (_CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 << 5)
#define	_CMU_LCDCTRL_RESETVALUE 0x00000020UL
#define	_CMU_LCDCTRL_MASK 0x0000007FUL
#define	_CMU_LCDCTRL_FDIV_SHIFT 0
#define	_CMU_LCDCTRL_FDIV_MASK 0x7UL
#define	_CMU_LCDCTRL_FDIV_DEFAULT 0x00000000UL
#define	CMU_LCDCTRL_FDIV_DEFAULT (_CMU_LCDCTRL_FDIV_DEFAULT << 0)
#define	CMU_LCDCTRL_VBOOSTEN (0x1UL << 3)
#define	_CMU_LCDCTRL_VBOOSTEN_SHIFT 3
#define	_CMU_LCDCTRL_VBOOSTEN_MASK 0x8UL
#define	_CMU_LCDCTRL_VBOOSTEN_DEFAULT 0x00000000UL
#define	CMU_LCDCTRL_VBOOSTEN_DEFAULT (_CMU_LCDCTRL_VBOOSTEN_DEFAULT << 3)
#define	_CMU_LCDCTRL_VBFDIV_SHIFT 4
#define	_CMU_LCDCTRL_VBFDIV_MASK 0x70UL
#define	_CMU_LCDCTRL_VBFDIV_DIV1 0x00000000UL
#define	_CMU_LCDCTRL_VBFDIV_DIV2 0x00000001UL
#define	_CMU_LCDCTRL_VBFDIV_DEFAULT 0x00000002UL
#define	_CMU_LCDCTRL_VBFDIV_DIV4 0x00000002UL
#define	_CMU_LCDCTRL_VBFDIV_DIV8 0x00000003UL
#define	_CMU_LCDCTRL_VBFDIV_DIV16 0x00000004UL
#define	_CMU_LCDCTRL_VBFDIV_DIV32 0x00000005UL
#define	_CMU_LCDCTRL_VBFDIV_DIV64 0x00000006UL
#define	_CMU_LCDCTRL_VBFDIV_DIV128 0x00000007UL
#define	CMU_LCDCTRL_VBFDIV_DIV1 (_CMU_LCDCTRL_VBFDIV_DIV1 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV2 (_CMU_LCDCTRL_VBFDIV_DIV2 << 4)
#define	CMU_LCDCTRL_VBFDIV_DEFAULT (_CMU_LCDCTRL_VBFDIV_DEFAULT << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV4 (_CMU_LCDCTRL_VBFDIV_DIV4 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV8 (_CMU_LCDCTRL_VBFDIV_DIV8 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV16 (_CMU_LCDCTRL_VBFDIV_DIV16 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV32 (_CMU_LCDCTRL_VBFDIV_DIV32 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV64 (_CMU_LCDCTRL_VBFDIV_DIV64 << 4)
#define	CMU_LCDCTRL_VBFDIV_DIV128 (_CMU_LCDCTRL_VBFDIV_DIV128 << 4)
#define	_CMU_ROUTE_RESETVALUE 0x00000000UL
#define	_CMU_ROUTE_MASK 0x00000007UL
#define	CMU_ROUTE_CLKOUT0PEN (0x1UL << 0)
#define	_CMU_ROUTE_CLKOUT0PEN_SHIFT 0
#define	_CMU_ROUTE_CLKOUT0PEN_MASK 0x1UL
#define	_CMU_ROUTE_CLKOUT0PEN_DEFAULT 0x00000000UL
#define	CMU_ROUTE_CLKOUT0PEN_DEFAULT (_CMU_ROUTE_CLKOUT0PEN_DEFAULT << 0)
#define	CMU_ROUTE_CLKOUT1PEN (0x1UL << 1)
#define	_CMU_ROUTE_CLKOUT1PEN_SHIFT 1
#define	_CMU_ROUTE_CLKOUT1PEN_MASK 0x2UL
#define	_CMU_ROUTE_CLKOUT1PEN_DEFAULT 0x00000000UL
#define	CMU_ROUTE_CLKOUT1PEN_DEFAULT (_CMU_ROUTE_CLKOUT1PEN_DEFAULT << 1)
#define	CMU_ROUTE_LOCATION (0x1UL << 2)
#define	_CMU_ROUTE_LOCATION_SHIFT 2
#define	_CMU_ROUTE_LOCATION_MASK 0x4UL
#define	_CMU_ROUTE_LOCATION_DEFAULT 0x00000000UL
#define	_CMU_ROUTE_LOCATION_LOC0 0x00000000UL
#define	_CMU_ROUTE_LOCATION_LOC1 0x00000001UL
#define	CMU_ROUTE_LOCATION_DEFAULT (_CMU_ROUTE_LOCATION_DEFAULT << 2)
#define	CMU_ROUTE_LOCATION_LOC0 (_CMU_ROUTE_LOCATION_LOC0 << 2)
#define	CMU_ROUTE_LOCATION_LOC1 (_CMU_ROUTE_LOCATION_LOC1 << 2)
#define	_CMU_LOCK_RESETVALUE 0x00000000UL
#define	_CMU_LOCK_MASK 0x0000FFFFUL
#define	_CMU_LOCK_LOCKKEY_SHIFT 0
#define	_CMU_LOCK_LOCKKEY_MASK 0xFFFFUL
#define	_CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL
#define	_CMU_LOCK_LOCKKEY_LOCK 0x00000000UL
#define	_CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL
#define	_CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL
#define	_CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL
#define	CMU_LOCK_LOCKKEY_DEFAULT (_CMU_LOCK_LOCKKEY_DEFAULT << 0)
#define	CMU_LOCK_LOCKKEY_LOCK (_CMU_LOCK_LOCKKEY_LOCK << 0)
#define	CMU_LOCK_LOCKKEY_UNLOCKED (_CMU_LOCK_LOCKKEY_UNLOCKED << 0)
#define	CMU_LOCK_LOCKKEY_LOCKED (_CMU_LOCK_LOCKKEY_LOCKED << 0)
#define	CMU_LOCK_LOCKKEY_UNLOCK (_CMU_LOCK_LOCKKEY_UNLOCK << 0)
#define	CMU_UNLOCK_CODE 0x580E

Detailed Description

CMU_TypeDef.

Define Documentation

#define _CMU_AUXHFRCOCTRL_MASK 0x000000FFUL

Mask for CMU_AUXHFRCOCTRL

Definition at line 7549 of file efm32g890f128.h.

#define _CMU_AUXHFRCOCTRL_RESETVALUE 0x00000080UL

Default value for CMU_AUXHFRCOCTRL

Definition at line 7548 of file efm32g890f128.h.

#define _CMU_AUXHFRCOCTRL_TUNING_DEFAULT 0x00000080UL

Mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 7552 of file efm32g890f128.h.

#define _CMU_AUXHFRCOCTRL_TUNING_MASK 0xFFUL

Bit mask for CMU_TUNING

Definition at line 7551 of file efm32g890f128.h.

#define _CMU_AUXHFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 7550 of file efm32g890f128.h.

#define _CMU_CALCNT_CALCNT_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCNT

Definition at line 7578 of file efm32g890f128.h.

#define _CMU_CALCNT_CALCNT_MASK 0xFFFFFUL

Bit mask for CMU_CALCNT

Definition at line 7577 of file efm32g890f128.h.

#define _CMU_CALCNT_CALCNT_SHIFT 0

Shift value for CMU_CALCNT

Definition at line 7576 of file efm32g890f128.h.

#define _CMU_CALCNT_MASK 0x000FFFFFUL

Mask for CMU_CALCNT

Definition at line 7575 of file efm32g890f128.h.

#define _CMU_CALCNT_RESETVALUE 0x00000000UL

Default value for CMU_CALCNT

Definition at line 7574 of file efm32g890f128.h.

#define _CMU_CALCTRL_MASK 0x00000007UL

Mask for CMU_CALCTRL

Definition at line 7557 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_AUXHFRCO 0x00000004UL

Mode AUXHFRCO for CMU_CALCTRL

Definition at line 7565 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CALCTRL

Definition at line 7560 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_HFRCO 0x00000002UL

Mode HFRCO for CMU_CALCTRL

Definition at line 7563 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_HFXO 0x00000000UL

Mode HFXO for CMU_CALCTRL

Definition at line 7561 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_LFRCO 0x00000003UL

Mode LFRCO for CMU_CALCTRL

Definition at line 7564 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_LFXO 0x00000001UL

Mode LFXO for CMU_CALCTRL

Definition at line 7562 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_MASK 0x7UL

Bit mask for CMU_REFSEL

Definition at line 7559 of file efm32g890f128.h.

#define _CMU_CALCTRL_REFSEL_SHIFT 0

Shift value for CMU_REFSEL

Definition at line 7558 of file efm32g890f128.h.

#define _CMU_CALCTRL_RESETVALUE 0x00000000UL

Default value for CMU_CALCTRL

Definition at line 7556 of file efm32g890f128.h.

#define _CMU_CMD_CALSTART_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CMD

Definition at line 7653 of file efm32g890f128.h.

#define _CMU_CMD_CALSTART_MASK 0x8UL

Bit mask for CMU_CALSTART

Definition at line 7652 of file efm32g890f128.h.

#define _CMU_CMD_CALSTART_SHIFT 3

Shift value for CMU_CALSTART

Definition at line 7651 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CMD

Definition at line 7640 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_HFRCO 0x00000001UL

Mode HFRCO for CMU_CMD

Definition at line 7641 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_HFXO 0x00000002UL

Mode HFXO for CMU_CMD

Definition at line 7642 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_LFRCO 0x00000003UL

Mode LFRCO for CMU_CMD

Definition at line 7643 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_LFXO 0x00000004UL

Mode LFXO for CMU_CMD

Definition at line 7644 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_MASK 0x7UL

Bit mask for CMU_HFCLKSEL

Definition at line 7639 of file efm32g890f128.h.

#define _CMU_CMD_HFCLKSEL_SHIFT 0

Shift value for CMU_HFCLKSEL

Definition at line 7638 of file efm32g890f128.h.

#define _CMU_CMD_MASK 0x0000000FUL

Mask for CMU_CMD

Definition at line 7637 of file efm32g890f128.h.

#define _CMU_CMD_RESETVALUE 0x00000000UL

Default value for CMU_CMD

Definition at line 7636 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7424 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFCLK16 0x00000005UL

Mode HFCLK16 for CMU_CTRL

Definition at line 7430 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFCLK2 0x00000002UL

Mode HFCLK2 for CMU_CTRL

Definition at line 7427 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFCLK4 0x00000003UL

Mode HFCLK4 for CMU_CTRL

Definition at line 7428 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFCLK8 0x00000004UL

Mode HFCLK8 for CMU_CTRL

Definition at line 7429 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFRCO 0x00000000UL

Mode HFRCO for CMU_CTRL

Definition at line 7425 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_HFXO 0x00000001UL

Mode HFXO for CMU_CTRL

Definition at line 7426 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_MASK 0x700000UL

Bit mask for CMU_CLKOUTSEL0

Definition at line 7423 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_SHIFT 20

Shift value for CMU_CLKOUTSEL0

Definition at line 7422 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL0_ULFRCO 0x00000006UL

Mode ULFRCO for CMU_CTRL

Definition at line 7431 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7443 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL1_LFRCO 0x00000000UL

Mode LFRCO for CMU_CTRL

Definition at line 7444 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL1_LFXO 0x00000001UL

Mode LFXO for CMU_CTRL

Definition at line 7445 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL1_MASK 0x800000UL

Bit mask for CMU_CLKOUTSEL1

Definition at line 7442 of file efm32g890f128.h.

#define _CMU_CTRL_CLKOUTSEL1_SHIFT 23

Shift value for CMU_CLKOUTSEL1

Definition at line 7441 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_100PCENT 0x00000003UL

Mode 100PCENT for CMU_CTRL

Definition at line 7359 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_50PCENT 0x00000000UL

Mode 50PCENT for CMU_CTRL

Definition at line 7355 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_70PCENT 0x00000001UL

Mode 70PCENT for CMU_CTRL

Definition at line 7356 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_80PCENT 0x00000002UL

Mode 80PCENT for CMU_CTRL

Definition at line 7357 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_DEFAULT 0x00000003UL

Mode DEFAULT for CMU_CTRL

Definition at line 7358 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_MASK 0xCUL

Bit mask for CMU_HFXOBOOST

Definition at line 7354 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBOOST_SHIFT 2

Shift value for CMU_HFXOBOOST

Definition at line 7353 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBUFCUR_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_CTRL

Definition at line 7367 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBUFCUR_MASK 0x60UL

Bit mask for CMU_HFXOBUFCUR

Definition at line 7366 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOBUFCUR_SHIFT 5

Shift value for CMU_HFXOBUFCUR

Definition at line 7365 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOGLITCHDETEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7372 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOGLITCHDETEN_MASK 0x80UL

Bit mask for CMU_HFXOGLITCHDETEN

Definition at line 7371 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOGLITCHDETEN_SHIFT 7

Shift value for CMU_HFXOGLITCHDETEN

Definition at line 7370 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_BUFEXTCLK 0x00000001UL

Mode BUFEXTCLK for CMU_CTRL

Definition at line 7347 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7345 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_DIGEXTCLK 0x00000002UL

Mode DIGEXTCLK for CMU_CTRL

Definition at line 7348 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_MASK 0x3UL

Bit mask for CMU_HFXOMODE

Definition at line 7344 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_SHIFT 0

Shift value for CMU_HFXOMODE

Definition at line 7343 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOMODE_XTAL 0x00000000UL

Mode XTAL for CMU_CTRL

Definition at line 7346 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_16KCYCLES 0x00000003UL

Mode 16KCYCLES for CMU_CTRL

Definition at line 7380 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_1KCYCLES 0x00000002UL

Mode 1KCYCLES for CMU_CTRL

Definition at line 7378 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_256CYCLES 0x00000001UL

Mode 256CYCLES for CMU_CTRL

Definition at line 7377 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_8CYCLES 0x00000000UL

Mode 8CYCLES for CMU_CTRL

Definition at line 7376 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_DEFAULT 0x00000003UL

Mode DEFAULT for CMU_CTRL

Definition at line 7379 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_MASK 0x600UL

Bit mask for CMU_HFXOTIMEOUT

Definition at line 7375 of file efm32g890f128.h.

#define _CMU_CTRL_HFXOTIMEOUT_SHIFT 9

Shift value for CMU_HFXOTIMEOUT

Definition at line 7374 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBOOST_100PCENT 0x00000001UL

Mode 100PCENT for CMU_CTRL

Definition at line 7401 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBOOST_70PCENT 0x00000000UL

Mode 70PCENT for CMU_CTRL

Definition at line 7399 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBOOST_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_CTRL

Definition at line 7400 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBOOST_MASK 0x2000UL

Bit mask for CMU_LFXOBOOST

Definition at line 7398 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBOOST_SHIFT 13

Shift value for CMU_LFXOBOOST

Definition at line 7397 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBUFCUR_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7408 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBUFCUR_MASK 0x20000UL

Bit mask for CMU_LFXOBUFCUR

Definition at line 7407 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOBUFCUR_SHIFT 17

Shift value for CMU_LFXOBUFCUR

Definition at line 7406 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_BUFEXTCLK 0x00000001UL

Mode BUFEXTCLK for CMU_CTRL

Definition at line 7390 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_CTRL

Definition at line 7388 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_DIGEXTCLK 0x00000002UL

Mode DIGEXTCLK for CMU_CTRL

Definition at line 7391 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_MASK 0x1800UL

Bit mask for CMU_LFXOMODE

Definition at line 7387 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_SHIFT 11

Shift value for CMU_LFXOMODE

Definition at line 7386 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOMODE_XTAL 0x00000000UL

Mode XTAL for CMU_CTRL

Definition at line 7389 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_16KCYCLES 0x00000002UL

Mode 16KCYCLES for CMU_CTRL

Definition at line 7414 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_1KCYCLES 0x00000001UL

Mode 1KCYCLES for CMU_CTRL

Definition at line 7413 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_32KCYCLES 0x00000003UL

Mode 32KCYCLES for CMU_CTRL

Definition at line 7416 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_8CYCLES 0x00000000UL

Mode 8CYCLES for CMU_CTRL

Definition at line 7412 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_DEFAULT 0x00000003UL

Mode DEFAULT for CMU_CTRL

Definition at line 7415 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_MASK 0xC0000UL

Bit mask for CMU_LFXOTIMEOUT

Definition at line 7411 of file efm32g890f128.h.

#define _CMU_CTRL_LFXOTIMEOUT_SHIFT 18

Shift value for CMU_LFXOTIMEOUT

Definition at line 7410 of file efm32g890f128.h.

#define _CMU_CTRL_MASK 0x00FE3EEFUL

Mask for CMU_CTRL

Definition at line 7342 of file efm32g890f128.h.

#define _CMU_CTRL_RESETVALUE 0x000C262CUL

Default value for CMU_CTRL

Definition at line 7341 of file efm32g890f128.h.

#define _CMU_FREEZE_MASK 0x00000001UL

Mask for CMU_FREEZE

Definition at line 8028 of file efm32g890f128.h.

#define _CMU_FREEZE_REGFREEZE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_FREEZE

Definition at line 8032 of file efm32g890f128.h.

#define _CMU_FREEZE_REGFREEZE_FREEZE 0x00000001UL

Mode FREEZE for CMU_FREEZE

Definition at line 8034 of file efm32g890f128.h.

#define _CMU_FREEZE_REGFREEZE_MASK 0x1UL

Bit mask for CMU_REGFREEZE

Definition at line 8031 of file efm32g890f128.h.

#define _CMU_FREEZE_REGFREEZE_SHIFT 0

Shift value for CMU_REGFREEZE

Definition at line 8030 of file efm32g890f128.h.

#define _CMU_FREEZE_REGFREEZE_UPDATE 0x00000000UL

Mode UPDATE for CMU_FREEZE

Definition at line 8033 of file efm32g890f128.h.

#define _CMU_FREEZE_RESETVALUE 0x00000000UL

Default value for CMU_FREEZE

Definition at line 8027 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCORECLKDIV

Definition at line 7455 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK 0x00000000UL

Mode HFCLK for CMU_HFCORECLKDIV

Definition at line 7456 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 0x00000007UL

Mode HFCLK128 for CMU_HFCORECLKDIV

Definition at line 7463 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 0x00000004UL

Mode HFCLK16 for CMU_HFCORECLKDIV

Definition at line 7460 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 0x00000001UL

Mode HFCLK2 for CMU_HFCORECLKDIV

Definition at line 7457 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 0x00000008UL

Mode HFCLK256 for CMU_HFCORECLKDIV

Definition at line 7464 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 0x00000005UL

Mode HFCLK32 for CMU_HFCORECLKDIV

Definition at line 7461 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 0x00000002UL

Mode HFCLK4 for CMU_HFCORECLKDIV

Definition at line 7458 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 0x00000009UL

Mode HFCLK512 for CMU_HFCORECLKDIV

Definition at line 7465 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 0x00000006UL

Mode HFCLK64 for CMU_HFCORECLKDIV

Definition at line 7462 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 0x00000003UL

Mode HFCLK8 for CMU_HFCORECLKDIV

Definition at line 7459 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_MASK 0xFUL

Bit mask for CMU_HFCORECLKDIV

Definition at line 7454 of file efm32g890f128.h.

Referenced by SystemCoreClockGet().

#define _CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT 0

Shift value for CMU_HFCORECLKDIV

Definition at line 7453 of file efm32g890f128.h.

Referenced by SystemCoreClockGet().

#define _CMU_HFCORECLKDIV_MASK 0x0000000FUL

Mask for CMU_HFCORECLKDIV

Definition at line 7452 of file efm32g890f128.h.

#define _CMU_HFCORECLKDIV_RESETVALUE 0x00000000UL

Default value for CMU_HFCORECLKDIV

Definition at line 7451 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_AES_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7905 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_AES_MASK 0x1UL

Bit mask for CMU_AES

Definition at line 7904 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_AES_SHIFT 0

Shift value for CMU_AES

Definition at line 7903 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_DMA_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7910 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_DMA_MASK 0x2UL

Bit mask for CMU_DMA

Definition at line 7909 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_DMA_SHIFT 1

Shift value for CMU_DMA

Definition at line 7908 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_EBI_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7920 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_EBI_MASK 0x8UL

Bit mask for CMU_EBI

Definition at line 7919 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_EBI_SHIFT 3

Shift value for CMU_EBI

Definition at line 7918 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_LE_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7915 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_LE_MASK 0x4UL

Bit mask for CMU_LE

Definition at line 7914 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_LE_SHIFT 2

Shift value for CMU_LE

Definition at line 7913 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_MASK 0x0000000FUL

Mask for CMU_HFCORECLKEN0

Definition at line 7901 of file efm32g890f128.h.

#define _CMU_HFCORECLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_HFCORECLKEN0

Definition at line 7900 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKDIV

Definition at line 7483 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK 0x00000000UL

Mode HFCLK for CMU_HFPERCLKDIV

Definition at line 7484 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 0x00000007UL

Mode HFCLK128 for CMU_HFPERCLKDIV

Definition at line 7491 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 0x00000004UL

Mode HFCLK16 for CMU_HFPERCLKDIV

Definition at line 7488 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 0x00000001UL

Mode HFCLK2 for CMU_HFPERCLKDIV

Definition at line 7485 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 0x00000008UL

Mode HFCLK256 for CMU_HFPERCLKDIV

Definition at line 7492 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 0x00000005UL

Mode HFCLK32 for CMU_HFPERCLKDIV

Definition at line 7489 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 0x00000002UL

Mode HFCLK4 for CMU_HFPERCLKDIV

Definition at line 7486 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 0x00000009UL

Mode HFCLK512 for CMU_HFPERCLKDIV

Definition at line 7493 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 0x00000006UL

Mode HFCLK64 for CMU_HFPERCLKDIV

Definition at line 7490 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 0x00000003UL

Mode HFCLK8 for CMU_HFPERCLKDIV

Definition at line 7487 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK 0xFUL

Bit mask for CMU_HFPERCLKDIV

Definition at line 7482 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT 0

Shift value for CMU_HFPERCLKDIV

Definition at line 7481 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_HFPERCLKDIV

Definition at line 7508 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKEN_MASK 0x100UL

Bit mask for CMU_HFPERCLKEN

Definition at line 7507 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_HFPERCLKEN_SHIFT 8

Shift value for CMU_HFPERCLKEN

Definition at line 7506 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_MASK 0x0000010FUL

Mask for CMU_HFPERCLKDIV

Definition at line 7480 of file efm32g890f128.h.

#define _CMU_HFPERCLKDIV_RESETVALUE 0x00000100UL

Default value for CMU_HFPERCLKDIV

Definition at line 7479 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7964 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP0_MASK 0x80UL

Bit mask for CMU_ACMP0

Definition at line 7963 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP0_SHIFT 7

Shift value for CMU_ACMP0

Definition at line 7962 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7969 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP1_MASK 0x100UL

Bit mask for CMU_ACMP1

Definition at line 7968 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ACMP1_SHIFT 8

Shift value for CMU_ACMP1

Definition at line 7967 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ADC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7994 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ADC0_MASK 0x4000UL

Bit mask for CMU_ADC0

Definition at line 7993 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_ADC0_SHIFT 14

Shift value for CMU_ADC0

Definition at line 7992 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_DAC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7979 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_DAC0_MASK 0x800UL

Bit mask for CMU_DAC0

Definition at line 7978 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_DAC0_SHIFT 11

Shift value for CMU_DAC0

Definition at line 7977 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_GPIO_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7984 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_GPIO_MASK 0x1000UL

Bit mask for CMU_GPIO

Definition at line 7983 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_GPIO_SHIFT 12

Shift value for CMU_GPIO

Definition at line 7982 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_I2C0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7999 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_I2C0_MASK 0x8000UL

Bit mask for CMU_I2C0

Definition at line 7998 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_I2C0_SHIFT 15

Shift value for CMU_I2C0

Definition at line 7997 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_MASK 0x0000FFFFUL

Mask for CMU_HFPERCLKEN0

Definition at line 7925 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_PRS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7974 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_PRS_MASK 0x400UL

Bit mask for CMU_PRS

Definition at line 7973 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_PRS_SHIFT 10

Shift value for CMU_PRS

Definition at line 7972 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_HFPERCLKEN0

Definition at line 7924 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7949 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER0_MASK 0x10UL

Bit mask for CMU_TIMER0

Definition at line 7948 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER0_SHIFT 4

Shift value for CMU_TIMER0

Definition at line 7947 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7954 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER1_MASK 0x20UL

Bit mask for CMU_TIMER1

Definition at line 7953 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER1_SHIFT 5

Shift value for CMU_TIMER1

Definition at line 7952 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7959 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER2_MASK 0x40UL

Bit mask for CMU_TIMER2

Definition at line 7958 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_TIMER2_SHIFT 6

Shift value for CMU_TIMER2

Definition at line 7957 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_UART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7944 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_UART0_MASK 0x8UL

Bit mask for CMU_UART0

Definition at line 7943 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_UART0_SHIFT 3

Shift value for CMU_UART0

Definition at line 7942 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7929 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART0_MASK 0x1UL

Bit mask for CMU_USART0

Definition at line 7928 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART0_SHIFT 0

Shift value for CMU_USART0

Definition at line 7927 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7934 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART1_MASK 0x2UL

Bit mask for CMU_USART1

Definition at line 7933 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART1_SHIFT 1

Shift value for CMU_USART1

Definition at line 7932 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART2_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7939 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART2_MASK 0x4UL

Bit mask for CMU_USART2

Definition at line 7938 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_USART2_SHIFT 2

Shift value for CMU_USART2

Definition at line 7937 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_VCMP_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7989 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_VCMP_MASK 0x2000UL

Bit mask for CMU_VCMP

Definition at line 7988 of file efm32g890f128.h.

#define _CMU_HFPERCLKEN0_VCMP_SHIFT 13

Shift value for CMU_VCMP

Definition at line 7987 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_11MHZ 0x00000002UL

Mode 11MHZ for CMU_HFRCOCTRL

Definition at line 7522 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_14MHZ 0x00000003UL

Mode 14MHZ for CMU_HFRCOCTRL

Definition at line 7524 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_1MHZ 0x00000000UL

Mode 1MHZ for CMU_HFRCOCTRL

Definition at line 7520 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_21MHZ 0x00000004UL

Mode 21MHZ for CMU_HFRCOCTRL

Definition at line 7525 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_28MHZ 0x00000005UL

Mode 28MHZ for CMU_HFRCOCTRL

Definition at line 7526 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_7MHZ 0x00000001UL

Mode 7MHZ for CMU_HFRCOCTRL

Definition at line 7521 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_DEFAULT 0x00000003UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7523 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_BAND_MASK 0x700UL

Bit mask for CMU_BAND

Definition at line 7519 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define _CMU_HFRCOCTRL_BAND_SHIFT 8

Shift value for CMU_BAND

Definition at line 7518 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_MASK 0x0001F7FFUL

Mask for CMU_HFRCOCTRL

Definition at line 7513 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_RESETVALUE 0x00000380UL

Default value for CMU_HFRCOCTRL

Definition at line 7512 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_SUDELAY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7536 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_SUDELAY_MASK 0x1F000UL

Bit mask for CMU_SUDELAY

Definition at line 7535 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_SUDELAY_SHIFT 12

Shift value for CMU_SUDELAY

Definition at line 7534 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_TUNING_DEFAULT 0x00000080UL

Mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7516 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_TUNING_MASK 0xFFUL

Bit mask for CMU_TUNING

Definition at line 7515 of file efm32g890f128.h.

#define _CMU_HFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 7514 of file efm32g890f128.h.

#define _CMU_IEN_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7891 of file efm32g890f128.h.

#define _CMU_IEN_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 7890 of file efm32g890f128.h.

#define _CMU_IEN_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 7889 of file efm32g890f128.h.

#define _CMU_IEN_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7896 of file efm32g890f128.h.

#define _CMU_IEN_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 7895 of file efm32g890f128.h.

#define _CMU_IEN_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 7894 of file efm32g890f128.h.

#define _CMU_IEN_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7871 of file efm32g890f128.h.

#define _CMU_IEN_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 7870 of file efm32g890f128.h.

#define _CMU_IEN_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 7869 of file efm32g890f128.h.

#define _CMU_IEN_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7876 of file efm32g890f128.h.

#define _CMU_IEN_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 7875 of file efm32g890f128.h.

#define _CMU_IEN_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 7874 of file efm32g890f128.h.

#define _CMU_IEN_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7881 of file efm32g890f128.h.

#define _CMU_IEN_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 7880 of file efm32g890f128.h.

#define _CMU_IEN_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 7879 of file efm32g890f128.h.

#define _CMU_IEN_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IEN

Definition at line 7886 of file efm32g890f128.h.

#define _CMU_IEN_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 7885 of file efm32g890f128.h.

#define _CMU_IEN_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 7884 of file efm32g890f128.h.

#define _CMU_IEN_MASK 0x0000003FUL

Mask for CMU_IEN

Definition at line 7867 of file efm32g890f128.h.

#define _CMU_IEN_RESETVALUE 0x00000000UL

Default value for CMU_IEN

Definition at line 7866 of file efm32g890f128.h.

#define _CMU_IF_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 7789 of file efm32g890f128.h.

#define _CMU_IF_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 7788 of file efm32g890f128.h.

#define _CMU_IF_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 7787 of file efm32g890f128.h.

#define _CMU_IF_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 7794 of file efm32g890f128.h.

#define _CMU_IF_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 7793 of file efm32g890f128.h.

#define _CMU_IF_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 7792 of file efm32g890f128.h.

#define _CMU_IF_HFRCORDY_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_IF

Definition at line 7769 of file efm32g890f128.h.

#define _CMU_IF_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 7768 of file efm32g890f128.h.

#define _CMU_IF_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 7767 of file efm32g890f128.h.

#define _CMU_IF_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 7774 of file efm32g890f128.h.

#define _CMU_IF_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 7773 of file efm32g890f128.h.

#define _CMU_IF_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 7772 of file efm32g890f128.h.

#define _CMU_IF_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 7779 of file efm32g890f128.h.

#define _CMU_IF_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 7778 of file efm32g890f128.h.

#define _CMU_IF_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 7777 of file efm32g890f128.h.

#define _CMU_IF_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IF

Definition at line 7784 of file efm32g890f128.h.

#define _CMU_IF_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 7783 of file efm32g890f128.h.

#define _CMU_IF_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 7782 of file efm32g890f128.h.

#define _CMU_IF_MASK 0x0000003FUL

Mask for CMU_IF

Definition at line 7765 of file efm32g890f128.h.

#define _CMU_IF_RESETVALUE 0x00000001UL

Default value for CMU_IF

Definition at line 7764 of file efm32g890f128.h.

#define _CMU_IFC_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7857 of file efm32g890f128.h.

#define _CMU_IFC_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 7856 of file efm32g890f128.h.

#define _CMU_IFC_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 7855 of file efm32g890f128.h.

#define _CMU_IFC_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7862 of file efm32g890f128.h.

#define _CMU_IFC_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 7861 of file efm32g890f128.h.

#define _CMU_IFC_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 7860 of file efm32g890f128.h.

#define _CMU_IFC_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7837 of file efm32g890f128.h.

#define _CMU_IFC_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 7836 of file efm32g890f128.h.

#define _CMU_IFC_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 7835 of file efm32g890f128.h.

#define _CMU_IFC_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7842 of file efm32g890f128.h.

#define _CMU_IFC_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 7841 of file efm32g890f128.h.

#define _CMU_IFC_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 7840 of file efm32g890f128.h.

#define _CMU_IFC_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7847 of file efm32g890f128.h.

#define _CMU_IFC_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 7846 of file efm32g890f128.h.

#define _CMU_IFC_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 7845 of file efm32g890f128.h.

#define _CMU_IFC_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFC

Definition at line 7852 of file efm32g890f128.h.

#define _CMU_IFC_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 7851 of file efm32g890f128.h.

#define _CMU_IFC_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 7850 of file efm32g890f128.h.

#define _CMU_IFC_MASK 0x0000003FUL

Mask for CMU_IFC

Definition at line 7833 of file efm32g890f128.h.

#define _CMU_IFC_RESETVALUE 0x00000000UL

Default value for CMU_IFC

Definition at line 7832 of file efm32g890f128.h.

#define _CMU_IFS_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7823 of file efm32g890f128.h.

#define _CMU_IFS_AUXHFRCORDY_MASK 0x10UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 7822 of file efm32g890f128.h.

#define _CMU_IFS_AUXHFRCORDY_SHIFT 4

Shift value for CMU_AUXHFRCORDY

Definition at line 7821 of file efm32g890f128.h.

#define _CMU_IFS_CALRDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7828 of file efm32g890f128.h.

#define _CMU_IFS_CALRDY_MASK 0x20UL

Bit mask for CMU_CALRDY

Definition at line 7827 of file efm32g890f128.h.

#define _CMU_IFS_CALRDY_SHIFT 5

Shift value for CMU_CALRDY

Definition at line 7826 of file efm32g890f128.h.

#define _CMU_IFS_HFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7803 of file efm32g890f128.h.

#define _CMU_IFS_HFRCORDY_MASK 0x1UL

Bit mask for CMU_HFRCORDY

Definition at line 7802 of file efm32g890f128.h.

#define _CMU_IFS_HFRCORDY_SHIFT 0

Shift value for CMU_HFRCORDY

Definition at line 7801 of file efm32g890f128.h.

#define _CMU_IFS_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7808 of file efm32g890f128.h.

#define _CMU_IFS_HFXORDY_MASK 0x2UL

Bit mask for CMU_HFXORDY

Definition at line 7807 of file efm32g890f128.h.

#define _CMU_IFS_HFXORDY_SHIFT 1

Shift value for CMU_HFXORDY

Definition at line 7806 of file efm32g890f128.h.

#define _CMU_IFS_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7813 of file efm32g890f128.h.

#define _CMU_IFS_LFRCORDY_MASK 0x4UL

Bit mask for CMU_LFRCORDY

Definition at line 7812 of file efm32g890f128.h.

#define _CMU_IFS_LFRCORDY_SHIFT 2

Shift value for CMU_LFRCORDY

Definition at line 7811 of file efm32g890f128.h.

#define _CMU_IFS_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_IFS

Definition at line 7818 of file efm32g890f128.h.

#define _CMU_IFS_LFXORDY_MASK 0x8UL

Bit mask for CMU_LFXORDY

Definition at line 7817 of file efm32g890f128.h.

#define _CMU_IFS_LFXORDY_SHIFT 3

Shift value for CMU_LFXORDY

Definition at line 7816 of file efm32g890f128.h.

#define _CMU_IFS_MASK 0x0000003FUL

Mask for CMU_IFS

Definition at line 7799 of file efm32g890f128.h.

#define _CMU_IFS_RESETVALUE 0x00000000UL

Default value for CMU_IFS

Definition at line 7798 of file efm32g890f128.h.

#define _CMU_LCDCTRL_FDIV_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LCDCTRL

Definition at line 8229 of file efm32g890f128.h.

#define _CMU_LCDCTRL_FDIV_MASK 0x7UL

Bit mask for CMU_FDIV

Definition at line 8228 of file efm32g890f128.h.

#define _CMU_LCDCTRL_FDIV_SHIFT 0

Shift value for CMU_FDIV

Definition at line 8227 of file efm32g890f128.h.

#define _CMU_LCDCTRL_MASK 0x0000007FUL

Mask for CMU_LCDCTRL

Definition at line 8226 of file efm32g890f128.h.

#define _CMU_LCDCTRL_RESETVALUE 0x00000020UL

Default value for CMU_LCDCTRL

Definition at line 8225 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DEFAULT 0x00000002UL

Mode DEFAULT for CMU_LCDCTRL

Definition at line 8240 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV1 0x00000000UL

Mode DIV1 for CMU_LCDCTRL

Definition at line 8238 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV128 0x00000007UL

Mode DIV128 for CMU_LCDCTRL

Definition at line 8246 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV16 0x00000004UL

Mode DIV16 for CMU_LCDCTRL

Definition at line 8243 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV2 0x00000001UL

Mode DIV2 for CMU_LCDCTRL

Definition at line 8239 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV32 0x00000005UL

Mode DIV32 for CMU_LCDCTRL

Definition at line 8244 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV4 0x00000002UL

Mode DIV4 for CMU_LCDCTRL

Definition at line 8241 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV64 0x00000006UL

Mode DIV64 for CMU_LCDCTRL

Definition at line 8245 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_DIV8 0x00000003UL

Mode DIV8 for CMU_LCDCTRL

Definition at line 8242 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_MASK 0x70UL

Bit mask for CMU_VBFDIV

Definition at line 8237 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBFDIV_SHIFT 4

Shift value for CMU_VBFDIV

Definition at line 8236 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBOOSTEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LCDCTRL

Definition at line 8234 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBOOSTEN_MASK 0x8UL

Bit mask for CMU_VBOOSTEN

Definition at line 8233 of file efm32g890f128.h.

#define _CMU_LCDCTRL_VBOOSTEN_SHIFT 3

Shift value for CMU_VBOOSTEN

Definition at line 8232 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LCD_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 8055 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LCD_MASK 0x4UL

Bit mask for CMU_LCD

Definition at line 8054 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LCD_SHIFT 2

Shift value for CMU_LCD

Definition at line 8053 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LETIMER0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 8050 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LETIMER0_MASK 0x2UL

Bit mask for CMU_LETIMER0

Definition at line 8049 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_LETIMER0_SHIFT 1

Shift value for CMU_LETIMER0

Definition at line 8048 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_MASK 0x00000007UL

Mask for CMU_LFACLKEN0

Definition at line 8041 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFACLKEN0

Definition at line 8040 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_RTC_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFACLKEN0

Definition at line 8045 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_RTC_MASK 0x1UL

Bit mask for CMU_RTC

Definition at line 8044 of file efm32g890f128.h.

#define _CMU_LFACLKEN0_RTC_SHIFT 0

Shift value for CMU_RTC

Definition at line 8043 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_DIV128 0x00000003UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 8148 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_DIV16 0x00000000UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 8145 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_DIV32 0x00000001UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 8146 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_DIV64 0x00000002UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 8147 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_MASK 0x300UL

Bit mask for CMU_LCD

Definition at line 8144 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LCD_SHIFT 8

Shift value for CMU_LCD

Definition at line 8143 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 8111 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV1024 0x0000000AUL

Mode DIV1024 for CMU_LFAPRESC0

Definition at line 8121 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 8118 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 8115 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV16384 0x0000000EUL

Mode DIV16384 for CMU_LFAPRESC0

Definition at line 8125 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 8112 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV2048 0x0000000BUL

Mode DIV2048 for CMU_LFAPRESC0

Definition at line 8122 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV256 0x00000008UL

Mode DIV256 for CMU_LFAPRESC0

Definition at line 8119 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 8116 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV32768 0x0000000FUL

Mode DIV32768 for CMU_LFAPRESC0

Definition at line 8126 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 8113 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV4096 0x0000000CUL

Mode DIV4096 for CMU_LFAPRESC0

Definition at line 8123 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV512 0x00000009UL

Mode DIV512 for CMU_LFAPRESC0

Definition at line 8120 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 8117 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 8114 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_DIV8192 0x0000000DUL

Mode DIV8192 for CMU_LFAPRESC0

Definition at line 8124 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_MASK 0xF0UL

Bit mask for CMU_LETIMER0

Definition at line 8110 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_LETIMER0_SHIFT 4

Shift value for CMU_LETIMER0

Definition at line 8109 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_MASK 0x000003FFUL

Mask for CMU_LFAPRESC0

Definition at line 8074 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RESETVALUE 0x00000000UL

Default value for CMU_LFAPRESC0

Definition at line 8073 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV1 0x00000000UL

Mode DIV1 for CMU_LFAPRESC0

Definition at line 8077 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV1024 0x0000000AUL

Mode DIV1024 for CMU_LFAPRESC0

Definition at line 8087 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV128 0x00000007UL

Mode DIV128 for CMU_LFAPRESC0

Definition at line 8084 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV16 0x00000004UL

Mode DIV16 for CMU_LFAPRESC0

Definition at line 8081 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV16384 0x0000000EUL

Mode DIV16384 for CMU_LFAPRESC0

Definition at line 8091 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV2 0x00000001UL

Mode DIV2 for CMU_LFAPRESC0

Definition at line 8078 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV2048 0x0000000BUL

Mode DIV2048 for CMU_LFAPRESC0

Definition at line 8088 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV256 0x00000008UL

Mode DIV256 for CMU_LFAPRESC0

Definition at line 8085 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV32 0x00000005UL

Mode DIV32 for CMU_LFAPRESC0

Definition at line 8082 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV32768 0x0000000FUL

Mode DIV32768 for CMU_LFAPRESC0

Definition at line 8092 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV4 0x00000002UL

Mode DIV4 for CMU_LFAPRESC0

Definition at line 8079 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV4096 0x0000000CUL

Mode DIV4096 for CMU_LFAPRESC0

Definition at line 8089 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV512 0x00000009UL

Mode DIV512 for CMU_LFAPRESC0

Definition at line 8086 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV64 0x00000006UL

Mode DIV64 for CMU_LFAPRESC0

Definition at line 8083 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV8 0x00000003UL

Mode DIV8 for CMU_LFAPRESC0

Definition at line 8080 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_DIV8192 0x0000000DUL

Mode DIV8192 for CMU_LFAPRESC0

Definition at line 8090 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_MASK 0xFUL

Bit mask for CMU_RTC

Definition at line 8076 of file efm32g890f128.h.

#define _CMU_LFAPRESC0_RTC_SHIFT 0

Shift value for CMU_RTC

Definition at line 8075 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 8064 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART0_MASK 0x1UL

Bit mask for CMU_LEUART0

Definition at line 8063 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART0_SHIFT 0

Shift value for CMU_LEUART0

Definition at line 8062 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART1_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LFBCLKEN0

Definition at line 8069 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART1_MASK 0x2UL

Bit mask for CMU_LEUART1

Definition at line 8068 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_LEUART1_SHIFT 1

Shift value for CMU_LEUART1

Definition at line 8067 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_MASK 0x00000003UL

Mask for CMU_LFBCLKEN0

Definition at line 8060 of file efm32g890f128.h.

#define _CMU_LFBCLKEN0_RESETVALUE 0x00000000UL

Default value for CMU_LFBCLKEN0

Definition at line 8059 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_DIV1 0x00000000UL

Mode DIV1 for CMU_LFBPRESC0

Definition at line 8159 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_DIV2 0x00000001UL

Mode DIV2 for CMU_LFBPRESC0

Definition at line 8160 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_DIV4 0x00000002UL

Mode DIV4 for CMU_LFBPRESC0

Definition at line 8161 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_DIV8 0x00000003UL

Mode DIV8 for CMU_LFBPRESC0

Definition at line 8162 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_MASK 0x3UL

Bit mask for CMU_LEUART0

Definition at line 8158 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART0_SHIFT 0

Shift value for CMU_LEUART0

Definition at line 8157 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_DIV1 0x00000000UL

Mode DIV1 for CMU_LFBPRESC0

Definition at line 8169 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_DIV2 0x00000001UL

Mode DIV2 for CMU_LFBPRESC0

Definition at line 8170 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_DIV4 0x00000002UL

Mode DIV4 for CMU_LFBPRESC0

Definition at line 8171 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_DIV8 0x00000003UL

Mode DIV8 for CMU_LFBPRESC0

Definition at line 8172 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_MASK 0x30UL

Bit mask for CMU_LEUART1

Definition at line 8168 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_LEUART1_SHIFT 4

Shift value for CMU_LEUART1

Definition at line 8167 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_MASK 0x00000033UL

Mask for CMU_LFBPRESC0

Definition at line 8156 of file efm32g890f128.h.

#define _CMU_LFBPRESC0_RESETVALUE 0x00000000UL

Default value for CMU_LFBPRESC0

Definition at line 8155 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFCLKSEL

Definition at line 7662 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFCLKSEL

Definition at line 7661 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 0x00000003UL

Mode HFCORECLKLEDIV2 for CMU_LFCLKSEL

Definition at line 7665 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFCLKSEL

Definition at line 7663 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_LFXO 0x00000002UL

Mode LFXO for CMU_LFCLKSEL

Definition at line 7664 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_MASK 0x3UL

Bit mask for CMU_LFA

Definition at line 7660 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFA_SHIFT 0

Shift value for CMU_LFA

Definition at line 7659 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_LFCLKSEL

Definition at line 7674 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_DISABLED 0x00000000UL

Mode DISABLED for CMU_LFCLKSEL

Definition at line 7673 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 0x00000003UL

Mode HFCORECLKLEDIV2 for CMU_LFCLKSEL

Definition at line 7677 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_LFRCO 0x00000001UL

Mode LFRCO for CMU_LFCLKSEL

Definition at line 7675 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_LFXO 0x00000002UL

Mode LFXO for CMU_LFCLKSEL

Definition at line 7676 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_MASK 0xCUL

Bit mask for CMU_LFB

Definition at line 7672 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_LFB_SHIFT 2

Shift value for CMU_LFB

Definition at line 7671 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_MASK 0x0000000FUL

Mask for CMU_LFCLKSEL

Definition at line 7658 of file efm32g890f128.h.

#define _CMU_LFCLKSEL_RESETVALUE 0x00000005UL

Default value for CMU_LFCLKSEL

Definition at line 7657 of file efm32g890f128.h.

#define _CMU_LFRCOCTRL_MASK 0x0000007FUL

Mask for CMU_LFRCOCTRL

Definition at line 7541 of file efm32g890f128.h.

#define _CMU_LFRCOCTRL_RESETVALUE 0x00000040UL

Default value for CMU_LFRCOCTRL

Definition at line 7540 of file efm32g890f128.h.

#define _CMU_LFRCOCTRL_TUNING_DEFAULT 0x00000040UL

Mode DEFAULT for CMU_LFRCOCTRL

Definition at line 7544 of file efm32g890f128.h.

#define _CMU_LFRCOCTRL_TUNING_MASK 0x7FUL

Bit mask for CMU_TUNING

Definition at line 7543 of file efm32g890f128.h.

#define _CMU_LFRCOCTRL_TUNING_SHIFT 0

Shift value for CMU_TUNING

Definition at line 7542 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_LOCK

Definition at line 8285 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_LOCK 0x00000000UL

Mode LOCK for CMU_LOCK

Definition at line 8286 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_LOCKED 0x00000001UL

Mode LOCKED for CMU_LOCK

Definition at line 8288 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_MASK 0xFFFFUL

Bit mask for CMU_LOCKKEY

Definition at line 8284 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_SHIFT 0

Shift value for CMU_LOCKKEY

Definition at line 8283 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_UNLOCK 0x0000580EUL

Mode UNLOCK for CMU_LOCK

Definition at line 8289 of file efm32g890f128.h.

#define _CMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL

Mode UNLOCKED for CMU_LOCK

Definition at line 8287 of file efm32g890f128.h.

#define _CMU_LOCK_MASK 0x0000FFFFUL

Mask for CMU_LOCK

Definition at line 8282 of file efm32g890f128.h.

#define _CMU_LOCK_RESETVALUE 0x00000000UL

Default value for CMU_LOCK

Definition at line 8281 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7612 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCODIS_MASK 0x20UL

Bit mask for CMU_AUXHFRCODIS

Definition at line 7611 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCODIS_SHIFT 5

Shift value for CMU_AUXHFRCODIS

Definition at line 7610 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7607 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCOEN_MASK 0x10UL

Bit mask for CMU_AUXHFRCOEN

Definition at line 7606 of file efm32g890f128.h.

#define _CMU_OSCENCMD_AUXHFRCOEN_SHIFT 4

Shift value for CMU_AUXHFRCOEN

Definition at line 7605 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7592 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCODIS_MASK 0x2UL

Bit mask for CMU_HFRCODIS

Definition at line 7591 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCODIS_SHIFT 1

Shift value for CMU_HFRCODIS

Definition at line 7590 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7587 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCOEN_MASK 0x1UL

Bit mask for CMU_HFRCOEN

Definition at line 7586 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFRCOEN_SHIFT 0

Shift value for CMU_HFRCOEN

Definition at line 7585 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7602 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXODIS_MASK 0x8UL

Bit mask for CMU_HFXODIS

Definition at line 7601 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXODIS_SHIFT 3

Shift value for CMU_HFXODIS

Definition at line 7600 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7597 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXOEN_MASK 0x4UL

Bit mask for CMU_HFXOEN

Definition at line 7596 of file efm32g890f128.h.

#define _CMU_OSCENCMD_HFXOEN_SHIFT 2

Shift value for CMU_HFXOEN

Definition at line 7595 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7622 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCODIS_MASK 0x80UL

Bit mask for CMU_LFRCODIS

Definition at line 7621 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCODIS_SHIFT 7

Shift value for CMU_LFRCODIS

Definition at line 7620 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7617 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCOEN_MASK 0x40UL

Bit mask for CMU_LFRCOEN

Definition at line 7616 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFRCOEN_SHIFT 6

Shift value for CMU_LFRCOEN

Definition at line 7615 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXODIS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7632 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXODIS_MASK 0x200UL

Bit mask for CMU_LFXODIS

Definition at line 7631 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXODIS_SHIFT 9

Shift value for CMU_LFXODIS

Definition at line 7630 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXOEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_OSCENCMD

Definition at line 7627 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXOEN_MASK 0x100UL

Bit mask for CMU_LFXOEN

Definition at line 7626 of file efm32g890f128.h.

#define _CMU_OSCENCMD_LFXOEN_SHIFT 8

Shift value for CMU_LFXOEN

Definition at line 7625 of file efm32g890f128.h.

#define _CMU_OSCENCMD_MASK 0x000003FFUL

Mask for CMU_OSCENCMD

Definition at line 7583 of file efm32g890f128.h.

#define _CMU_OSCENCMD_RESETVALUE 0x00000000UL

Default value for CMU_OSCENCMD

Definition at line 7582 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_MASK 0x0000003FUL

Mask for CMU_PCNTCTRL

Definition at line 8180 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8184 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKEN_MASK 0x1UL

Bit mask for CMU_PCNT0CLKEN

Definition at line 8183 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKEN_SHIFT 0

Shift value for CMU_PCNT0CLKEN

Definition at line 8182 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8189 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 8190 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKSEL_MASK 0x2UL

Bit mask for CMU_PCNT0CLKSEL

Definition at line 8188 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 0x00000001UL

Mode PCNT0S0 for CMU_PCNTCTRL

Definition at line 8191 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT0CLKSEL_SHIFT 1

Shift value for CMU_PCNT0CLKSEL

Definition at line 8187 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8198 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKEN_MASK 0x4UL

Bit mask for CMU_PCNT1CLKEN

Definition at line 8197 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKEN_SHIFT 2

Shift value for CMU_PCNT1CLKEN

Definition at line 8196 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8203 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 8204 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKSEL_MASK 0x8UL

Bit mask for CMU_PCNT1CLKSEL

Definition at line 8202 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 0x00000001UL

Mode PCNT1S0 for CMU_PCNTCTRL

Definition at line 8205 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT1CLKSEL_SHIFT 3

Shift value for CMU_PCNT1CLKSEL

Definition at line 8201 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8212 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKEN_MASK 0x10UL

Bit mask for CMU_PCNT2CLKEN

Definition at line 8211 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKEN_SHIFT 4

Shift value for CMU_PCNT2CLKEN

Definition at line 8210 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_PCNTCTRL

Definition at line 8217 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK 0x00000000UL

Mode LFACLK for CMU_PCNTCTRL

Definition at line 8218 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKSEL_MASK 0x20UL

Bit mask for CMU_PCNT2CLKSEL

Definition at line 8216 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 0x00000001UL

Mode PCNT2S0 for CMU_PCNTCTRL

Definition at line 8219 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_PCNT2CLKSEL_SHIFT 5

Shift value for CMU_PCNT2CLKSEL

Definition at line 8215 of file efm32g890f128.h.

#define _CMU_PCNTCTRL_RESETVALUE 0x00000000UL

Default value for CMU_PCNTCTRL

Definition at line 8179 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT0PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTE

Definition at line 8263 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT0PEN_MASK 0x1UL

Bit mask for CMU_CLKOUT0PEN

Definition at line 8262 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT0PEN_SHIFT 0

Shift value for CMU_CLKOUT0PEN

Definition at line 8261 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT1PEN_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTE

Definition at line 8268 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT1PEN_MASK 0x2UL

Bit mask for CMU_CLKOUT1PEN

Definition at line 8267 of file efm32g890f128.h.

#define _CMU_ROUTE_CLKOUT1PEN_SHIFT 1

Shift value for CMU_CLKOUT1PEN

Definition at line 8266 of file efm32g890f128.h.

#define _CMU_ROUTE_LOCATION_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_ROUTE

Definition at line 8273 of file efm32g890f128.h.

#define _CMU_ROUTE_LOCATION_LOC0 0x00000000UL

Mode LOC0 for CMU_ROUTE

Definition at line 8274 of file efm32g890f128.h.

#define _CMU_ROUTE_LOCATION_LOC1 0x00000001UL

Mode LOC1 for CMU_ROUTE

Definition at line 8275 of file efm32g890f128.h.

#define _CMU_ROUTE_LOCATION_MASK 0x4UL

Bit mask for CMU_LOCATION

Definition at line 8272 of file efm32g890f128.h.

#define _CMU_ROUTE_LOCATION_SHIFT 2

Shift value for CMU_LOCATION

Definition at line 8271 of file efm32g890f128.h.

#define _CMU_ROUTE_MASK 0x00000007UL

Mask for CMU_ROUTE

Definition at line 8259 of file efm32g890f128.h.

#define _CMU_ROUTE_RESETVALUE 0x00000000UL

Default value for CMU_ROUTE

Definition at line 8258 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7710 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCOENS_MASK 0x10UL

Bit mask for CMU_AUXHFRCOENS

Definition at line 7709 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCOENS_SHIFT 4

Shift value for CMU_AUXHFRCOENS

Definition at line 7708 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7715 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCORDY_MASK 0x20UL

Bit mask for CMU_AUXHFRCORDY

Definition at line 7714 of file efm32g890f128.h.

#define _CMU_STATUS_AUXHFRCORDY_SHIFT 5

Shift value for CMU_AUXHFRCORDY

Definition at line 7713 of file efm32g890f128.h.

#define _CMU_STATUS_CALBSY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7760 of file efm32g890f128.h.

#define _CMU_STATUS_CALBSY_MASK 0x4000UL

Bit mask for CMU_CALBSY

Definition at line 7759 of file efm32g890f128.h.

#define _CMU_STATUS_CALBSY_SHIFT 14

Shift value for CMU_CALBSY

Definition at line 7758 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOENS_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 7690 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOENS_MASK 0x1UL

Bit mask for CMU_HFRCOENS

Definition at line 7689 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOENS_SHIFT 0

Shift value for CMU_HFRCOENS

Definition at line 7688 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCORDY_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 7695 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCORDY_MASK 0x2UL

Bit mask for CMU_HFRCORDY

Definition at line 7694 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCORDY_SHIFT 1

Shift value for CMU_HFRCORDY

Definition at line 7693 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOSEL_DEFAULT 0x00000001UL

Mode DEFAULT for CMU_STATUS

Definition at line 7740 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOSEL_MASK 0x400UL

Bit mask for CMU_HFRCOSEL

Definition at line 7739 of file efm32g890f128.h.

#define _CMU_STATUS_HFRCOSEL_SHIFT 10

Shift value for CMU_HFRCOSEL

Definition at line 7738 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7700 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOENS_MASK 0x4UL

Bit mask for CMU_HFXOENS

Definition at line 7699 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOENS_SHIFT 2

Shift value for CMU_HFXOENS

Definition at line 7698 of file efm32g890f128.h.

#define _CMU_STATUS_HFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7705 of file efm32g890f128.h.

#define _CMU_STATUS_HFXORDY_MASK 0x8UL

Bit mask for CMU_HFXORDY

Definition at line 7704 of file efm32g890f128.h.

#define _CMU_STATUS_HFXORDY_SHIFT 3

Shift value for CMU_HFXORDY

Definition at line 7703 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7745 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOSEL_MASK 0x800UL

Bit mask for CMU_HFXOSEL

Definition at line 7744 of file efm32g890f128.h.

#define _CMU_STATUS_HFXOSEL_SHIFT 11

Shift value for CMU_HFXOSEL

Definition at line 7743 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7720 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOENS_MASK 0x40UL

Bit mask for CMU_LFRCOENS

Definition at line 7719 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOENS_SHIFT 6

Shift value for CMU_LFRCOENS

Definition at line 7718 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7725 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCORDY_MASK 0x80UL

Bit mask for CMU_LFRCORDY

Definition at line 7724 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCORDY_SHIFT 7

Shift value for CMU_LFRCORDY

Definition at line 7723 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7750 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOSEL_MASK 0x1000UL

Bit mask for CMU_LFRCOSEL

Definition at line 7749 of file efm32g890f128.h.

#define _CMU_STATUS_LFRCOSEL_SHIFT 12

Shift value for CMU_LFRCOSEL

Definition at line 7748 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOENS_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7730 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOENS_MASK 0x100UL

Bit mask for CMU_LFXOENS

Definition at line 7729 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOENS_SHIFT 8

Shift value for CMU_LFXOENS

Definition at line 7728 of file efm32g890f128.h.

#define _CMU_STATUS_LFXORDY_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7735 of file efm32g890f128.h.

#define _CMU_STATUS_LFXORDY_MASK 0x200UL

Bit mask for CMU_LFXORDY

Definition at line 7734 of file efm32g890f128.h.

#define _CMU_STATUS_LFXORDY_SHIFT 9

Shift value for CMU_LFXORDY

Definition at line 7733 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOSEL_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_STATUS

Definition at line 7755 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOSEL_MASK 0x2000UL

Bit mask for CMU_LFXOSEL

Definition at line 7754 of file efm32g890f128.h.

#define _CMU_STATUS_LFXOSEL_SHIFT 13

Shift value for CMU_LFXOSEL

Definition at line 7753 of file efm32g890f128.h.

#define _CMU_STATUS_MASK 0x00007FFFUL

Mask for CMU_STATUS

Definition at line 7686 of file efm32g890f128.h.

#define _CMU_STATUS_RESETVALUE 0x00000403UL

Default value for CMU_STATUS

Definition at line 7685 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFACLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 8008 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFACLKEN0_MASK 0x1UL

Bit mask for CMU_LFACLKEN0

Definition at line 8007 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFACLKEN0_SHIFT 0

Shift value for CMU_LFACLKEN0

Definition at line 8006 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFAPRESC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 8013 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFAPRESC0_MASK 0x4UL

Bit mask for CMU_LFAPRESC0

Definition at line 8012 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFAPRESC0_SHIFT 2

Shift value for CMU_LFAPRESC0

Definition at line 8011 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBCLKEN0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 8018 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBCLKEN0_MASK 0x10UL

Bit mask for CMU_LFBCLKEN0

Definition at line 8017 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBCLKEN0_SHIFT 4

Shift value for CMU_LFBCLKEN0

Definition at line 8016 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBPRESC0_DEFAULT 0x00000000UL

Mode DEFAULT for CMU_SYNCBUSY

Definition at line 8023 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBPRESC0_MASK 0x40UL

Bit mask for CMU_LFBPRESC0

Definition at line 8022 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_LFBPRESC0_SHIFT 6

Shift value for CMU_LFBPRESC0

Definition at line 8021 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_MASK 0x00000055UL

Mask for CMU_SYNCBUSY

Definition at line 8004 of file efm32g890f128.h.

#define _CMU_SYNCBUSY_RESETVALUE 0x00000000UL

Default value for CMU_SYNCBUSY

Definition at line 8003 of file efm32g890f128.h.

#define CMU_AUXHFRCOCTRL_TUNING_DEFAULT (_CMU_AUXHFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_AUXHFRCOCTRL

Definition at line 7553 of file efm32g890f128.h.

#define CMU_CALCNT_CALCNT_DEFAULT (_CMU_CALCNT_CALCNT_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CALCNT

Definition at line 7579 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_AUXHFRCO (_CMU_CALCTRL_REFSEL_AUXHFRCO << 0)

Shifted mode AUXHFRCO for CMU_CALCTRL

Definition at line 7571 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_DEFAULT (_CMU_CALCTRL_REFSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CALCTRL

Definition at line 7566 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_HFRCO (_CMU_CALCTRL_REFSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_CALCTRL

Definition at line 7569 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_HFXO (_CMU_CALCTRL_REFSEL_HFXO << 0)

Shifted mode HFXO for CMU_CALCTRL

Definition at line 7567 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_LFRCO (_CMU_CALCTRL_REFSEL_LFRCO << 0)

Shifted mode LFRCO for CMU_CALCTRL

Definition at line 7570 of file efm32g890f128.h.

#define CMU_CALCTRL_REFSEL_LFXO (_CMU_CALCTRL_REFSEL_LFXO << 0)

Shifted mode LFXO for CMU_CALCTRL

Definition at line 7568 of file efm32g890f128.h.

#define CMU_CMD_CALSTART (0x1UL << 3)

Calibration Start

Definition at line 7650 of file efm32g890f128.h.

#define CMU_CMD_CALSTART_DEFAULT (_CMU_CMD_CALSTART_DEFAULT << 3)

Shifted mode DEFAULT for CMU_CMD

Definition at line 7654 of file efm32g890f128.h.

#define CMU_CMD_HFCLKSEL_DEFAULT (_CMU_CMD_HFCLKSEL_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CMD

Definition at line 7645 of file efm32g890f128.h.

#define CMU_CMD_HFCLKSEL_HFRCO (_CMU_CMD_HFCLKSEL_HFRCO << 0)

Shifted mode HFRCO for CMU_CMD

Definition at line 7646 of file efm32g890f128.h.

#define CMU_CMD_HFCLKSEL_HFXO (_CMU_CMD_HFCLKSEL_HFXO << 0)

Shifted mode HFXO for CMU_CMD

Definition at line 7647 of file efm32g890f128.h.

#define CMU_CMD_HFCLKSEL_LFRCO (_CMU_CMD_HFCLKSEL_LFRCO << 0)

Shifted mode LFRCO for CMU_CMD

Definition at line 7648 of file efm32g890f128.h.

#define CMU_CMD_HFCLKSEL_LFXO (_CMU_CMD_HFCLKSEL_LFXO << 0)

Shifted mode LFXO for CMU_CMD

Definition at line 7649 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_DEFAULT (_CMU_CTRL_CLKOUTSEL0_DEFAULT << 20)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7432 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFCLK16 (_CMU_CTRL_CLKOUTSEL0_HFCLK16 << 20)

Shifted mode HFCLK16 for CMU_CTRL

Definition at line 7438 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFCLK2 (_CMU_CTRL_CLKOUTSEL0_HFCLK2 << 20)

Shifted mode HFCLK2 for CMU_CTRL

Definition at line 7435 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFCLK4 (_CMU_CTRL_CLKOUTSEL0_HFCLK4 << 20)

Shifted mode HFCLK4 for CMU_CTRL

Definition at line 7436 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFCLK8 (_CMU_CTRL_CLKOUTSEL0_HFCLK8 << 20)

Shifted mode HFCLK8 for CMU_CTRL

Definition at line 7437 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFRCO (_CMU_CTRL_CLKOUTSEL0_HFRCO << 20)

Shifted mode HFRCO for CMU_CTRL

Definition at line 7433 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_HFXO (_CMU_CTRL_CLKOUTSEL0_HFXO << 20)

Shifted mode HFXO for CMU_CTRL

Definition at line 7434 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL0_ULFRCO (_CMU_CTRL_CLKOUTSEL0_ULFRCO << 20)

Shifted mode ULFRCO for CMU_CTRL

Definition at line 7439 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL1 (0x1UL << 23)

Clock Output Select 1

Definition at line 7440 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL1_DEFAULT (_CMU_CTRL_CLKOUTSEL1_DEFAULT << 23)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7446 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL1_LFRCO (_CMU_CTRL_CLKOUTSEL1_LFRCO << 23)

Shifted mode LFRCO for CMU_CTRL

Definition at line 7447 of file efm32g890f128.h.

#define CMU_CTRL_CLKOUTSEL1_LFXO (_CMU_CTRL_CLKOUTSEL1_LFXO << 23)

Shifted mode LFXO for CMU_CTRL

Definition at line 7448 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBOOST_100PCENT (_CMU_CTRL_HFXOBOOST_100PCENT << 2)

Shifted mode 100PCENT for CMU_CTRL

Definition at line 7364 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBOOST_50PCENT (_CMU_CTRL_HFXOBOOST_50PCENT << 2)

Shifted mode 50PCENT for CMU_CTRL

Definition at line 7360 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBOOST_70PCENT (_CMU_CTRL_HFXOBOOST_70PCENT << 2)

Shifted mode 70PCENT for CMU_CTRL

Definition at line 7361 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBOOST_80PCENT (_CMU_CTRL_HFXOBOOST_80PCENT << 2)

Shifted mode 80PCENT for CMU_CTRL

Definition at line 7362 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBOOST_DEFAULT (_CMU_CTRL_HFXOBOOST_DEFAULT << 2)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7363 of file efm32g890f128.h.

#define CMU_CTRL_HFXOBUFCUR_DEFAULT (_CMU_CTRL_HFXOBUFCUR_DEFAULT << 5)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7368 of file efm32g890f128.h.

#define CMU_CTRL_HFXOGLITCHDETEN (0x1UL << 7)

HFXO Glitch Detector Enable

Definition at line 7369 of file efm32g890f128.h.

#define CMU_CTRL_HFXOGLITCHDETEN_DEFAULT (_CMU_CTRL_HFXOGLITCHDETEN_DEFAULT << 7)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7373 of file efm32g890f128.h.

#define CMU_CTRL_HFXOMODE_BUFEXTCLK (_CMU_CTRL_HFXOMODE_BUFEXTCLK << 0)

Shifted mode BUFEXTCLK for CMU_CTRL

Definition at line 7351 of file efm32g890f128.h.

#define CMU_CTRL_HFXOMODE_DEFAULT (_CMU_CTRL_HFXOMODE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7349 of file efm32g890f128.h.

#define CMU_CTRL_HFXOMODE_DIGEXTCLK (_CMU_CTRL_HFXOMODE_DIGEXTCLK << 0)

Shifted mode DIGEXTCLK for CMU_CTRL

Definition at line 7352 of file efm32g890f128.h.

#define CMU_CTRL_HFXOMODE_XTAL (_CMU_CTRL_HFXOMODE_XTAL << 0)

Shifted mode XTAL for CMU_CTRL

Definition at line 7350 of file efm32g890f128.h.

#define CMU_CTRL_HFXOTIMEOUT_16KCYCLES (_CMU_CTRL_HFXOTIMEOUT_16KCYCLES << 9)

Shifted mode 16KCYCLES for CMU_CTRL

Definition at line 7385 of file efm32g890f128.h.

#define CMU_CTRL_HFXOTIMEOUT_1KCYCLES (_CMU_CTRL_HFXOTIMEOUT_1KCYCLES << 9)

Shifted mode 1KCYCLES for CMU_CTRL

Definition at line 7383 of file efm32g890f128.h.

#define CMU_CTRL_HFXOTIMEOUT_256CYCLES (_CMU_CTRL_HFXOTIMEOUT_256CYCLES << 9)

Shifted mode 256CYCLES for CMU_CTRL

Definition at line 7382 of file efm32g890f128.h.

#define CMU_CTRL_HFXOTIMEOUT_8CYCLES (_CMU_CTRL_HFXOTIMEOUT_8CYCLES << 9)

Shifted mode 8CYCLES for CMU_CTRL

Definition at line 7381 of file efm32g890f128.h.

#define CMU_CTRL_HFXOTIMEOUT_DEFAULT (_CMU_CTRL_HFXOTIMEOUT_DEFAULT << 9)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7384 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBOOST (0x1UL << 13)

LFXO Start-up Boost Current

Definition at line 7396 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBOOST_100PCENT (_CMU_CTRL_LFXOBOOST_100PCENT << 13)

Shifted mode 100PCENT for CMU_CTRL

Definition at line 7404 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBOOST_70PCENT (_CMU_CTRL_LFXOBOOST_70PCENT << 13)

Shifted mode 70PCENT for CMU_CTRL

Definition at line 7402 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBOOST_DEFAULT (_CMU_CTRL_LFXOBOOST_DEFAULT << 13)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7403 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBUFCUR (0x1UL << 17)

LFXO Boost Buffer Current

Definition at line 7405 of file efm32g890f128.h.

#define CMU_CTRL_LFXOBUFCUR_DEFAULT (_CMU_CTRL_LFXOBUFCUR_DEFAULT << 17)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7409 of file efm32g890f128.h.

#define CMU_CTRL_LFXOMODE_BUFEXTCLK (_CMU_CTRL_LFXOMODE_BUFEXTCLK << 11)

Shifted mode BUFEXTCLK for CMU_CTRL

Definition at line 7394 of file efm32g890f128.h.

#define CMU_CTRL_LFXOMODE_DEFAULT (_CMU_CTRL_LFXOMODE_DEFAULT << 11)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7392 of file efm32g890f128.h.

#define CMU_CTRL_LFXOMODE_DIGEXTCLK (_CMU_CTRL_LFXOMODE_DIGEXTCLK << 11)

Shifted mode DIGEXTCLK for CMU_CTRL

Definition at line 7395 of file efm32g890f128.h.

#define CMU_CTRL_LFXOMODE_XTAL (_CMU_CTRL_LFXOMODE_XTAL << 11)

Shifted mode XTAL for CMU_CTRL

Definition at line 7393 of file efm32g890f128.h.

#define CMU_CTRL_LFXOTIMEOUT_16KCYCLES (_CMU_CTRL_LFXOTIMEOUT_16KCYCLES << 18)

Shifted mode 16KCYCLES for CMU_CTRL

Definition at line 7419 of file efm32g890f128.h.

#define CMU_CTRL_LFXOTIMEOUT_1KCYCLES (_CMU_CTRL_LFXOTIMEOUT_1KCYCLES << 18)

Shifted mode 1KCYCLES for CMU_CTRL

Definition at line 7418 of file efm32g890f128.h.

#define CMU_CTRL_LFXOTIMEOUT_32KCYCLES (_CMU_CTRL_LFXOTIMEOUT_32KCYCLES << 18)

Shifted mode 32KCYCLES for CMU_CTRL

Definition at line 7421 of file efm32g890f128.h.

#define CMU_CTRL_LFXOTIMEOUT_8CYCLES (_CMU_CTRL_LFXOTIMEOUT_8CYCLES << 18)

Shifted mode 8CYCLES for CMU_CTRL

Definition at line 7417 of file efm32g890f128.h.

#define CMU_CTRL_LFXOTIMEOUT_DEFAULT (_CMU_CTRL_LFXOTIMEOUT_DEFAULT << 18)

Shifted mode DEFAULT for CMU_CTRL

Definition at line 7420 of file efm32g890f128.h.

#define CMU_FREEZE_REGFREEZE (0x1UL << 0)

Register Update Freeze

Definition at line 8029 of file efm32g890f128.h.

#define CMU_FREEZE_REGFREEZE_DEFAULT (_CMU_FREEZE_REGFREEZE_DEFAULT << 0)

Shifted mode DEFAULT for CMU_FREEZE

Definition at line 8035 of file efm32g890f128.h.

#define CMU_FREEZE_REGFREEZE_FREEZE (_CMU_FREEZE_REGFREEZE_FREEZE << 0)

Shifted mode FREEZE for CMU_FREEZE

Definition at line 8037 of file efm32g890f128.h.

#define CMU_FREEZE_REGFREEZE_UPDATE (_CMU_FREEZE_REGFREEZE_UPDATE << 0)

Shifted mode UPDATE for CMU_FREEZE

Definition at line 8036 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT (_CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFCORECLKDIV

Definition at line 7466 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK << 0)

Shifted mode HFCLK for CMU_HFCORECLKDIV

Definition at line 7467 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK128 << 0)

Shifted mode HFCLK128 for CMU_HFCORECLKDIV

Definition at line 7474 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK16 << 0)

Shifted mode HFCLK16 for CMU_HFCORECLKDIV

Definition at line 7471 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK2 << 0)

Shifted mode HFCLK2 for CMU_HFCORECLKDIV

Definition at line 7468 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK256 << 0)

Shifted mode HFCLK256 for CMU_HFCORECLKDIV

Definition at line 7475 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK32 << 0)

Shifted mode HFCLK32 for CMU_HFCORECLKDIV

Definition at line 7472 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK4 << 0)

Shifted mode HFCLK4 for CMU_HFCORECLKDIV

Definition at line 7469 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK512 << 0)

Shifted mode HFCLK512 for CMU_HFCORECLKDIV

Definition at line 7476 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK64 << 0)

Shifted mode HFCLK64 for CMU_HFCORECLKDIV

Definition at line 7473 of file efm32g890f128.h.

#define CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 (_CMU_HFCORECLKDIV_HFCORECLKDIV_HFCLK8 << 0)

Shifted mode HFCLK8 for CMU_HFCORECLKDIV

Definition at line 7470 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_AES (0x1UL << 0)

Advanced Encryption Standard Accelerator Clock Enable

Definition at line 7902 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_AES_DEFAULT (_CMU_HFCORECLKEN0_AES_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7906 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_DMA (0x1UL << 1)

Direct Memory Access Controller Clock Enable

Definition at line 7907 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_DMA_DEFAULT (_CMU_HFCORECLKEN0_DMA_DEFAULT << 1)

Shifted mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7911 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_EBI (0x1UL << 3)

External Bus Interface Clock Enable

Definition at line 7917 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_EBI_DEFAULT (_CMU_HFCORECLKEN0_EBI_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7921 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_LE (0x1UL << 2)

Low Energy Peripheral Interface Clock Enable

Definition at line 7912 of file efm32g890f128.h.

#define CMU_HFCORECLKEN0_LE_DEFAULT (_CMU_HFCORECLKEN0_LE_DEFAULT << 2)

Shifted mode DEFAULT for CMU_HFCORECLKEN0

Definition at line 7916 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT (_CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFPERCLKDIV

Definition at line 7494 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK << 0)

Shifted mode HFCLK for CMU_HFPERCLKDIV

Definition at line 7495 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK128 << 0)

Shifted mode HFCLK128 for CMU_HFPERCLKDIV

Definition at line 7502 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK16 << 0)

Shifted mode HFCLK16 for CMU_HFPERCLKDIV

Definition at line 7499 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK2 << 0)

Shifted mode HFCLK2 for CMU_HFPERCLKDIV

Definition at line 7496 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK256 << 0)

Shifted mode HFCLK256 for CMU_HFPERCLKDIV

Definition at line 7503 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK32 << 0)

Shifted mode HFCLK32 for CMU_HFPERCLKDIV

Definition at line 7500 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK4 << 0)

Shifted mode HFCLK4 for CMU_HFPERCLKDIV

Definition at line 7497 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512 << 0)

Shifted mode HFCLK512 for CMU_HFPERCLKDIV

Definition at line 7504 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK64 << 0)

Shifted mode HFCLK64 for CMU_HFPERCLKDIV

Definition at line 7501 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 (_CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK8 << 0)

Shifted mode HFCLK8 for CMU_HFPERCLKDIV

Definition at line 7498 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKEN (0x1UL << 8)

HFPERCLK Enable

Definition at line 7505 of file efm32g890f128.h.

#define CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT (_CMU_HFPERCLKDIV_HFPERCLKEN_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERCLKDIV

Definition at line 7509 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ACMP0 (0x1UL << 7)

Analog Comparator 0 Clock Enable

Definition at line 7961 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ACMP0_DEFAULT (_CMU_HFPERCLKEN0_ACMP0_DEFAULT << 7)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7965 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ACMP1 (0x1UL << 8)

Analog Comparator 1 Clock Enable

Definition at line 7966 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ACMP1_DEFAULT (_CMU_HFPERCLKEN0_ACMP1_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7970 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ADC0 (0x1UL << 14)

Analog to Digital Converter 0 Clock Enable

Definition at line 7991 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_ADC0_DEFAULT (_CMU_HFPERCLKEN0_ADC0_DEFAULT << 14)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7995 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_DAC0 (0x1UL << 11)

Digital to Analog Converter 0 Clock Enable

Definition at line 7976 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_DAC0_DEFAULT (_CMU_HFPERCLKEN0_DAC0_DEFAULT << 11)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7980 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_GPIO (0x1UL << 12)

General purpose Input/Output Clock Enable

Definition at line 7981 of file efm32g890f128.h.

Referenced by DVK_SPI().

#define CMU_HFPERCLKEN0_GPIO_DEFAULT (_CMU_HFPERCLKEN0_GPIO_DEFAULT << 12)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7985 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_I2C0 (0x1UL << 15)

I2C 0 Clock Enable

Definition at line 7996 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_I2C0_DEFAULT (_CMU_HFPERCLKEN0_I2C0_DEFAULT << 15)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 8000 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_PRS (0x1UL << 10)

Peripheral Reflex System Clock Enable

Definition at line 7971 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_PRS_DEFAULT (_CMU_HFPERCLKEN0_PRS_DEFAULT << 10)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7975 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER0 (0x1UL << 4)

Timer 0 Clock Enable

Definition at line 7946 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER0_DEFAULT (_CMU_HFPERCLKEN0_TIMER0_DEFAULT << 4)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7950 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER1 (0x1UL << 5)

Timer 1 Clock Enable

Definition at line 7951 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER1_DEFAULT (_CMU_HFPERCLKEN0_TIMER1_DEFAULT << 5)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7955 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER2 (0x1UL << 6)

Timer 2 Clock Enable

Definition at line 7956 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_TIMER2_DEFAULT (_CMU_HFPERCLKEN0_TIMER2_DEFAULT << 6)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7960 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_UART0 (0x1UL << 3)

Universal Asynchronous Receiver/Transmitter 0 Clock Enable

Definition at line 7941 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_UART0_DEFAULT (_CMU_HFPERCLKEN0_UART0_DEFAULT << 3)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7945 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_USART0 (0x1UL << 0)

Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable

Definition at line 7926 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_USART0_DEFAULT (_CMU_HFPERCLKEN0_USART0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7930 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_USART1 (0x1UL << 1)

Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable

Definition at line 7931 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_USART1_DEFAULT (_CMU_HFPERCLKEN0_USART1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7935 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_USART2 (0x1UL << 2)

Universal Synchronous/Asynchronous Receiver/Transmitter 2 Clock Enable

Definition at line 7936 of file efm32g890f128.h.

Referenced by DVK_SPI().

#define CMU_HFPERCLKEN0_USART2_DEFAULT (_CMU_HFPERCLKEN0_USART2_DEFAULT << 2)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7940 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_VCMP (0x1UL << 13)

Voltage Comparator Clock Enable

Definition at line 7986 of file efm32g890f128.h.

#define CMU_HFPERCLKEN0_VCMP_DEFAULT (_CMU_HFPERCLKEN0_VCMP_DEFAULT << 13)

Shifted mode DEFAULT for CMU_HFPERCLKEN0

Definition at line 7990 of file efm32g890f128.h.

#define CMU_HFRCOCTRL_BAND_11MHZ (_CMU_HFRCOCTRL_BAND_11MHZ << 8)

Shifted mode 11MHZ for CMU_HFRCOCTRL

Definition at line 7529 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_14MHZ (_CMU_HFRCOCTRL_BAND_14MHZ << 8)

Shifted mode 14MHZ for CMU_HFRCOCTRL

Definition at line 7531 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_1MHZ (_CMU_HFRCOCTRL_BAND_1MHZ << 8)

Shifted mode 1MHZ for CMU_HFRCOCTRL

Definition at line 7527 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_21MHZ (_CMU_HFRCOCTRL_BAND_21MHZ << 8)

Shifted mode 21MHZ for CMU_HFRCOCTRL

Definition at line 7532 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_28MHZ (_CMU_HFRCOCTRL_BAND_28MHZ << 8)

Shifted mode 28MHZ for CMU_HFRCOCTRL

Definition at line 7533 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_7MHZ (_CMU_HFRCOCTRL_BAND_7MHZ << 8)

Shifted mode 7MHZ for CMU_HFRCOCTRL

Definition at line 7528 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_HFRCOCTRL_BAND_DEFAULT (_CMU_HFRCOCTRL_BAND_DEFAULT << 8)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7530 of file efm32g890f128.h.

#define CMU_HFRCOCTRL_SUDELAY_DEFAULT (_CMU_HFRCOCTRL_SUDELAY_DEFAULT << 12)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7537 of file efm32g890f128.h.

#define CMU_HFRCOCTRL_TUNING_DEFAULT (_CMU_HFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_HFRCOCTRL

Definition at line 7517 of file efm32g890f128.h.

#define CMU_IEN_AUXHFRCORDY (0x1UL << 4)

AUXHFRCO Ready Interrupt Enable

Definition at line 7888 of file efm32g890f128.h.

#define CMU_IEN_AUXHFRCORDY_DEFAULT (_CMU_IEN_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7892 of file efm32g890f128.h.

#define CMU_IEN_CALRDY (0x1UL << 5)

Calibration Ready Interrupt Enable

Definition at line 7893 of file efm32g890f128.h.

#define CMU_IEN_CALRDY_DEFAULT (_CMU_IEN_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7897 of file efm32g890f128.h.

#define CMU_IEN_HFRCORDY (0x1UL << 0)

HFRCO Ready Interrupt Enable

Definition at line 7868 of file efm32g890f128.h.

#define CMU_IEN_HFRCORDY_DEFAULT (_CMU_IEN_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7872 of file efm32g890f128.h.

#define CMU_IEN_HFXORDY (0x1UL << 1)

HFXO Ready Interrupt Enable

Definition at line 7873 of file efm32g890f128.h.

#define CMU_IEN_HFXORDY_DEFAULT (_CMU_IEN_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7877 of file efm32g890f128.h.

#define CMU_IEN_LFRCORDY (0x1UL << 2)

LFRCO Ready Interrupt Enable

Definition at line 7878 of file efm32g890f128.h.

#define CMU_IEN_LFRCORDY_DEFAULT (_CMU_IEN_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7882 of file efm32g890f128.h.

#define CMU_IEN_LFXORDY (0x1UL << 3)

LFXO Ready Interrupt Enable

Definition at line 7883 of file efm32g890f128.h.

#define CMU_IEN_LFXORDY_DEFAULT (_CMU_IEN_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IEN

Definition at line 7887 of file efm32g890f128.h.

#define CMU_IF_AUXHFRCORDY (0x1UL << 4)

AUXHFRCO Ready Interrupt Flag

Definition at line 7786 of file efm32g890f128.h.

#define CMU_IF_AUXHFRCORDY_DEFAULT (_CMU_IF_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IF

Definition at line 7790 of file efm32g890f128.h.

#define CMU_IF_CALRDY (0x1UL << 5)

Calibration Ready Interrupt Flag

Definition at line 7791 of file efm32g890f128.h.

#define CMU_IF_CALRDY_DEFAULT (_CMU_IF_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IF

Definition at line 7795 of file efm32g890f128.h.

#define CMU_IF_HFRCORDY (0x1UL << 0)

HFRCO Ready Interrupt Flag

Definition at line 7766 of file efm32g890f128.h.

#define CMU_IF_HFRCORDY_DEFAULT (_CMU_IF_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IF

Definition at line 7770 of file efm32g890f128.h.

#define CMU_IF_HFXORDY (0x1UL << 1)

HFXO Ready Interrupt Flag

Definition at line 7771 of file efm32g890f128.h.

#define CMU_IF_HFXORDY_DEFAULT (_CMU_IF_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IF

Definition at line 7775 of file efm32g890f128.h.

#define CMU_IF_LFRCORDY (0x1UL << 2)

LFRCO Ready Interrupt Flag

Definition at line 7776 of file efm32g890f128.h.

#define CMU_IF_LFRCORDY_DEFAULT (_CMU_IF_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IF

Definition at line 7780 of file efm32g890f128.h.

#define CMU_IF_LFXORDY (0x1UL << 3)

LFXO Ready Interrupt Flag

Definition at line 7781 of file efm32g890f128.h.

#define CMU_IF_LFXORDY_DEFAULT (_CMU_IF_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IF

Definition at line 7785 of file efm32g890f128.h.

#define CMU_IFC_AUXHFRCORDY (0x1UL << 4)

AUXHFRCO Ready Interrupt Flag Clear

Definition at line 7854 of file efm32g890f128.h.

#define CMU_IFC_AUXHFRCORDY_DEFAULT (_CMU_IFC_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7858 of file efm32g890f128.h.

#define CMU_IFC_CALRDY (0x1UL << 5)

Calibration Ready Interrupt Flag Clear

Definition at line 7859 of file efm32g890f128.h.

#define CMU_IFC_CALRDY_DEFAULT (_CMU_IFC_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7863 of file efm32g890f128.h.

#define CMU_IFC_HFRCORDY (0x1UL << 0)

HFRCO Ready Interrupt Flag Clear

Definition at line 7834 of file efm32g890f128.h.

#define CMU_IFC_HFRCORDY_DEFAULT (_CMU_IFC_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7838 of file efm32g890f128.h.

#define CMU_IFC_HFXORDY (0x1UL << 1)

HFXO Ready Interrupt Flag Clear

Definition at line 7839 of file efm32g890f128.h.

#define CMU_IFC_HFXORDY_DEFAULT (_CMU_IFC_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7843 of file efm32g890f128.h.

#define CMU_IFC_LFRCORDY (0x1UL << 2)

LFRCO Ready Interrupt Flag Clear

Definition at line 7844 of file efm32g890f128.h.

#define CMU_IFC_LFRCORDY_DEFAULT (_CMU_IFC_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7848 of file efm32g890f128.h.

#define CMU_IFC_LFXORDY (0x1UL << 3)

LFXO Ready Interrupt Flag Clear

Definition at line 7849 of file efm32g890f128.h.

#define CMU_IFC_LFXORDY_DEFAULT (_CMU_IFC_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IFC

Definition at line 7853 of file efm32g890f128.h.

#define CMU_IFS_AUXHFRCORDY (0x1UL << 4)

AUXHFRCO Ready Interrupt Flag Set

Definition at line 7820 of file efm32g890f128.h.

#define CMU_IFS_AUXHFRCORDY_DEFAULT (_CMU_IFS_AUXHFRCORDY_DEFAULT << 4)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7824 of file efm32g890f128.h.

#define CMU_IFS_CALRDY (0x1UL << 5)

Calibration Ready Interrupt Flag Set

Definition at line 7825 of file efm32g890f128.h.

#define CMU_IFS_CALRDY_DEFAULT (_CMU_IFS_CALRDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7829 of file efm32g890f128.h.

#define CMU_IFS_HFRCORDY (0x1UL << 0)

HFRCO Ready Interrupt Flag Set

Definition at line 7800 of file efm32g890f128.h.

#define CMU_IFS_HFRCORDY_DEFAULT (_CMU_IFS_HFRCORDY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7804 of file efm32g890f128.h.

#define CMU_IFS_HFXORDY (0x1UL << 1)

HFXO Ready Interrupt Flag Set

Definition at line 7805 of file efm32g890f128.h.

#define CMU_IFS_HFXORDY_DEFAULT (_CMU_IFS_HFXORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7809 of file efm32g890f128.h.

#define CMU_IFS_LFRCORDY (0x1UL << 2)

LFRCO Ready Interrupt Flag Set

Definition at line 7810 of file efm32g890f128.h.

#define CMU_IFS_LFRCORDY_DEFAULT (_CMU_IFS_LFRCORDY_DEFAULT << 2)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7814 of file efm32g890f128.h.

#define CMU_IFS_LFXORDY (0x1UL << 3)

LFXO Ready Interrupt Flag Set

Definition at line 7815 of file efm32g890f128.h.

#define CMU_IFS_LFXORDY_DEFAULT (_CMU_IFS_LFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_IFS

Definition at line 7819 of file efm32g890f128.h.

#define CMU_LCDCTRL_FDIV_DEFAULT (_CMU_LCDCTRL_FDIV_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LCDCTRL

Definition at line 8230 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DEFAULT (_CMU_LCDCTRL_VBFDIV_DEFAULT << 4)

Shifted mode DEFAULT for CMU_LCDCTRL

Definition at line 8249 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV1 (_CMU_LCDCTRL_VBFDIV_DIV1 << 4)

Shifted mode DIV1 for CMU_LCDCTRL

Definition at line 8247 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV128 (_CMU_LCDCTRL_VBFDIV_DIV128 << 4)

Shifted mode DIV128 for CMU_LCDCTRL

Definition at line 8255 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV16 (_CMU_LCDCTRL_VBFDIV_DIV16 << 4)

Shifted mode DIV16 for CMU_LCDCTRL

Definition at line 8252 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV2 (_CMU_LCDCTRL_VBFDIV_DIV2 << 4)

Shifted mode DIV2 for CMU_LCDCTRL

Definition at line 8248 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV32 (_CMU_LCDCTRL_VBFDIV_DIV32 << 4)

Shifted mode DIV32 for CMU_LCDCTRL

Definition at line 8253 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV4 (_CMU_LCDCTRL_VBFDIV_DIV4 << 4)

Shifted mode DIV4 for CMU_LCDCTRL

Definition at line 8250 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV64 (_CMU_LCDCTRL_VBFDIV_DIV64 << 4)

Shifted mode DIV64 for CMU_LCDCTRL

Definition at line 8254 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBFDIV_DIV8 (_CMU_LCDCTRL_VBFDIV_DIV8 << 4)

Shifted mode DIV8 for CMU_LCDCTRL

Definition at line 8251 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBOOSTEN (0x1UL << 3)

Voltage Boost Enable

Definition at line 8231 of file efm32g890f128.h.

#define CMU_LCDCTRL_VBOOSTEN_DEFAULT (_CMU_LCDCTRL_VBOOSTEN_DEFAULT << 3)

Shifted mode DEFAULT for CMU_LCDCTRL

Definition at line 8235 of file efm32g890f128.h.

#define CMU_LFACLKEN0_LCD (0x1UL << 2)

Liquid Crystal Display Controller Clock Enable

Definition at line 8052 of file efm32g890f128.h.

#define CMU_LFACLKEN0_LCD_DEFAULT (_CMU_LFACLKEN0_LCD_DEFAULT << 2)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 8056 of file efm32g890f128.h.

#define CMU_LFACLKEN0_LETIMER0 (0x1UL << 1)

Low Energy Timer 0 Clock Enable

Definition at line 8047 of file efm32g890f128.h.

#define CMU_LFACLKEN0_LETIMER0_DEFAULT (_CMU_LFACLKEN0_LETIMER0_DEFAULT << 1)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 8051 of file efm32g890f128.h.

#define CMU_LFACLKEN0_RTC (0x1UL << 0)

Real-Time Counter Clock Enable

Definition at line 8042 of file efm32g890f128.h.

#define CMU_LFACLKEN0_RTC_DEFAULT (_CMU_LFACLKEN0_RTC_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFACLKEN0

Definition at line 8046 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LCD_DIV128 (_CMU_LFAPRESC0_LCD_DIV128 << 8)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 8152 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LCD_DIV16 (_CMU_LFAPRESC0_LCD_DIV16 << 8)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 8149 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LCD_DIV32 (_CMU_LFAPRESC0_LCD_DIV32 << 8)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 8150 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LCD_DIV64 (_CMU_LFAPRESC0_LCD_DIV64 << 8)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 8151 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV1 (_CMU_LFAPRESC0_LETIMER0_DIV1 << 4)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 8127 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV1024 (_CMU_LFAPRESC0_LETIMER0_DIV1024 << 4)

Shifted mode DIV1024 for CMU_LFAPRESC0

Definition at line 8137 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV128 (_CMU_LFAPRESC0_LETIMER0_DIV128 << 4)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 8134 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV16 (_CMU_LFAPRESC0_LETIMER0_DIV16 << 4)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 8131 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV16384 (_CMU_LFAPRESC0_LETIMER0_DIV16384 << 4)

Shifted mode DIV16384 for CMU_LFAPRESC0

Definition at line 8141 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV2 (_CMU_LFAPRESC0_LETIMER0_DIV2 << 4)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 8128 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV2048 (_CMU_LFAPRESC0_LETIMER0_DIV2048 << 4)

Shifted mode DIV2048 for CMU_LFAPRESC0

Definition at line 8138 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV256 (_CMU_LFAPRESC0_LETIMER0_DIV256 << 4)

Shifted mode DIV256 for CMU_LFAPRESC0

Definition at line 8135 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV32 (_CMU_LFAPRESC0_LETIMER0_DIV32 << 4)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 8132 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV32768 (_CMU_LFAPRESC0_LETIMER0_DIV32768 << 4)

Shifted mode DIV32768 for CMU_LFAPRESC0

Definition at line 8142 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV4 (_CMU_LFAPRESC0_LETIMER0_DIV4 << 4)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 8129 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV4096 (_CMU_LFAPRESC0_LETIMER0_DIV4096 << 4)

Shifted mode DIV4096 for CMU_LFAPRESC0

Definition at line 8139 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV512 (_CMU_LFAPRESC0_LETIMER0_DIV512 << 4)

Shifted mode DIV512 for CMU_LFAPRESC0

Definition at line 8136 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV64 (_CMU_LFAPRESC0_LETIMER0_DIV64 << 4)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 8133 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV8 (_CMU_LFAPRESC0_LETIMER0_DIV8 << 4)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 8130 of file efm32g890f128.h.

#define CMU_LFAPRESC0_LETIMER0_DIV8192 (_CMU_LFAPRESC0_LETIMER0_DIV8192 << 4)

Shifted mode DIV8192 for CMU_LFAPRESC0

Definition at line 8140 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV1 (_CMU_LFAPRESC0_RTC_DIV1 << 0)

Shifted mode DIV1 for CMU_LFAPRESC0

Definition at line 8093 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV1024 (_CMU_LFAPRESC0_RTC_DIV1024 << 0)

Shifted mode DIV1024 for CMU_LFAPRESC0

Definition at line 8103 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV128 (_CMU_LFAPRESC0_RTC_DIV128 << 0)

Shifted mode DIV128 for CMU_LFAPRESC0

Definition at line 8100 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV16 (_CMU_LFAPRESC0_RTC_DIV16 << 0)

Shifted mode DIV16 for CMU_LFAPRESC0

Definition at line 8097 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV16384 (_CMU_LFAPRESC0_RTC_DIV16384 << 0)

Shifted mode DIV16384 for CMU_LFAPRESC0

Definition at line 8107 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV2 (_CMU_LFAPRESC0_RTC_DIV2 << 0)

Shifted mode DIV2 for CMU_LFAPRESC0

Definition at line 8094 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV2048 (_CMU_LFAPRESC0_RTC_DIV2048 << 0)

Shifted mode DIV2048 for CMU_LFAPRESC0

Definition at line 8104 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV256 (_CMU_LFAPRESC0_RTC_DIV256 << 0)

Shifted mode DIV256 for CMU_LFAPRESC0

Definition at line 8101 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV32 (_CMU_LFAPRESC0_RTC_DIV32 << 0)

Shifted mode DIV32 for CMU_LFAPRESC0

Definition at line 8098 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV32768 (_CMU_LFAPRESC0_RTC_DIV32768 << 0)

Shifted mode DIV32768 for CMU_LFAPRESC0

Definition at line 8108 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV4 (_CMU_LFAPRESC0_RTC_DIV4 << 0)

Shifted mode DIV4 for CMU_LFAPRESC0

Definition at line 8095 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV4096 (_CMU_LFAPRESC0_RTC_DIV4096 << 0)

Shifted mode DIV4096 for CMU_LFAPRESC0

Definition at line 8105 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV512 (_CMU_LFAPRESC0_RTC_DIV512 << 0)

Shifted mode DIV512 for CMU_LFAPRESC0

Definition at line 8102 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV64 (_CMU_LFAPRESC0_RTC_DIV64 << 0)

Shifted mode DIV64 for CMU_LFAPRESC0

Definition at line 8099 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV8 (_CMU_LFAPRESC0_RTC_DIV8 << 0)

Shifted mode DIV8 for CMU_LFAPRESC0

Definition at line 8096 of file efm32g890f128.h.

#define CMU_LFAPRESC0_RTC_DIV8192 (_CMU_LFAPRESC0_RTC_DIV8192 << 0)

Shifted mode DIV8192 for CMU_LFAPRESC0

Definition at line 8106 of file efm32g890f128.h.

#define CMU_LFBCLKEN0_LEUART0 (0x1UL << 0)

Low Energy UART 0 Clock Enable

Definition at line 8061 of file efm32g890f128.h.

#define CMU_LFBCLKEN0_LEUART0_DEFAULT (_CMU_LFBCLKEN0_LEUART0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 8065 of file efm32g890f128.h.

#define CMU_LFBCLKEN0_LEUART1 (0x1UL << 1)

Low Energy UART 1 Clock Enable

Definition at line 8066 of file efm32g890f128.h.

#define CMU_LFBCLKEN0_LEUART1_DEFAULT (_CMU_LFBCLKEN0_LEUART1_DEFAULT << 1)

Shifted mode DEFAULT for CMU_LFBCLKEN0

Definition at line 8070 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART0_DIV1 (_CMU_LFBPRESC0_LEUART0_DIV1 << 0)

Shifted mode DIV1 for CMU_LFBPRESC0

Definition at line 8163 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART0_DIV2 (_CMU_LFBPRESC0_LEUART0_DIV2 << 0)

Shifted mode DIV2 for CMU_LFBPRESC0

Definition at line 8164 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART0_DIV4 (_CMU_LFBPRESC0_LEUART0_DIV4 << 0)

Shifted mode DIV4 for CMU_LFBPRESC0

Definition at line 8165 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART0_DIV8 (_CMU_LFBPRESC0_LEUART0_DIV8 << 0)

Shifted mode DIV8 for CMU_LFBPRESC0

Definition at line 8166 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART1_DIV1 (_CMU_LFBPRESC0_LEUART1_DIV1 << 4)

Shifted mode DIV1 for CMU_LFBPRESC0

Definition at line 8173 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART1_DIV2 (_CMU_LFBPRESC0_LEUART1_DIV2 << 4)

Shifted mode DIV2 for CMU_LFBPRESC0

Definition at line 8174 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART1_DIV4 (_CMU_LFBPRESC0_LEUART1_DIV4 << 4)

Shifted mode DIV4 for CMU_LFBPRESC0

Definition at line 8175 of file efm32g890f128.h.

#define CMU_LFBPRESC0_LEUART1_DIV8 (_CMU_LFBPRESC0_LEUART1_DIV8 << 4)

Shifted mode DIV8 for CMU_LFBPRESC0

Definition at line 8176 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFA_DEFAULT (_CMU_LFCLKSEL_LFA_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFCLKSEL

Definition at line 7667 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFA_DISABLED (_CMU_LFCLKSEL_LFA_DISABLED << 0)

Shifted mode DISABLED for CMU_LFCLKSEL

Definition at line 7666 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 (_CMU_LFCLKSEL_LFA_HFCORECLKLEDIV2 << 0)

Shifted mode HFCORECLKLEDIV2 for CMU_LFCLKSEL

Definition at line 7670 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFA_LFRCO (_CMU_LFCLKSEL_LFA_LFRCO << 0)

Shifted mode LFRCO for CMU_LFCLKSEL

Definition at line 7668 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFA_LFXO (_CMU_LFCLKSEL_LFA_LFXO << 0)

Shifted mode LFXO for CMU_LFCLKSEL

Definition at line 7669 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFB_DEFAULT (_CMU_LFCLKSEL_LFB_DEFAULT << 2)

Shifted mode DEFAULT for CMU_LFCLKSEL

Definition at line 7679 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFB_DISABLED (_CMU_LFCLKSEL_LFB_DISABLED << 2)

Shifted mode DISABLED for CMU_LFCLKSEL

Definition at line 7678 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 (_CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 << 2)

Shifted mode HFCORECLKLEDIV2 for CMU_LFCLKSEL

Definition at line 7682 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFB_LFRCO (_CMU_LFCLKSEL_LFB_LFRCO << 2)

Shifted mode LFRCO for CMU_LFCLKSEL

Definition at line 7680 of file efm32g890f128.h.

#define CMU_LFCLKSEL_LFB_LFXO (_CMU_LFCLKSEL_LFB_LFXO << 2)

Shifted mode LFXO for CMU_LFCLKSEL

Definition at line 7681 of file efm32g890f128.h.

#define CMU_LFRCOCTRL_TUNING_DEFAULT (_CMU_LFRCOCTRL_TUNING_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LFRCOCTRL

Definition at line 7545 of file efm32g890f128.h.

#define CMU_LOCK_LOCKKEY_DEFAULT (_CMU_LOCK_LOCKKEY_DEFAULT << 0)

Shifted mode DEFAULT for CMU_LOCK

Definition at line 8290 of file efm32g890f128.h.

#define CMU_LOCK_LOCKKEY_LOCK (_CMU_LOCK_LOCKKEY_LOCK << 0)

Shifted mode LOCK for CMU_LOCK

Definition at line 8291 of file efm32g890f128.h.

#define CMU_LOCK_LOCKKEY_LOCKED (_CMU_LOCK_LOCKKEY_LOCKED << 0)

Shifted mode LOCKED for CMU_LOCK

Definition at line 8293 of file efm32g890f128.h.

#define CMU_LOCK_LOCKKEY_UNLOCK (_CMU_LOCK_LOCKKEY_UNLOCK << 0)

Shifted mode UNLOCK for CMU_LOCK

Definition at line 8294 of file efm32g890f128.h.

#define CMU_LOCK_LOCKKEY_UNLOCKED (_CMU_LOCK_LOCKKEY_UNLOCKED << 0)

Shifted mode UNLOCKED for CMU_LOCK

Definition at line 8292 of file efm32g890f128.h.

#define CMU_OSCENCMD_AUXHFRCODIS (0x1UL << 5)

AUXHFRCO Disable

Definition at line 7609 of file efm32g890f128.h.

#define CMU_OSCENCMD_AUXHFRCODIS_DEFAULT (_CMU_OSCENCMD_AUXHFRCODIS_DEFAULT << 5)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7613 of file efm32g890f128.h.

#define CMU_OSCENCMD_AUXHFRCOEN (0x1UL << 4)

AUXHFRCO Enable

Definition at line 7604 of file efm32g890f128.h.

#define CMU_OSCENCMD_AUXHFRCOEN_DEFAULT (_CMU_OSCENCMD_AUXHFRCOEN_DEFAULT << 4)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7608 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFRCODIS (0x1UL << 1)

HFRCO Disable

Definition at line 7589 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFRCODIS_DEFAULT (_CMU_OSCENCMD_HFRCODIS_DEFAULT << 1)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7593 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFRCOEN (0x1UL << 0)

HFRCO Enable

Definition at line 7584 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFRCOEN_DEFAULT (_CMU_OSCENCMD_HFRCOEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7588 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFXODIS (0x1UL << 3)

HFXO Disable

Definition at line 7599 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFXODIS_DEFAULT (_CMU_OSCENCMD_HFXODIS_DEFAULT << 3)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7603 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFXOEN (0x1UL << 2)

HFXO Enable

Definition at line 7594 of file efm32g890f128.h.

#define CMU_OSCENCMD_HFXOEN_DEFAULT (_CMU_OSCENCMD_HFXOEN_DEFAULT << 2)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7598 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFRCODIS (0x1UL << 7)

LFRCO Disable

Definition at line 7619 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFRCODIS_DEFAULT (_CMU_OSCENCMD_LFRCODIS_DEFAULT << 7)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7623 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFRCOEN (0x1UL << 6)

LFRCO Enable

Definition at line 7614 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFRCOEN_DEFAULT (_CMU_OSCENCMD_LFRCOEN_DEFAULT << 6)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7618 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFXODIS (0x1UL << 9)

LFXO Disable

Definition at line 7629 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFXODIS_DEFAULT (_CMU_OSCENCMD_LFXODIS_DEFAULT << 9)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7633 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFXOEN (0x1UL << 8)

LFXO Enable

Definition at line 7624 of file efm32g890f128.h.

#define CMU_OSCENCMD_LFXOEN_DEFAULT (_CMU_OSCENCMD_LFXOEN_DEFAULT << 8)

Shifted mode DEFAULT for CMU_OSCENCMD

Definition at line 7628 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKEN (0x1UL << 0)

PCNT0 Clock Enable

Definition at line 8181 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8185 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKSEL (0x1UL << 1)

PCNT0 Clock Select

Definition at line 8186 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT0CLKSEL_DEFAULT << 1)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8192 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT0CLKSEL_LFACLK << 1)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 8193 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 (_CMU_PCNTCTRL_PCNT0CLKSEL_PCNT0S0 << 1)

Shifted mode PCNT0S0 for CMU_PCNTCTRL

Definition at line 8194 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKEN (0x1UL << 2)

PCNT1 Clock Enable

Definition at line 8195 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT1CLKEN_DEFAULT << 2)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8199 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKSEL (0x1UL << 3)

PCNT1 Clock Select

Definition at line 8200 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT1CLKSEL_DEFAULT << 3)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8206 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT1CLKSEL_LFACLK << 3)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 8207 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 (_CMU_PCNTCTRL_PCNT1CLKSEL_PCNT1S0 << 3)

Shifted mode PCNT1S0 for CMU_PCNTCTRL

Definition at line 8208 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKEN (0x1UL << 4)

PCNT2 Clock Enable

Definition at line 8209 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT (_CMU_PCNTCTRL_PCNT2CLKEN_DEFAULT << 4)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8213 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKSEL (0x1UL << 5)

PCNT2 Clock Select

Definition at line 8214 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT (_CMU_PCNTCTRL_PCNT2CLKSEL_DEFAULT << 5)

Shifted mode DEFAULT for CMU_PCNTCTRL

Definition at line 8220 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK (_CMU_PCNTCTRL_PCNT2CLKSEL_LFACLK << 5)

Shifted mode LFACLK for CMU_PCNTCTRL

Definition at line 8221 of file efm32g890f128.h.

#define CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 (_CMU_PCNTCTRL_PCNT2CLKSEL_PCNT2S0 << 5)

Shifted mode PCNT2S0 for CMU_PCNTCTRL

Definition at line 8222 of file efm32g890f128.h.

#define CMU_ROUTE_CLKOUT0PEN (0x1UL << 0)

CLKOUT0 Pin Enable

Definition at line 8260 of file efm32g890f128.h.

#define CMU_ROUTE_CLKOUT0PEN_DEFAULT (_CMU_ROUTE_CLKOUT0PEN_DEFAULT << 0)

Shifted mode DEFAULT for CMU_ROUTE

Definition at line 8264 of file efm32g890f128.h.

#define CMU_ROUTE_CLKOUT1PEN (0x1UL << 1)

CLKOUT1 Pin Enable

Definition at line 8265 of file efm32g890f128.h.

#define CMU_ROUTE_CLKOUT1PEN_DEFAULT (_CMU_ROUTE_CLKOUT1PEN_DEFAULT << 1)

Shifted mode DEFAULT for CMU_ROUTE

Definition at line 8269 of file efm32g890f128.h.

#define CMU_ROUTE_LOCATION (0x1UL << 2)

I/O Location

Definition at line 8270 of file efm32g890f128.h.

#define CMU_ROUTE_LOCATION_DEFAULT (_CMU_ROUTE_LOCATION_DEFAULT << 2)

Shifted mode DEFAULT for CMU_ROUTE

Definition at line 8276 of file efm32g890f128.h.

#define CMU_ROUTE_LOCATION_LOC0 (_CMU_ROUTE_LOCATION_LOC0 << 2)

Shifted mode LOC0 for CMU_ROUTE

Definition at line 8277 of file efm32g890f128.h.

#define CMU_ROUTE_LOCATION_LOC1 (_CMU_ROUTE_LOCATION_LOC1 << 2)

Shifted mode LOC1 for CMU_ROUTE

Definition at line 8278 of file efm32g890f128.h.

#define CMU_STATUS_AUXHFRCOENS (0x1UL << 4)

AUXHFRCO Enable Status

Definition at line 7707 of file efm32g890f128.h.

#define CMU_STATUS_AUXHFRCOENS_DEFAULT (_CMU_STATUS_AUXHFRCOENS_DEFAULT << 4)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7711 of file efm32g890f128.h.

#define CMU_STATUS_AUXHFRCORDY (0x1UL << 5)

AUXHFRCO Ready

Definition at line 7712 of file efm32g890f128.h.

#define CMU_STATUS_AUXHFRCORDY_DEFAULT (_CMU_STATUS_AUXHFRCORDY_DEFAULT << 5)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7716 of file efm32g890f128.h.

#define CMU_STATUS_CALBSY (0x1UL << 14)

Calibration Busy

Definition at line 7757 of file efm32g890f128.h.

#define CMU_STATUS_CALBSY_DEFAULT (_CMU_STATUS_CALBSY_DEFAULT << 14)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7761 of file efm32g890f128.h.

#define CMU_STATUS_HFRCOENS (0x1UL << 0)

HFRCO Enable Status

Definition at line 7687 of file efm32g890f128.h.

#define CMU_STATUS_HFRCOENS_DEFAULT (_CMU_STATUS_HFRCOENS_DEFAULT << 0)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7691 of file efm32g890f128.h.

#define CMU_STATUS_HFRCORDY (0x1UL << 1)

HFRCO Ready

Definition at line 7692 of file efm32g890f128.h.

#define CMU_STATUS_HFRCORDY_DEFAULT (_CMU_STATUS_HFRCORDY_DEFAULT << 1)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7696 of file efm32g890f128.h.

#define CMU_STATUS_HFRCOSEL (0x1UL << 10)

HFRCO Selected

Definition at line 7737 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_STATUS_HFRCOSEL_DEFAULT (_CMU_STATUS_HFRCOSEL_DEFAULT << 10)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7741 of file efm32g890f128.h.

#define CMU_STATUS_HFXOENS (0x1UL << 2)

HFXO Enable Status

Definition at line 7697 of file efm32g890f128.h.

#define CMU_STATUS_HFXOENS_DEFAULT (_CMU_STATUS_HFXOENS_DEFAULT << 2)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7701 of file efm32g890f128.h.

#define CMU_STATUS_HFXORDY (0x1UL << 3)

HFXO Ready

Definition at line 7702 of file efm32g890f128.h.

#define CMU_STATUS_HFXORDY_DEFAULT (_CMU_STATUS_HFXORDY_DEFAULT << 3)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7706 of file efm32g890f128.h.

#define CMU_STATUS_HFXOSEL (0x1UL << 11)

HFXO Selected

Definition at line 7742 of file efm32g890f128.h.

Referenced by SystemHFClockGet(), and SystemHFXOClockSet().

#define CMU_STATUS_HFXOSEL_DEFAULT (_CMU_STATUS_HFXOSEL_DEFAULT << 11)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7746 of file efm32g890f128.h.

#define CMU_STATUS_LFRCOENS (0x1UL << 6)

LFRCO Enable Status

Definition at line 7717 of file efm32g890f128.h.

#define CMU_STATUS_LFRCOENS_DEFAULT (_CMU_STATUS_LFRCOENS_DEFAULT << 6)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7721 of file efm32g890f128.h.

#define CMU_STATUS_LFRCORDY (0x1UL << 7)

LFRCO Ready

Definition at line 7722 of file efm32g890f128.h.

#define CMU_STATUS_LFRCORDY_DEFAULT (_CMU_STATUS_LFRCORDY_DEFAULT << 7)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7726 of file efm32g890f128.h.

#define CMU_STATUS_LFRCOSEL (0x1UL << 12)

LFRCO Selected

Definition at line 7747 of file efm32g890f128.h.

Referenced by SystemHFClockGet().

#define CMU_STATUS_LFRCOSEL_DEFAULT (_CMU_STATUS_LFRCOSEL_DEFAULT << 12)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7751 of file efm32g890f128.h.

#define CMU_STATUS_LFXOENS (0x1UL << 8)

LFXO Enable Status

Definition at line 7727 of file efm32g890f128.h.

#define CMU_STATUS_LFXOENS_DEFAULT (_CMU_STATUS_LFXOENS_DEFAULT << 8)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7731 of file efm32g890f128.h.

#define CMU_STATUS_LFXORDY (0x1UL << 9)

LFXO Ready

Definition at line 7732 of file efm32g890f128.h.

#define CMU_STATUS_LFXORDY_DEFAULT (_CMU_STATUS_LFXORDY_DEFAULT << 9)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7736 of file efm32g890f128.h.

#define CMU_STATUS_LFXOSEL (0x1UL << 13)

LFXO Selected

Definition at line 7752 of file efm32g890f128.h.

Referenced by SystemHFClockGet(), and SystemLFXOClockSet().

#define CMU_STATUS_LFXOSEL_DEFAULT (_CMU_STATUS_LFXOSEL_DEFAULT << 13)

Shifted mode DEFAULT for CMU_STATUS

Definition at line 7756 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFACLKEN0 (0x1UL << 0)

Low Frequency A Clock Enable 0 Busy

Definition at line 8005 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFACLKEN0_DEFAULT (_CMU_SYNCBUSY_LFACLKEN0_DEFAULT << 0)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 8009 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFAPRESC0 (0x1UL << 2)

Low Frequency A Prescaler 0 Busy

Definition at line 8010 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFAPRESC0_DEFAULT (_CMU_SYNCBUSY_LFAPRESC0_DEFAULT << 2)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 8014 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFBCLKEN0 (0x1UL << 4)

Low Frequency B Clock Enable 0 Busy

Definition at line 8015 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFBCLKEN0_DEFAULT (_CMU_SYNCBUSY_LFBCLKEN0_DEFAULT << 4)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 8019 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFBPRESC0 (0x1UL << 6)

Low Frequency B Prescaler 0 Busy

Definition at line 8020 of file efm32g890f128.h.

#define CMU_SYNCBUSY_LFBPRESC0_DEFAULT (_CMU_SYNCBUSY_LFBPRESC0_DEFAULT << 6)

Shifted mode DEFAULT for CMU_SYNCBUSY

Definition at line 8024 of file efm32g890f128.h.

#define CMU_UNLOCK_CODE 0x580E

CMU unlock code

Definition at line 11880 of file efm32g890f128.h.

EFM32G890F128_CMU

Data Structures

Defines

Detailed Description

Define Documentation