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Energy Micro IEC60355 Library Example Project 1.0 (internal use only!) GCC-Version
Example project demonstrating POST and BIST library functions
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|
Energy Micro IEC60355 Library Example Project 1.0 (internal use only!) GCC-Version
Example project demonstrating POST and BIST library functions
|
|
Data Structures | |
| struct | PRS_TypeDef |
Defines | |
| #define | PRS_VCMP_OUT ((1 << 16) + 0) |
| #define | PRS_ACMP0_OUT ((2 << 16) + 0) |
| #define | PRS_ACMP1_OUT ((3 << 16) + 0) |
| #define | PRS_DAC0_CH0 ((6 << 16) + 0) |
| #define | PRS_DAC0_CH1 ((6 << 16) + 1) |
| #define | PRS_ADC0_SINGLE ((8 << 16) + 0) |
| #define | PRS_ADC0_SCAN ((8 << 16) + 1) |
| #define | PRS_USART0_IRTX ((16 << 16) + 0) |
| #define | PRS_USART0_TXC ((16 << 16) + 1) |
| #define | PRS_USART0_RXDATAV ((16 << 16) + 2) |
| #define | PRS_USART1_IRTX ((17 << 16) + 0) |
| #define | PRS_USART1_TXC ((17 << 16) + 1) |
| #define | PRS_USART1_RXDATAV ((17 << 16) + 2) |
| #define | PRS_USART2_IRTX ((18 << 16) + 0) |
| #define | PRS_USART2_TXC ((18 << 16) + 1) |
| #define | PRS_USART2_RXDATAV ((18 << 16) + 2) |
| #define | PRS_TIMER0_UF ((28 << 16) + 0) |
| #define | PRS_TIMER0_OF ((28 << 16) + 1) |
| #define | PRS_TIMER0_CC0 ((28 << 16) + 2) |
| #define | PRS_TIMER0_CC1 ((28 << 16) + 3) |
| #define | PRS_TIMER0_CC2 ((28 << 16) + 4) |
| #define | PRS_TIMER1_UF ((29 << 16) + 0) |
| #define | PRS_TIMER1_OF ((29 << 16) + 1) |
| #define | PRS_TIMER1_CC0 ((29 << 16) + 2) |
| #define | PRS_TIMER1_CC1 ((29 << 16) + 3) |
| #define | PRS_TIMER1_CC2 ((29 << 16) + 4) |
| #define | PRS_TIMER2_UF ((30 << 16) + 0) |
| #define | PRS_TIMER2_OF ((30 << 16) + 1) |
| #define | PRS_TIMER2_CC0 ((30 << 16) + 2) |
| #define | PRS_TIMER2_CC1 ((30 << 16) + 3) |
| #define | PRS_TIMER2_CC2 ((30 << 16) + 4) |
| #define | PRS_RTC_OF ((40 << 16) + 0) |
| #define | PRS_RTC_COMP0 ((40 << 16) + 1) |
| #define | PRS_RTC_COMP1 ((40 << 16) + 2) |
| #define | PRS_UART0_IRTX ((41 << 16) + 0) |
| #define | PRS_UART0_TXC ((41 << 16) + 1) |
| #define | PRS_UART0_RXDATAV ((41 << 16) + 2) |
| #define | PRS_GPIO_PIN0 ((48 << 16) + 0) |
| #define | PRS_GPIO_PIN1 ((48 << 16) + 1) |
| #define | PRS_GPIO_PIN2 ((48 << 16) + 2) |
| #define | PRS_GPIO_PIN3 ((48 << 16) + 3) |
| #define | PRS_GPIO_PIN4 ((48 << 16) + 4) |
| #define | PRS_GPIO_PIN5 ((48 << 16) + 5) |
| #define | PRS_GPIO_PIN6 ((48 << 16) + 6) |
| #define | PRS_GPIO_PIN7 ((48 << 16) + 7) |
| #define | PRS_GPIO_PIN8 ((49 << 16) + 0) |
| #define | PRS_GPIO_PIN9 ((49 << 16) + 1) |
| #define | PRS_GPIO_PIN10 ((49 << 16) + 2) |
| #define | PRS_GPIO_PIN11 ((49 << 16) + 3) |
| #define | PRS_GPIO_PIN12 ((49 << 16) + 4) |
| #define | PRS_GPIO_PIN13 ((49 << 16) + 5) |
| #define | PRS_GPIO_PIN14 ((49 << 16) + 6) |
| #define | PRS_GPIO_PIN15 ((49 << 16) + 7) |
| #define | _PRS_SWPULSE_RESETVALUE 0x00000000UL |
| #define | _PRS_SWPULSE_MASK 0x000000FFUL |
| #define | PRS_SWPULSE_CH0PULSE (0x1UL << 0) |
| #define | _PRS_SWPULSE_CH0PULSE_SHIFT 0 |
| #define | _PRS_SWPULSE_CH0PULSE_MASK 0x1UL |
| #define | _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) |
| #define | PRS_SWPULSE_CH1PULSE (0x1UL << 1) |
| #define | _PRS_SWPULSE_CH1PULSE_SHIFT 1 |
| #define | _PRS_SWPULSE_CH1PULSE_MASK 0x2UL |
| #define | _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) |
| #define | PRS_SWPULSE_CH2PULSE (0x1UL << 2) |
| #define | _PRS_SWPULSE_CH2PULSE_SHIFT 2 |
| #define | _PRS_SWPULSE_CH2PULSE_MASK 0x4UL |
| #define | _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) |
| #define | PRS_SWPULSE_CH3PULSE (0x1UL << 3) |
| #define | _PRS_SWPULSE_CH3PULSE_SHIFT 3 |
| #define | _PRS_SWPULSE_CH3PULSE_MASK 0x8UL |
| #define | _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) |
| #define | PRS_SWPULSE_CH4PULSE (0x1UL << 4) |
| #define | _PRS_SWPULSE_CH4PULSE_SHIFT 4 |
| #define | _PRS_SWPULSE_CH4PULSE_MASK 0x10UL |
| #define | _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) |
| #define | PRS_SWPULSE_CH5PULSE (0x1UL << 5) |
| #define | _PRS_SWPULSE_CH5PULSE_SHIFT 5 |
| #define | _PRS_SWPULSE_CH5PULSE_MASK 0x20UL |
| #define | _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) |
| #define | PRS_SWPULSE_CH6PULSE (0x1UL << 6) |
| #define | _PRS_SWPULSE_CH6PULSE_SHIFT 6 |
| #define | _PRS_SWPULSE_CH6PULSE_MASK 0x40UL |
| #define | _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) |
| #define | PRS_SWPULSE_CH7PULSE (0x1UL << 7) |
| #define | _PRS_SWPULSE_CH7PULSE_SHIFT 7 |
| #define | _PRS_SWPULSE_CH7PULSE_MASK 0x80UL |
| #define | _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL |
| #define | PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) |
| #define | _PRS_SWLEVEL_RESETVALUE 0x00000000UL |
| #define | _PRS_SWLEVEL_MASK 0x000000FFUL |
| #define | PRS_SWLEVEL_CH0LEVEL (0x1UL << 0) |
| #define | _PRS_SWLEVEL_CH0LEVEL_SHIFT 0 |
| #define | _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL |
| #define | _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) |
| #define | PRS_SWLEVEL_CH1LEVEL (0x1UL << 1) |
| #define | _PRS_SWLEVEL_CH1LEVEL_SHIFT 1 |
| #define | _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL |
| #define | _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) |
| #define | PRS_SWLEVEL_CH2LEVEL (0x1UL << 2) |
| #define | _PRS_SWLEVEL_CH2LEVEL_SHIFT 2 |
| #define | _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL |
| #define | _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) |
| #define | PRS_SWLEVEL_CH3LEVEL (0x1UL << 3) |
| #define | _PRS_SWLEVEL_CH3LEVEL_SHIFT 3 |
| #define | _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL |
| #define | _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) |
| #define | PRS_SWLEVEL_CH4LEVEL (0x1UL << 4) |
| #define | _PRS_SWLEVEL_CH4LEVEL_SHIFT 4 |
| #define | _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL |
| #define | _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) |
| #define | PRS_SWLEVEL_CH5LEVEL (0x1UL << 5) |
| #define | _PRS_SWLEVEL_CH5LEVEL_SHIFT 5 |
| #define | _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL |
| #define | _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) |
| #define | PRS_SWLEVEL_CH6LEVEL (0x1UL << 6) |
| #define | _PRS_SWLEVEL_CH6LEVEL_SHIFT 6 |
| #define | _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL |
| #define | _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) |
| #define | PRS_SWLEVEL_CH7LEVEL (0x1UL << 7) |
| #define | _PRS_SWLEVEL_CH7LEVEL_SHIFT 7 |
| #define | _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL |
| #define | _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL |
| #define | PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) |
| #define | _PRS_CH_CTRL_RESETVALUE 0x00000000UL |
| #define | _PRS_CH_CTRL_MASK 0x033F0007UL |
| #define | _PRS_CH_CTRL_SIGSEL_SHIFT 0 |
| #define | _PRS_CH_CTRL_SIGSEL_MASK 0x7UL |
| #define | _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL |
| #define | _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_UART0TXC 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL |
| #define | _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL |
| #define | _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL |
| #define | PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0) |
| #define | PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0) |
| #define | PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0) |
| #define | PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0) |
| #define | PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_UART0TXC (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) |
| #define | PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_UART0RXDATAV (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0) |
| #define | PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0) |
| #define | _PRS_CH_CTRL_SOURCESEL_SHIFT 16 |
| #define | _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL |
| #define | _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL |
| #define | _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL |
| #define | _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL |
| #define | _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL |
| #define | _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL |
| #define | _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL |
| #define | _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL |
| #define | _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL |
| #define | _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL |
| #define | _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL |
| #define | _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL |
| #define | _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL |
| #define | _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL |
| #define | _PRS_CH_CTRL_SOURCESEL_UART0 0x00000029UL |
| #define | _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL |
| #define | _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL |
| #define | PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_UART0 (_PRS_CH_CTRL_SOURCESEL_UART0 << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16) |
| #define | PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16) |
| #define | _PRS_CH_CTRL_EDSEL_SHIFT 24 |
| #define | _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL |
| #define | _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL |
| #define | _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL |
| #define | _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL |
| #define | _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL |
| #define | _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL |
| #define | PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24) |
| #define | PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24) |
| #define | PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24) |
| #define | PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24) |
| #define | PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24) |
PRS Signal names.
| #define _PRS_CH_CTRL_EDSEL_BOTHEDGES 0x00000003UL |
Mode BOTHEDGES for PRS_CH_CTRL
Definition at line 9930 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_CH_CTRL
Definition at line 9926 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_MASK 0x3000000UL |
Bit mask for PRS_EDSEL
Definition at line 9925 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_NEGEDGE 0x00000002UL |
Mode NEGEDGE for PRS_CH_CTRL
Definition at line 9929 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_OFF 0x00000000UL |
Mode OFF for PRS_CH_CTRL
Definition at line 9927 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_POSEDGE 0x00000001UL |
Mode POSEDGE for PRS_CH_CTRL
Definition at line 9928 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_EDSEL_SHIFT 24 |
Shift value for PRS_EDSEL
Definition at line 9924 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_MASK 0x033F0007UL |
Mask for PRS_CH_CTRL
Definition at line 9787 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_RESETVALUE 0x00000000UL |
Default value for PRS_CH_CTRL
Definition at line 9786 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_ACMP0OUT 0x00000000UL |
Mode ACMP0OUT for PRS_CH_CTRL
Definition at line 9791 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_ACMP1OUT 0x00000000UL |
Mode ACMP1OUT for PRS_CH_CTRL
Definition at line 9792 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_ADC0SCAN 0x00000001UL |
Mode ADC0SCAN for PRS_CH_CTRL
Definition at line 9803 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_ADC0SINGLE 0x00000000UL |
Mode ADC0SINGLE for PRS_CH_CTRL
Definition at line 9794 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_DAC0CH0 0x00000000UL |
Mode DAC0CH0 for PRS_CH_CTRL
Definition at line 9793 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_DAC0CH1 0x00000001UL |
Mode DAC0CH1 for PRS_CH_CTRL
Definition at line 9802 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN0 0x00000000UL |
Mode GPIOPIN0 for PRS_CH_CTRL
Definition at line 9800 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN1 0x00000001UL |
Mode GPIOPIN1 for PRS_CH_CTRL
Definition at line 9812 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN10 0x00000002UL |
Mode GPIOPIN10 for PRS_CH_CTRL
Definition at line 9823 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN11 0x00000003UL |
Mode GPIOPIN11 for PRS_CH_CTRL
Definition at line 9828 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN12 0x00000004UL |
Mode GPIOPIN12 for PRS_CH_CTRL
Definition at line 9833 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN13 0x00000005UL |
Mode GPIOPIN13 for PRS_CH_CTRL
Definition at line 9835 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN14 0x00000006UL |
Mode GPIOPIN14 for PRS_CH_CTRL
Definition at line 9837 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN15 0x00000007UL |
Mode GPIOPIN15 for PRS_CH_CTRL
Definition at line 9839 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN2 0x00000002UL |
Mode GPIOPIN2 for PRS_CH_CTRL
Definition at line 9822 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN3 0x00000003UL |
Mode GPIOPIN3 for PRS_CH_CTRL
Definition at line 9827 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN4 0x00000004UL |
Mode GPIOPIN4 for PRS_CH_CTRL
Definition at line 9832 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN5 0x00000005UL |
Mode GPIOPIN5 for PRS_CH_CTRL
Definition at line 9834 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN6 0x00000006UL |
Mode GPIOPIN6 for PRS_CH_CTRL
Definition at line 9836 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN7 0x00000007UL |
Mode GPIOPIN7 for PRS_CH_CTRL
Definition at line 9838 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN8 0x00000000UL |
Mode GPIOPIN8 for PRS_CH_CTRL
Definition at line 9801 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_GPIOPIN9 0x00000001UL |
Mode GPIOPIN9 for PRS_CH_CTRL
Definition at line 9813 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_MASK 0x7UL |
Bit mask for PRS_SIGSEL
Definition at line 9789 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_RTCCOMP0 0x00000001UL |
Mode RTCCOMP0 for PRS_CH_CTRL
Definition at line 9810 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_RTCCOMP1 0x00000002UL |
Mode RTCCOMP1 for PRS_CH_CTRL
Definition at line 9820 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_RTCOF 0x00000000UL |
Mode RTCOF for PRS_CH_CTRL
Definition at line 9799 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_SHIFT 0 |
Shift value for PRS_SIGSEL
Definition at line 9788 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER0CC0 0x00000002UL |
Mode TIMER0CC0 for PRS_CH_CTRL
Definition at line 9817 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER0CC1 0x00000003UL |
Mode TIMER0CC1 for PRS_CH_CTRL
Definition at line 9824 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER0CC2 0x00000004UL |
Mode TIMER0CC2 for PRS_CH_CTRL
Definition at line 9829 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER0OF 0x00000001UL |
Mode TIMER0OF for PRS_CH_CTRL
Definition at line 9807 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER0UF 0x00000000UL |
Mode TIMER0UF for PRS_CH_CTRL
Definition at line 9796 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER1CC0 0x00000002UL |
Mode TIMER1CC0 for PRS_CH_CTRL
Definition at line 9818 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER1CC1 0x00000003UL |
Mode TIMER1CC1 for PRS_CH_CTRL
Definition at line 9825 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER1CC2 0x00000004UL |
Mode TIMER1CC2 for PRS_CH_CTRL
Definition at line 9830 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER1OF 0x00000001UL |
Mode TIMER1OF for PRS_CH_CTRL
Definition at line 9808 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER1UF 0x00000000UL |
Mode TIMER1UF for PRS_CH_CTRL
Definition at line 9797 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER2CC0 0x00000002UL |
Mode TIMER2CC0 for PRS_CH_CTRL
Definition at line 9819 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER2CC1 0x00000003UL |
Mode TIMER2CC1 for PRS_CH_CTRL
Definition at line 9826 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER2CC2 0x00000004UL |
Mode TIMER2CC2 for PRS_CH_CTRL
Definition at line 9831 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER2OF 0x00000001UL |
Mode TIMER2OF for PRS_CH_CTRL
Definition at line 9809 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_TIMER2UF 0x00000000UL |
Mode TIMER2UF for PRS_CH_CTRL
Definition at line 9798 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_UART0RXDATAV 0x00000002UL |
Mode UART0RXDATAV for PRS_CH_CTRL
Definition at line 9821 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_UART0TXC 0x00000001UL |
Mode UART0TXC for PRS_CH_CTRL
Definition at line 9811 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART0IRTX 0x00000000UL |
Mode USART0IRTX for PRS_CH_CTRL
Definition at line 9795 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART0RXDATAV 0x00000002UL |
Mode USART0RXDATAV for PRS_CH_CTRL
Definition at line 9814 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART0TXC 0x00000001UL |
Mode USART0TXC for PRS_CH_CTRL
Definition at line 9804 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART1RXDATAV 0x00000002UL |
Mode USART1RXDATAV for PRS_CH_CTRL
Definition at line 9815 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART1TXC 0x00000001UL |
Mode USART1TXC for PRS_CH_CTRL
Definition at line 9805 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART2RXDATAV 0x00000002UL |
Mode USART2RXDATAV for PRS_CH_CTRL
Definition at line 9816 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_USART2TXC 0x00000001UL |
Mode USART2TXC for PRS_CH_CTRL
Definition at line 9806 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SIGSEL_VCMPOUT 0x00000000UL |
Mode VCMPOUT for PRS_CH_CTRL
Definition at line 9790 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_ACMP0 0x00000002UL |
Mode ACMP0 for PRS_CH_CTRL
Definition at line 9894 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_ACMP1 0x00000003UL |
Mode ACMP1 for PRS_CH_CTRL
Definition at line 9895 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_ADC0 0x00000008UL |
Mode ADC0 for PRS_CH_CTRL
Definition at line 9897 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_DAC0 0x00000006UL |
Mode DAC0 for PRS_CH_CTRL
Definition at line 9896 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_GPIOH 0x00000031UL |
Mode GPIOH for PRS_CH_CTRL
Definition at line 9907 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_GPIOL 0x00000030UL |
Mode GPIOL for PRS_CH_CTRL
Definition at line 9906 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_MASK 0x3F0000UL |
Bit mask for PRS_SOURCESEL
Definition at line 9891 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_NONE 0x00000000UL |
Mode NONE for PRS_CH_CTRL
Definition at line 9892 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_RTC 0x00000028UL |
Mode RTC for PRS_CH_CTRL
Definition at line 9904 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_SHIFT 16 |
Shift value for PRS_SOURCESEL
Definition at line 9890 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_TIMER0 0x0000001CUL |
Mode TIMER0 for PRS_CH_CTRL
Definition at line 9901 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_TIMER1 0x0000001DUL |
Mode TIMER1 for PRS_CH_CTRL
Definition at line 9902 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_TIMER2 0x0000001EUL |
Mode TIMER2 for PRS_CH_CTRL
Definition at line 9903 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_UART0 0x00000029UL |
Mode UART0 for PRS_CH_CTRL
Definition at line 9905 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_USART0 0x00000010UL |
Mode USART0 for PRS_CH_CTRL
Definition at line 9898 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_USART1 0x00000011UL |
Mode USART1 for PRS_CH_CTRL
Definition at line 9899 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_USART2 0x00000012UL |
Mode USART2 for PRS_CH_CTRL
Definition at line 9900 of file efm32g890f128.h.
| #define _PRS_CH_CTRL_SOURCESEL_VCMP 0x00000001UL |
Mode VCMP for PRS_CH_CTRL
Definition at line 9893 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH0LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9747 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH0LEVEL_MASK 0x1UL |
Bit mask for PRS_CH0LEVEL
Definition at line 9746 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH0LEVEL_SHIFT 0 |
Shift value for PRS_CH0LEVEL
Definition at line 9745 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH1LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9752 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH1LEVEL_MASK 0x2UL |
Bit mask for PRS_CH1LEVEL
Definition at line 9751 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH1LEVEL_SHIFT 1 |
Shift value for PRS_CH1LEVEL
Definition at line 9750 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH2LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9757 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH2LEVEL_MASK 0x4UL |
Bit mask for PRS_CH2LEVEL
Definition at line 9756 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH2LEVEL_SHIFT 2 |
Shift value for PRS_CH2LEVEL
Definition at line 9755 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH3LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9762 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH3LEVEL_MASK 0x8UL |
Bit mask for PRS_CH3LEVEL
Definition at line 9761 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH3LEVEL_SHIFT 3 |
Shift value for PRS_CH3LEVEL
Definition at line 9760 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH4LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9767 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH4LEVEL_MASK 0x10UL |
Bit mask for PRS_CH4LEVEL
Definition at line 9766 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH4LEVEL_SHIFT 4 |
Shift value for PRS_CH4LEVEL
Definition at line 9765 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH5LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9772 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH5LEVEL_MASK 0x20UL |
Bit mask for PRS_CH5LEVEL
Definition at line 9771 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH5LEVEL_SHIFT 5 |
Shift value for PRS_CH5LEVEL
Definition at line 9770 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH6LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9777 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH6LEVEL_MASK 0x40UL |
Bit mask for PRS_CH6LEVEL
Definition at line 9776 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH6LEVEL_SHIFT 6 |
Shift value for PRS_CH6LEVEL
Definition at line 9775 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH7LEVEL_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWLEVEL
Definition at line 9782 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH7LEVEL_MASK 0x80UL |
Bit mask for PRS_CH7LEVEL
Definition at line 9781 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_CH7LEVEL_SHIFT 7 |
Shift value for PRS_CH7LEVEL
Definition at line 9780 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_MASK 0x000000FFUL |
Mask for PRS_SWLEVEL
Definition at line 9743 of file efm32g890f128.h.
| #define _PRS_SWLEVEL_RESETVALUE 0x00000000UL |
Default value for PRS_SWLEVEL
Definition at line 9742 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH0PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9703 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH0PULSE_MASK 0x1UL |
Bit mask for PRS_CH0PULSE
Definition at line 9702 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH0PULSE_SHIFT 0 |
Shift value for PRS_CH0PULSE
Definition at line 9701 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH1PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9708 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH1PULSE_MASK 0x2UL |
Bit mask for PRS_CH1PULSE
Definition at line 9707 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH1PULSE_SHIFT 1 |
Shift value for PRS_CH1PULSE
Definition at line 9706 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH2PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9713 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH2PULSE_MASK 0x4UL |
Bit mask for PRS_CH2PULSE
Definition at line 9712 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH2PULSE_SHIFT 2 |
Shift value for PRS_CH2PULSE
Definition at line 9711 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH3PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9718 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH3PULSE_MASK 0x8UL |
Bit mask for PRS_CH3PULSE
Definition at line 9717 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH3PULSE_SHIFT 3 |
Shift value for PRS_CH3PULSE
Definition at line 9716 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH4PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9723 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH4PULSE_MASK 0x10UL |
Bit mask for PRS_CH4PULSE
Definition at line 9722 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH4PULSE_SHIFT 4 |
Shift value for PRS_CH4PULSE
Definition at line 9721 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH5PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9728 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH5PULSE_MASK 0x20UL |
Bit mask for PRS_CH5PULSE
Definition at line 9727 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH5PULSE_SHIFT 5 |
Shift value for PRS_CH5PULSE
Definition at line 9726 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH6PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9733 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH6PULSE_MASK 0x40UL |
Bit mask for PRS_CH6PULSE
Definition at line 9732 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH6PULSE_SHIFT 6 |
Shift value for PRS_CH6PULSE
Definition at line 9731 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH7PULSE_DEFAULT 0x00000000UL |
Mode DEFAULT for PRS_SWPULSE
Definition at line 9738 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH7PULSE_MASK 0x80UL |
Bit mask for PRS_CH7PULSE
Definition at line 9737 of file efm32g890f128.h.
| #define _PRS_SWPULSE_CH7PULSE_SHIFT 7 |
Shift value for PRS_CH7PULSE
Definition at line 9736 of file efm32g890f128.h.
| #define _PRS_SWPULSE_MASK 0x000000FFUL |
Mask for PRS_SWPULSE
Definition at line 9699 of file efm32g890f128.h.
| #define _PRS_SWPULSE_RESETVALUE 0x00000000UL |
Default value for PRS_SWPULSE
Definition at line 9698 of file efm32g890f128.h.
| #define PRS_ACMP0_OUT ((2 << 16) + 0) |
PRS Analog comparator output
Definition at line 955 of file efm32g890f128.h.
| #define PRS_ACMP1_OUT ((3 << 16) + 0) |
PRS Analog comparator output
Definition at line 956 of file efm32g890f128.h.
| #define PRS_ADC0_SCAN ((8 << 16) + 1) |
PRS ADC scan conversion done
Definition at line 960 of file efm32g890f128.h.
| #define PRS_ADC0_SINGLE ((8 << 16) + 0) |
PRS ADC single conversion done
Definition at line 959 of file efm32g890f128.h.
| #define PRS_CH_CTRL_EDSEL_BOTHEDGES (_PRS_CH_CTRL_EDSEL_BOTHEDGES << 24) |
Shifted mode BOTHEDGES for PRS_CH_CTRL
Definition at line 9935 of file efm32g890f128.h.
| #define PRS_CH_CTRL_EDSEL_DEFAULT (_PRS_CH_CTRL_EDSEL_DEFAULT << 24) |
Shifted mode DEFAULT for PRS_CH_CTRL
Definition at line 9931 of file efm32g890f128.h.
| #define PRS_CH_CTRL_EDSEL_NEGEDGE (_PRS_CH_CTRL_EDSEL_NEGEDGE << 24) |
Shifted mode NEGEDGE for PRS_CH_CTRL
Definition at line 9934 of file efm32g890f128.h.
| #define PRS_CH_CTRL_EDSEL_OFF (_PRS_CH_CTRL_EDSEL_OFF << 24) |
Shifted mode OFF for PRS_CH_CTRL
Definition at line 9932 of file efm32g890f128.h.
| #define PRS_CH_CTRL_EDSEL_POSEDGE (_PRS_CH_CTRL_EDSEL_POSEDGE << 24) |
Shifted mode POSEDGE for PRS_CH_CTRL
Definition at line 9933 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_ACMP0OUT (_PRS_CH_CTRL_SIGSEL_ACMP0OUT << 0) |
Shifted mode ACMP0OUT for PRS_CH_CTRL
Definition at line 9841 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_ACMP1OUT (_PRS_CH_CTRL_SIGSEL_ACMP1OUT << 0) |
Shifted mode ACMP1OUT for PRS_CH_CTRL
Definition at line 9842 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_ADC0SCAN (_PRS_CH_CTRL_SIGSEL_ADC0SCAN << 0) |
Shifted mode ADC0SCAN for PRS_CH_CTRL
Definition at line 9853 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_ADC0SINGLE (_PRS_CH_CTRL_SIGSEL_ADC0SINGLE << 0) |
Shifted mode ADC0SINGLE for PRS_CH_CTRL
Definition at line 9844 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_DAC0CH0 (_PRS_CH_CTRL_SIGSEL_DAC0CH0 << 0) |
Shifted mode DAC0CH0 for PRS_CH_CTRL
Definition at line 9843 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_DAC0CH1 (_PRS_CH_CTRL_SIGSEL_DAC0CH1 << 0) |
Shifted mode DAC0CH1 for PRS_CH_CTRL
Definition at line 9852 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN0 (_PRS_CH_CTRL_SIGSEL_GPIOPIN0 << 0) |
Shifted mode GPIOPIN0 for PRS_CH_CTRL
Definition at line 9850 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN1 (_PRS_CH_CTRL_SIGSEL_GPIOPIN1 << 0) |
Shifted mode GPIOPIN1 for PRS_CH_CTRL
Definition at line 9862 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN10 (_PRS_CH_CTRL_SIGSEL_GPIOPIN10 << 0) |
Shifted mode GPIOPIN10 for PRS_CH_CTRL
Definition at line 9873 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN11 (_PRS_CH_CTRL_SIGSEL_GPIOPIN11 << 0) |
Shifted mode GPIOPIN11 for PRS_CH_CTRL
Definition at line 9878 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN12 (_PRS_CH_CTRL_SIGSEL_GPIOPIN12 << 0) |
Shifted mode GPIOPIN12 for PRS_CH_CTRL
Definition at line 9883 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN13 (_PRS_CH_CTRL_SIGSEL_GPIOPIN13 << 0) |
Shifted mode GPIOPIN13 for PRS_CH_CTRL
Definition at line 9885 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN14 (_PRS_CH_CTRL_SIGSEL_GPIOPIN14 << 0) |
Shifted mode GPIOPIN14 for PRS_CH_CTRL
Definition at line 9887 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN15 (_PRS_CH_CTRL_SIGSEL_GPIOPIN15 << 0) |
Shifted mode GPIOPIN15 for PRS_CH_CTRL
Definition at line 9889 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN2 (_PRS_CH_CTRL_SIGSEL_GPIOPIN2 << 0) |
Shifted mode GPIOPIN2 for PRS_CH_CTRL
Definition at line 9872 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN3 (_PRS_CH_CTRL_SIGSEL_GPIOPIN3 << 0) |
Shifted mode GPIOPIN3 for PRS_CH_CTRL
Definition at line 9877 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN4 (_PRS_CH_CTRL_SIGSEL_GPIOPIN4 << 0) |
Shifted mode GPIOPIN4 for PRS_CH_CTRL
Definition at line 9882 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN5 (_PRS_CH_CTRL_SIGSEL_GPIOPIN5 << 0) |
Shifted mode GPIOPIN5 for PRS_CH_CTRL
Definition at line 9884 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN6 (_PRS_CH_CTRL_SIGSEL_GPIOPIN6 << 0) |
Shifted mode GPIOPIN6 for PRS_CH_CTRL
Definition at line 9886 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN7 (_PRS_CH_CTRL_SIGSEL_GPIOPIN7 << 0) |
Shifted mode GPIOPIN7 for PRS_CH_CTRL
Definition at line 9888 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN8 (_PRS_CH_CTRL_SIGSEL_GPIOPIN8 << 0) |
Shifted mode GPIOPIN8 for PRS_CH_CTRL
Definition at line 9851 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_GPIOPIN9 (_PRS_CH_CTRL_SIGSEL_GPIOPIN9 << 0) |
Shifted mode GPIOPIN9 for PRS_CH_CTRL
Definition at line 9863 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_RTCCOMP0 (_PRS_CH_CTRL_SIGSEL_RTCCOMP0 << 0) |
Shifted mode RTCCOMP0 for PRS_CH_CTRL
Definition at line 9860 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_RTCCOMP1 (_PRS_CH_CTRL_SIGSEL_RTCCOMP1 << 0) |
Shifted mode RTCCOMP1 for PRS_CH_CTRL
Definition at line 9870 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_RTCOF (_PRS_CH_CTRL_SIGSEL_RTCOF << 0) |
Shifted mode RTCOF for PRS_CH_CTRL
Definition at line 9849 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER0CC0 (_PRS_CH_CTRL_SIGSEL_TIMER0CC0 << 0) |
Shifted mode TIMER0CC0 for PRS_CH_CTRL
Definition at line 9867 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER0CC1 (_PRS_CH_CTRL_SIGSEL_TIMER0CC1 << 0) |
Shifted mode TIMER0CC1 for PRS_CH_CTRL
Definition at line 9874 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER0CC2 (_PRS_CH_CTRL_SIGSEL_TIMER0CC2 << 0) |
Shifted mode TIMER0CC2 for PRS_CH_CTRL
Definition at line 9879 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER0OF (_PRS_CH_CTRL_SIGSEL_TIMER0OF << 0) |
Shifted mode TIMER0OF for PRS_CH_CTRL
Definition at line 9857 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER0UF (_PRS_CH_CTRL_SIGSEL_TIMER0UF << 0) |
Shifted mode TIMER0UF for PRS_CH_CTRL
Definition at line 9846 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER1CC0 (_PRS_CH_CTRL_SIGSEL_TIMER1CC0 << 0) |
Shifted mode TIMER1CC0 for PRS_CH_CTRL
Definition at line 9868 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER1CC1 (_PRS_CH_CTRL_SIGSEL_TIMER1CC1 << 0) |
Shifted mode TIMER1CC1 for PRS_CH_CTRL
Definition at line 9875 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER1CC2 (_PRS_CH_CTRL_SIGSEL_TIMER1CC2 << 0) |
Shifted mode TIMER1CC2 for PRS_CH_CTRL
Definition at line 9880 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER1OF (_PRS_CH_CTRL_SIGSEL_TIMER1OF << 0) |
Shifted mode TIMER1OF for PRS_CH_CTRL
Definition at line 9858 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER1UF (_PRS_CH_CTRL_SIGSEL_TIMER1UF << 0) |
Shifted mode TIMER1UF for PRS_CH_CTRL
Definition at line 9847 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER2CC0 (_PRS_CH_CTRL_SIGSEL_TIMER2CC0 << 0) |
Shifted mode TIMER2CC0 for PRS_CH_CTRL
Definition at line 9869 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER2CC1 (_PRS_CH_CTRL_SIGSEL_TIMER2CC1 << 0) |
Shifted mode TIMER2CC1 for PRS_CH_CTRL
Definition at line 9876 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER2CC2 (_PRS_CH_CTRL_SIGSEL_TIMER2CC2 << 0) |
Shifted mode TIMER2CC2 for PRS_CH_CTRL
Definition at line 9881 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER2OF (_PRS_CH_CTRL_SIGSEL_TIMER2OF << 0) |
Shifted mode TIMER2OF for PRS_CH_CTRL
Definition at line 9859 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_TIMER2UF (_PRS_CH_CTRL_SIGSEL_TIMER2UF << 0) |
Shifted mode TIMER2UF for PRS_CH_CTRL
Definition at line 9848 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_UART0RXDATAV (_PRS_CH_CTRL_SIGSEL_UART0RXDATAV << 0) |
Shifted mode UART0RXDATAV for PRS_CH_CTRL
Definition at line 9871 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_UART0TXC (_PRS_CH_CTRL_SIGSEL_UART0TXC << 0) |
Shifted mode UART0TXC for PRS_CH_CTRL
Definition at line 9861 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART0IRTX (_PRS_CH_CTRL_SIGSEL_USART0IRTX << 0) |
Shifted mode USART0IRTX for PRS_CH_CTRL
Definition at line 9845 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART0RXDATAV (_PRS_CH_CTRL_SIGSEL_USART0RXDATAV << 0) |
Shifted mode USART0RXDATAV for PRS_CH_CTRL
Definition at line 9864 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART0TXC (_PRS_CH_CTRL_SIGSEL_USART0TXC << 0) |
Shifted mode USART0TXC for PRS_CH_CTRL
Definition at line 9854 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART1RXDATAV (_PRS_CH_CTRL_SIGSEL_USART1RXDATAV << 0) |
Shifted mode USART1RXDATAV for PRS_CH_CTRL
Definition at line 9865 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART1TXC (_PRS_CH_CTRL_SIGSEL_USART1TXC << 0) |
Shifted mode USART1TXC for PRS_CH_CTRL
Definition at line 9855 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART2RXDATAV (_PRS_CH_CTRL_SIGSEL_USART2RXDATAV << 0) |
Shifted mode USART2RXDATAV for PRS_CH_CTRL
Definition at line 9866 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_USART2TXC (_PRS_CH_CTRL_SIGSEL_USART2TXC << 0) |
Shifted mode USART2TXC for PRS_CH_CTRL
Definition at line 9856 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SIGSEL_VCMPOUT (_PRS_CH_CTRL_SIGSEL_VCMPOUT << 0) |
Shifted mode VCMPOUT for PRS_CH_CTRL
Definition at line 9840 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_ACMP0 (_PRS_CH_CTRL_SOURCESEL_ACMP0 << 16) |
Shifted mode ACMP0 for PRS_CH_CTRL
Definition at line 9910 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_ACMP1 (_PRS_CH_CTRL_SOURCESEL_ACMP1 << 16) |
Shifted mode ACMP1 for PRS_CH_CTRL
Definition at line 9911 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_ADC0 (_PRS_CH_CTRL_SOURCESEL_ADC0 << 16) |
Shifted mode ADC0 for PRS_CH_CTRL
Definition at line 9913 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_DAC0 (_PRS_CH_CTRL_SOURCESEL_DAC0 << 16) |
Shifted mode DAC0 for PRS_CH_CTRL
Definition at line 9912 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_GPIOH (_PRS_CH_CTRL_SOURCESEL_GPIOH << 16) |
Shifted mode GPIOH for PRS_CH_CTRL
Definition at line 9923 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_GPIOL (_PRS_CH_CTRL_SOURCESEL_GPIOL << 16) |
Shifted mode GPIOL for PRS_CH_CTRL
Definition at line 9922 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_NONE (_PRS_CH_CTRL_SOURCESEL_NONE << 16) |
Shifted mode NONE for PRS_CH_CTRL
Definition at line 9908 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_RTC (_PRS_CH_CTRL_SOURCESEL_RTC << 16) |
Shifted mode RTC for PRS_CH_CTRL
Definition at line 9920 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_TIMER0 (_PRS_CH_CTRL_SOURCESEL_TIMER0 << 16) |
Shifted mode TIMER0 for PRS_CH_CTRL
Definition at line 9917 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_TIMER1 (_PRS_CH_CTRL_SOURCESEL_TIMER1 << 16) |
Shifted mode TIMER1 for PRS_CH_CTRL
Definition at line 9918 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_TIMER2 (_PRS_CH_CTRL_SOURCESEL_TIMER2 << 16) |
Shifted mode TIMER2 for PRS_CH_CTRL
Definition at line 9919 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_UART0 (_PRS_CH_CTRL_SOURCESEL_UART0 << 16) |
Shifted mode UART0 for PRS_CH_CTRL
Definition at line 9921 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_USART0 (_PRS_CH_CTRL_SOURCESEL_USART0 << 16) |
Shifted mode USART0 for PRS_CH_CTRL
Definition at line 9914 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_USART1 (_PRS_CH_CTRL_SOURCESEL_USART1 << 16) |
Shifted mode USART1 for PRS_CH_CTRL
Definition at line 9915 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_USART2 (_PRS_CH_CTRL_SOURCESEL_USART2 << 16) |
Shifted mode USART2 for PRS_CH_CTRL
Definition at line 9916 of file efm32g890f128.h.
| #define PRS_CH_CTRL_SOURCESEL_VCMP (_PRS_CH_CTRL_SOURCESEL_VCMP << 16) |
Shifted mode VCMP for PRS_CH_CTRL
Definition at line 9909 of file efm32g890f128.h.
| #define PRS_DAC0_CH0 ((6 << 16) + 0) |
PRS DAC ch0 conversion done
Definition at line 957 of file efm32g890f128.h.
| #define PRS_DAC0_CH1 ((6 << 16) + 1) |
PRS DAC ch1 conversion done
Definition at line 958 of file efm32g890f128.h.
| #define PRS_GPIO_PIN0 ((48 << 16) + 0) |
PRS GPIO pin 0
Definition at line 991 of file efm32g890f128.h.
| #define PRS_GPIO_PIN1 ((48 << 16) + 1) |
PRS GPIO pin 1
Definition at line 992 of file efm32g890f128.h.
| #define PRS_GPIO_PIN10 ((49 << 16) + 2) |
PRS GPIO pin 10
Definition at line 1001 of file efm32g890f128.h.
| #define PRS_GPIO_PIN11 ((49 << 16) + 3) |
PRS GPIO pin 11
Definition at line 1002 of file efm32g890f128.h.
| #define PRS_GPIO_PIN12 ((49 << 16) + 4) |
PRS GPIO pin 12
Definition at line 1003 of file efm32g890f128.h.
| #define PRS_GPIO_PIN13 ((49 << 16) + 5) |
PRS GPIO pin 13
Definition at line 1004 of file efm32g890f128.h.
| #define PRS_GPIO_PIN14 ((49 << 16) + 6) |
PRS GPIO pin 14
Definition at line 1005 of file efm32g890f128.h.
| #define PRS_GPIO_PIN15 ((49 << 16) + 7) |
PRS GPIO pin 15
Definition at line 1006 of file efm32g890f128.h.
| #define PRS_GPIO_PIN2 ((48 << 16) + 2) |
PRS GPIO pin 2
Definition at line 993 of file efm32g890f128.h.
| #define PRS_GPIO_PIN3 ((48 << 16) + 3) |
PRS GPIO pin 3
Definition at line 994 of file efm32g890f128.h.
| #define PRS_GPIO_PIN4 ((48 << 16) + 4) |
PRS GPIO pin 4
Definition at line 995 of file efm32g890f128.h.
| #define PRS_GPIO_PIN5 ((48 << 16) + 5) |
PRS GPIO pin 5
Definition at line 996 of file efm32g890f128.h.
| #define PRS_GPIO_PIN6 ((48 << 16) + 6) |
PRS GPIO pin 6
Definition at line 997 of file efm32g890f128.h.
| #define PRS_GPIO_PIN7 ((48 << 16) + 7) |
PRS GPIO pin 7
Definition at line 998 of file efm32g890f128.h.
| #define PRS_GPIO_PIN8 ((49 << 16) + 0) |
PRS GPIO pin 8
Definition at line 999 of file efm32g890f128.h.
| #define PRS_GPIO_PIN9 ((49 << 16) + 1) |
PRS GPIO pin 9
Definition at line 1000 of file efm32g890f128.h.
| #define PRS_RTC_COMP0 ((40 << 16) + 1) |
PRS RTC Compare 0
Definition at line 986 of file efm32g890f128.h.
| #define PRS_RTC_COMP1 ((40 << 16) + 2) |
PRS RTC Compare 1
Definition at line 987 of file efm32g890f128.h.
| #define PRS_RTC_OF ((40 << 16) + 0) |
PRS RTC Overflow
Definition at line 985 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH0LEVEL (0x1UL << 0) |
Channel 0 Software Level
Definition at line 9744 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH0LEVEL_DEFAULT (_PRS_SWLEVEL_CH0LEVEL_DEFAULT << 0) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9748 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH1LEVEL (0x1UL << 1) |
Channel 1 Software Level
Definition at line 9749 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH1LEVEL_DEFAULT (_PRS_SWLEVEL_CH1LEVEL_DEFAULT << 1) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9753 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH2LEVEL (0x1UL << 2) |
Channel 2 Software Level
Definition at line 9754 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH2LEVEL_DEFAULT (_PRS_SWLEVEL_CH2LEVEL_DEFAULT << 2) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9758 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH3LEVEL (0x1UL << 3) |
Channel 3 Software Level
Definition at line 9759 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH3LEVEL_DEFAULT (_PRS_SWLEVEL_CH3LEVEL_DEFAULT << 3) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9763 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH4LEVEL (0x1UL << 4) |
Channel 4 Software Level
Definition at line 9764 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH4LEVEL_DEFAULT (_PRS_SWLEVEL_CH4LEVEL_DEFAULT << 4) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9768 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH5LEVEL (0x1UL << 5) |
Channel 5 Software Level
Definition at line 9769 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH5LEVEL_DEFAULT (_PRS_SWLEVEL_CH5LEVEL_DEFAULT << 5) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9773 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH6LEVEL (0x1UL << 6) |
Channel 6 Software Level
Definition at line 9774 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH6LEVEL_DEFAULT (_PRS_SWLEVEL_CH6LEVEL_DEFAULT << 6) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9778 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH7LEVEL (0x1UL << 7) |
Channel 7 Software Level
Definition at line 9779 of file efm32g890f128.h.
| #define PRS_SWLEVEL_CH7LEVEL_DEFAULT (_PRS_SWLEVEL_CH7LEVEL_DEFAULT << 7) |
Shifted mode DEFAULT for PRS_SWLEVEL
Definition at line 9783 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH0PULSE (0x1UL << 0) |
Channel 0 Pulse Generation
Definition at line 9700 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH0PULSE_DEFAULT (_PRS_SWPULSE_CH0PULSE_DEFAULT << 0) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9704 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH1PULSE (0x1UL << 1) |
Channel 1 Pulse Generation
Definition at line 9705 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH1PULSE_DEFAULT (_PRS_SWPULSE_CH1PULSE_DEFAULT << 1) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9709 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH2PULSE (0x1UL << 2) |
Channel 2 Pulse Generation
Definition at line 9710 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH2PULSE_DEFAULT (_PRS_SWPULSE_CH2PULSE_DEFAULT << 2) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9714 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH3PULSE (0x1UL << 3) |
Channel 3 Pulse Generation
Definition at line 9715 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH3PULSE_DEFAULT (_PRS_SWPULSE_CH3PULSE_DEFAULT << 3) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9719 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH4PULSE (0x1UL << 4) |
Channel 4 Pulse Generation
Definition at line 9720 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH4PULSE_DEFAULT (_PRS_SWPULSE_CH4PULSE_DEFAULT << 4) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9724 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH5PULSE (0x1UL << 5) |
Channel 5 Pulse Generation
Definition at line 9725 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH5PULSE_DEFAULT (_PRS_SWPULSE_CH5PULSE_DEFAULT << 5) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9729 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH6PULSE (0x1UL << 6) |
Channel 6 Pulse Generation
Definition at line 9730 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH6PULSE_DEFAULT (_PRS_SWPULSE_CH6PULSE_DEFAULT << 6) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9734 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH7PULSE (0x1UL << 7) |
Channel 7 Pulse Generation
Definition at line 9735 of file efm32g890f128.h.
| #define PRS_SWPULSE_CH7PULSE_DEFAULT (_PRS_SWPULSE_CH7PULSE_DEFAULT << 7) |
Shifted mode DEFAULT for PRS_SWPULSE
Definition at line 9739 of file efm32g890f128.h.
| #define PRS_TIMER0_CC0 ((28 << 16) + 2) |
PRS Timer 0 Compare/Capture 0
Definition at line 972 of file efm32g890f128.h.
| #define PRS_TIMER0_CC1 ((28 << 16) + 3) |
PRS Timer 0 Compare/Capture 1
Definition at line 973 of file efm32g890f128.h.
| #define PRS_TIMER0_CC2 ((28 << 16) + 4) |
PRS Timer 0 Compare/Capture 2
Definition at line 974 of file efm32g890f128.h.
| #define PRS_TIMER0_OF ((28 << 16) + 1) |
PRS Timer 0 Overflow
Definition at line 971 of file efm32g890f128.h.
| #define PRS_TIMER0_UF ((28 << 16) + 0) |
PRS Timer 0 Underflow
Definition at line 970 of file efm32g890f128.h.
| #define PRS_TIMER1_CC0 ((29 << 16) + 2) |
PRS Timer 1 Compare/Capture 0
Definition at line 977 of file efm32g890f128.h.
| #define PRS_TIMER1_CC1 ((29 << 16) + 3) |
PRS Timer 1 Compare/Capture 1
Definition at line 978 of file efm32g890f128.h.
| #define PRS_TIMER1_CC2 ((29 << 16) + 4) |
PRS Timer 1 Compare/Capture 2
Definition at line 979 of file efm32g890f128.h.
| #define PRS_TIMER1_OF ((29 << 16) + 1) |
PRS Timer 1 Overflow
Definition at line 976 of file efm32g890f128.h.
| #define PRS_TIMER1_UF ((29 << 16) + 0) |
PRS Timer 1 Underflow
Definition at line 975 of file efm32g890f128.h.
| #define PRS_TIMER2_CC0 ((30 << 16) + 2) |
PRS Timer 2 Compare/Capture 0
Definition at line 982 of file efm32g890f128.h.
| #define PRS_TIMER2_CC1 ((30 << 16) + 3) |
PRS Timer 2 Compare/Capture 1
Definition at line 983 of file efm32g890f128.h.
| #define PRS_TIMER2_CC2 ((30 << 16) + 4) |
PRS Timer 2 Compare/Capture 2
Definition at line 984 of file efm32g890f128.h.
| #define PRS_TIMER2_OF ((30 << 16) + 1) |
PRS Timer 2 Overflow
Definition at line 981 of file efm32g890f128.h.
| #define PRS_TIMER2_UF ((30 << 16) + 0) |
PRS Timer 2 Underflow
Definition at line 980 of file efm32g890f128.h.
| #define PRS_UART0_IRTX ((41 << 16) + 0) |
PRS USART 0 IRDA out
Definition at line 988 of file efm32g890f128.h.
| #define PRS_UART0_RXDATAV ((41 << 16) + 2) |
PRS USART 0 RX Data Valid
Definition at line 990 of file efm32g890f128.h.
| #define PRS_UART0_TXC ((41 << 16) + 1) |
PRS USART 0 TX complete
Definition at line 989 of file efm32g890f128.h.
| #define PRS_USART0_IRTX ((16 << 16) + 0) |
PRS USART 0 IRDA out
Definition at line 961 of file efm32g890f128.h.
| #define PRS_USART0_RXDATAV ((16 << 16) + 2) |
PRS USART 0 RX Data Valid
Definition at line 963 of file efm32g890f128.h.
| #define PRS_USART0_TXC ((16 << 16) + 1) |
PRS USART 0 TX complete
Definition at line 962 of file efm32g890f128.h.
| #define PRS_USART1_IRTX ((17 << 16) + 0) |
PRS USART 1 IRDA out
Definition at line 964 of file efm32g890f128.h.
| #define PRS_USART1_RXDATAV ((17 << 16) + 2) |
PRS USART 1 RX Data Valid
Definition at line 966 of file efm32g890f128.h.
| #define PRS_USART1_TXC ((17 << 16) + 1) |
PRS USART 1 TX complete
Definition at line 965 of file efm32g890f128.h.
| #define PRS_USART2_IRTX ((18 << 16) + 0) |
PRS USART 2 IRDA out
Definition at line 967 of file efm32g890f128.h.
| #define PRS_USART2_RXDATAV ((18 << 16) + 2) |
PRS USART 2 RX Data Valid
Definition at line 969 of file efm32g890f128.h.
| #define PRS_USART2_TXC ((18 << 16) + 1) |
PRS USART 2 TX complete
Definition at line 968 of file efm32g890f128.h.
| #define PRS_VCMP_OUT ((1 << 16) + 0) |
PRS Voltage comparator output
Definition at line 954 of file efm32g890f128.h.
1.7.3