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Energy Micro IEC60355 Library Example Project 1.0 (internal use only!) GCC-Version
Example project demonstrating POST and BIST library functions
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Energy Micro IEC60355 Library Example Project 1.0 (internal use only!) GCC-Version
Example project demonstrating POST and BIST library functions
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Defines | |
| #define | MSC_BASE (0x400C0000UL) |
| #define | EMU_BASE (0x400C6000UL) |
| #define | RMU_BASE (0x400CA000UL) |
| #define | CMU_BASE (0x400C8000UL) |
| #define | AES_BASE (0x400E0000UL) |
| #define | EBI_BASE (0x40008000UL) |
| #define | GPIO_BASE (0x40006000UL) |
| #define | PRS_BASE (0x400CC000UL) |
| #define | DMA_BASE (0x400C2000UL) |
| #define | TIMER0_BASE (0x40010000UL) |
| #define | TIMER1_BASE (0x40010400UL) |
| #define | TIMER2_BASE (0x40010800UL) |
| #define | USART0_BASE (0x4000C000UL) |
| #define | USART1_BASE (0x4000C400UL) |
| #define | USART2_BASE (0x4000C800UL) |
| #define | UART0_BASE (0x4000E000UL) |
| #define | LEUART0_BASE (0x40084000UL) |
| #define | LEUART1_BASE (0x40084400UL) |
| #define | LETIMER0_BASE (0x40082000UL) |
| #define | PCNT0_BASE (0x40086000UL) |
| #define | PCNT1_BASE (0x40086400UL) |
| #define | PCNT2_BASE (0x40086800UL) |
| #define | I2C0_BASE (0x4000A000UL) |
| #define | ADC0_BASE (0x40002000UL) |
| #define | DAC0_BASE (0x40004000UL) |
| #define | ACMP0_BASE (0x40001000UL) |
| #define | ACMP1_BASE (0x40001400UL) |
| #define | VCMP_BASE (0x40000000UL) |
| #define | LCD_BASE (0x4008A000UL) |
| #define | RTC_BASE (0x40080000UL) |
| #define | WDOG_BASE (0x40088000UL) |
| #define | CALIBRATE_BASE (0x0FE08000UL) |
| #define | DEVINFO_BASE (0x0FE081B0UL) |
| #define | ROMTABLE_BASE (0xE00FFFD0) |
| #define ACMP0_BASE (0x40001000UL) |
ACMP0 base address
Definition at line 881 of file efm32g890f128.h.
| #define ACMP1_BASE (0x40001400UL) |
ACMP1 base address
Definition at line 882 of file efm32g890f128.h.
| #define ADC0_BASE (0x40002000UL) |
ADC0 base address
Definition at line 879 of file efm32g890f128.h.
| #define AES_BASE (0x400E0000UL) |
AES base address
Definition at line 860 of file efm32g890f128.h.
| #define CALIBRATE_BASE (0x0FE08000UL) |
CALIBRATE base address
Definition at line 887 of file efm32g890f128.h.
| #define CMU_BASE (0x400C8000UL) |
CMU base address
Definition at line 859 of file efm32g890f128.h.
| #define DAC0_BASE (0x40004000UL) |
DAC0 base address
Definition at line 880 of file efm32g890f128.h.
| #define DEVINFO_BASE (0x0FE081B0UL) |
DEVINFO base address
Definition at line 888 of file efm32g890f128.h.
| #define DMA_BASE (0x400C2000UL) |
DMA base address
Definition at line 864 of file efm32g890f128.h.
| #define EBI_BASE (0x40008000UL) |
EBI base address
Definition at line 861 of file efm32g890f128.h.
| #define EMU_BASE (0x400C6000UL) |
EMU base address
Definition at line 857 of file efm32g890f128.h.
| #define GPIO_BASE (0x40006000UL) |
GPIO base address
Definition at line 862 of file efm32g890f128.h.
| #define I2C0_BASE (0x4000A000UL) |
I2C0 base address
Definition at line 878 of file efm32g890f128.h.
| #define LCD_BASE (0x4008A000UL) |
LCD base address
Definition at line 884 of file efm32g890f128.h.
| #define LETIMER0_BASE (0x40082000UL) |
LETIMER0 base address
Definition at line 874 of file efm32g890f128.h.
| #define LEUART0_BASE (0x40084000UL) |
LEUART0 base address
Definition at line 872 of file efm32g890f128.h.
| #define LEUART1_BASE (0x40084400UL) |
LEUART1 base address
Definition at line 873 of file efm32g890f128.h.
| #define MSC_BASE (0x400C0000UL) |
MSC base address
Definition at line 856 of file efm32g890f128.h.
| #define PCNT0_BASE (0x40086000UL) |
PCNT0 base address
Definition at line 875 of file efm32g890f128.h.
| #define PCNT1_BASE (0x40086400UL) |
PCNT1 base address
Definition at line 876 of file efm32g890f128.h.
| #define PCNT2_BASE (0x40086800UL) |
PCNT2 base address
Definition at line 877 of file efm32g890f128.h.
| #define PRS_BASE (0x400CC000UL) |
PRS base address
Definition at line 863 of file efm32g890f128.h.
| #define RMU_BASE (0x400CA000UL) |
RMU base address
Definition at line 858 of file efm32g890f128.h.
| #define ROMTABLE_BASE (0xE00FFFD0) |
ROMTABLE base address
Definition at line 889 of file efm32g890f128.h.
| #define RTC_BASE (0x40080000UL) |
RTC base address
Definition at line 885 of file efm32g890f128.h.
| #define TIMER0_BASE (0x40010000UL) |
TIMER0 base address
Definition at line 865 of file efm32g890f128.h.
| #define TIMER1_BASE (0x40010400UL) |
TIMER1 base address
Definition at line 866 of file efm32g890f128.h.
| #define TIMER2_BASE (0x40010800UL) |
TIMER2 base address
Definition at line 867 of file efm32g890f128.h.
| #define UART0_BASE (0x4000E000UL) |
UART0 base address
Definition at line 871 of file efm32g890f128.h.
| #define USART0_BASE (0x4000C000UL) |
USART0 base address
Definition at line 868 of file efm32g890f128.h.
| #define USART1_BASE (0x4000C400UL) |
USART1 base address
Definition at line 869 of file efm32g890f128.h.
| #define USART2_BASE (0x4000C800UL) |
USART2 base address
Definition at line 870 of file efm32g890f128.h.
| #define VCMP_BASE (0x40000000UL) |
VCMP base address
Definition at line 883 of file efm32g890f128.h.
| #define WDOG_BASE (0x40088000UL) |
WDOG base address
Definition at line 886 of file efm32g890f128.h.
1.7.3