Energy Micro IEC60355 Library Example Project 1.0 (internal use only!) GCC-Version
Example project demonstrating POST and BIST library functions

Library Configuration

This modules are prepared for specific devices and compilers.
Changing any of this will cause non or mail functionality and requires new compilation and tests.
Compiler specific issues must be regarded in concern to the user
application. Specific modules have their own configurations to keep
cross effects minimized.

  1. development environment
  2. physical target devices
  3. other internal components and structures like memory size
  4. special conditions (Tessy)
More...

Collaboration diagram for Library Configuration:

Defines

#define USE_SEMIHOSTING   0
#define USE_CMSIS_NVIC   1
#define DEBUG_WARNING   0
#define DEBUG_IDLE_TIME   1
#define STACKSIZE   (2*1024)
#define PRIVILEGED_VAR   __attribute__ ((section (".data.privileged")))
#define REVISION   SVN_REVISION_NUMBER
#define LIB_REVISION   LIB_REVISION_NUMBER
#define CPU_CLK   (32000000)
#define FLASH_SIZE   (0x00020000UL)
#define IEC60335_RAM_START   (0x20000000UL)
#define SRAM_SIZE   (0x00004000UL)
#define IEC60335_RAM_SIZE   SRAM_SIZE
#define TEST_POST_WDOG   0
#define TEST_POST_FLASH   1
#define TEST_POST_RAM   1
#define TEST_POST_CPUREG   1
#define TEST_POST_PC   1
#define USE_SYSTICK   0
#define USE_TIMER0   1
#define USE_TIMER1   0
#define LoopForever()   while (1)
#define dynamic_CRC_table   0
#define ENTRY_FLASH_CRC   { 0x0A59B834, FLASHSIZE, (uint32_t) __STEXT, FLASHSIZE, FLASH_CRC_Valid }
 struct defining the FLASH content with CRC, size etc.
#define IEC60335_RAM_buffersize   40
#define IEC60335_RAM_SP_Offset   (0x20UL)

Detailed Description

This modules are prepared for specific devices and compilers.
Changing any of this will cause non or mail functionality and requires new compilation and tests.
Compiler specific issues must be regarded in concern to the user
application. Specific modules have their own configurations to keep
cross effects minimized.

  1. development environment
  2. physical target devices
  3. other internal components and structures like memory size
  4. special conditions (Tessy)

The modules are prepared for specific devices and compilers.

Changing any of this will cause non or mail functionality and requires new compilation and tests.
Compiler specific issues must be regarded in concern to the user
application. Specific modules have their own configurations to keep
cross effects minimized.


Define Documentation

#define CPU_CLK   (32000000)

CPU main clock

Definition at line 161 of file iec60335_class_b.h.

#define DEBUG_IDLE_TIME   1

switch on/off debug code for idle time, "0" to deactivate

Definition at line 45 of file config.h.

#define DEBUG_WARNING   0

switch on/off debug code detection, "0" to deactivate

Definition at line 44 of file config.h.

#define dynamic_CRC_table   0

Definition at line 48 of file iec60335_class_b_flash_test.h.

#define ENTRY_FLASH_CRC   { 0x0A59B834, FLASHSIZE, (uint32_t) __STEXT, FLASHSIZE, FLASH_CRC_Valid }

struct defining the FLASH content with CRC, size etc.

Attention:
this struct must be filled correctly with values before using in the Flash tests. CRC32Val: this can be calculated by firmware (function IEC60335_ClassB_FLASHtest_POST) or external tools Status : set to valid to run the test

Definition at line 80 of file iec60335_class_b_flash_test.h.

#define FLASH_SIZE   (0x00020000UL)

size of FLASH memory

Definition at line 164 of file iec60335_class_b.h.

Referenced by IEC60335_ClassB_FLASHtest_BIST().

#define IEC60335_RAM_buffersize   40

Definition at line 50 of file iec60335_class_b_ram_test.h.

Referenced by IEC60335_ClassB_RAMtest_BIST().

#define IEC60335_RAM_SIZE   SRAM_SIZE

size of RAM memory in kBytes

Definition at line 171 of file iec60335_class_b.h.

Referenced by IEC60335_ClassB_RAMtest_BIST(), and IEC60335_ClassB_RAMtest_POST().

#define IEC60335_RAM_SP_Offset   (0x20UL)

Definition at line 51 of file iec60335_class_b_ram_test.h.

Referenced by IEC60335_ClassB_RAMtest().

#define IEC60335_RAM_START   (0x20000000UL)

start address of RAM memory

Definition at line 167 of file iec60335_class_b.h.

Referenced by IEC60335_ClassB_RAMtest_BIST().

#define LIB_REVISION   LIB_REVISION_NUMBER

Definition at line 52 of file config.h.

#define LoopForever ( )    while (1)

macro enables automated test

Definition at line 94 of file iec60335_class_b_def.h.

Referenced by IEC60335_ClassB_POST().

#define PRIVILEGED_VAR   __attribute__ ((section (".data.privileged")))

Definition at line 49 of file config.h.

#define REVISION   SVN_REVISION_NUMBER

Definition at line 51 of file config.h.

#define SRAM_SIZE   (0x00004000UL)

size of RAM memory

Definition at line 169 of file iec60335_class_b.h.

#define STACKSIZE   (2*1024)

compiler specific

Definition at line 48 of file config.h.

#define TEST_POST_CPUREG   1

Register test enabled = 1, disabled = 0

Definition at line 177 of file iec60335_class_b.h.

#define TEST_POST_FLASH   1

FLASH test enabled = 1, disabled = 0

Definition at line 175 of file iec60335_class_b.h.

#define TEST_POST_PC   1

Program Counter test enabled = 1, disabled = 0

Definition at line 178 of file iec60335_class_b.h.

#define TEST_POST_RAM   1

RAM test enabled = 1, disabled = 0

Definition at line 176 of file iec60335_class_b.h.

#define TEST_POST_WDOG   0

WatchDog test enabled = 1, disabled = 0

Definition at line 174 of file iec60335_class_b.h.

#define USE_CMSIS_NVIC   1

Use the CMSIS defined functions for NVIC processing

Definition at line 43 of file config.h.

#define USE_SEMIHOSTING   0

debugging switch on/off SWV feature, "0" to deactivate

Definition at line 42 of file config.h.

#define USE_SYSTICK   0

specifies timer test with systick

Definition at line 181 of file iec60335_class_b.h.

#define USE_TIMER0   1

specifies timer test with TIMER0

Definition at line 182 of file iec60335_class_b.h.

#define USE_TIMER1   0

specifies timer test with TIMER1

Definition at line 183 of file iec60335_class_b.h.