main.c

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 /***************************************************************************/
#ifndef EFM32G890F128
#define EFM32G890F128
#endif

#include "efm32.h"
#include "iec60335_class_b.h"
#include "efm32g890f128.h"
#include "main.h"
#include "efm32_cmu.h"

IRQTestData_t IRQtest;
FlashCRC_t bistTest;

extern ClockTest_t ClockTest;               
extern IRQTestData_t IRQtest;               
void SysTick_Handler(void)
{
  IEC60335_ClassB_Clocktest_TimerHandler();
}

void TIMER0_IRQHandler(void)
{
  /* Clear Interrupt */
  TIMER0->IFC = TIMER_IFC_OF;
  IEC60335_ClassB_Clocktest_TimerHandler();
}

void initSystick(uint32_t mode)
{
  if (mode == 1) // enable
  {
    /* Setup SysTick Timer for 10 msec interrupts  */
    /* set reload register */
    SysTick->LOAD = ((14000000 / 100) & SysTick_LOAD_RELOAD_Msk) - 1;
    /* set Priority for Cortex-M3 System Interrupts */
    SCB->SHP[((uint32_t)(SysTick_IRQn) & 0xF) - 4] = ((((1 << __NVIC_PRIO_BITS) - 1) << (8 - __NVIC_PRIO_BITS)) & 0xff);
    /* Load the SysTick Counter Value */
    SysTick->VAL = 0;
    /* Enable SysTick IRQ and SysTick Timer */
    SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk;
  }
  if (mode == 0) // disable
  {
    /* set reload register */
    SysTick->LOAD = 0;
    /* Load the SysTick Counter Value */
    SysTick->VAL = 0;
    /* Enable SysTick IRQ and SysTick Timer */
    SysTick->CTRL = 0;
  }
}

void initController(void)
{
  /* Enable required clock domains */
  CMU_ClockEnable(cmuClock_HFPER, true);
  /* TODO : user initialization here */
}

int main (void)
{
  testResult_t  result = IEC60335_testFailed;                 /* test results */
/* critical data */
  critical_uint32_t Crit_test = IEC60335_ClassB_CriticalDataInit(12345678);
/* hardware setup */
  initController();

/* critical data */
  IEC60335_ClassB_CriticalDataPush(Crit_test, 0x87654321);    /* regular usage */
  result = IEC60335_ClassB_CriticalDataValidate(Crit_test);

/* not allowed by compiler */
// Crit_test = 34343434;
  result = IEC60335_ClassB_CriticalDataValidate(Crit_test);

  Crit_test.data = 89898989;                                  /* not allowed in runtime */
  result = IEC60335_ClassB_CriticalDataValidate(Crit_test);

/* clock/rtc test */
  IEC60335_ClassB_initClockTest(100, 5);                      /* init clock test */
  result = IEC60335_ClassB_Clocktest_PollHandler();           /* check evidence */

/* IRQ test */
  IRQtest.MaxThres = 1000;                                    /* IRQ test parameter */
  IRQtest.MinThres = 10;
  initSystick(1);
  IEC60335_ClassB_InitInterruptTest(SysTick_IRQn, CallIRQHandler, &IRQtest);
  while (IEC60335_ClassB_InterruptCheck(SysTick_IRQn) != IEC60335_testPassed)
  {}
/* IRQ test off */
  IEC60335_ClassB_InitInterruptTest(SVCall_IRQn, 0, 0);
  initSystick(0);

/* Flash test */
  result = IEC60335_ClassB_FLASHtest_BIST (FLASH_CRC_Restart);

  while (1)
  {
    result = IEC60335_ClassB_CPUregTest_BIST();

    result = IEC60335_ClassB_FLASHtest_BIST (0);

    result = IEC60335_ClassB_PCTest_BIST();

    result = IEC60335_ClassB_RAMtest_BIST (0x20000100, 0x10);

    if (result != IEC60335_testPassed)
    {
      /* Break point here to test with debugger */
      __NOP();
    }
  }
}
/************************************** EOF *********************************/