DMA_TypeDef Struct Reference

#include "efm32g890f128.h"

Collaboration diagram for DMA_TypeDef:

Data Fields
__I uint32_t	STATUS
__O uint32_t	CONFIG
__IO uint32_t	CTRLBASE
__I uint32_t	ALTCTRLBASE
__I uint32_t	CHWAITSTATUS
__O uint32_t	CHSWREQ
__IO uint32_t	CHUSEBURSTS
__O uint32_t	CHUSEBURSTC
__IO uint32_t	CHREQMASKS
__O uint32_t	CHREQMASKC
__IO uint32_t	CHENS
__O uint32_t	CHENC
__IO uint32_t	CHALTS
__O uint32_t	CHALTC
__IO uint32_t	CHPRIS
__O uint32_t	CHPRIC
uint32_t	RESERVED0 [3]
__IO uint32_t	ERRORC
uint32_t	RESERVED1 [880]
__I uint32_t	CHREQSTATUS
uint32_t	RESERVED2 [1]
__I uint32_t	CHSREQSTATUS
uint32_t	RESERVED3 [121]
__I uint32_t	IF
__IO uint32_t	IFS
__IO uint32_t	IFC
__IO uint32_t	IEN
uint32_t	RESERVED4 [60]
DMA_CH_TypeDef	CH [8]

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Detailed Description

Definition at line 432 of file efm32g890f128.h.

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Field Documentation

__I uint32_t DMA_TypeDef::ALTCTRLBASE

Channel Alternate Control Data Base Pointer Register

Definition at line 437 of file efm32g890f128.h.

DMA_CH_TypeDef DMA_TypeDef::CH[8]

Channel registers

Definition at line 465 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHALTC

Channel Alternate Clear Register

Definition at line 447 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CHALTS

Channel Alternate Set Register

Definition at line 446 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHENC

Channel Enable Clear Register

Definition at line 445 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CHENS

Channel Enable Set Register

Definition at line 444 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHPRIC

Channel Priority Clear Register

Definition at line 449 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CHPRIS

Channel Priority Set Register

Definition at line 448 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHREQMASKC

Channel Request Mask Clear Register

Definition at line 443 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CHREQMASKS

Channel Request Mask Set Register

Definition at line 442 of file efm32g890f128.h.

__I uint32_t DMA_TypeDef::CHREQSTATUS

Channel Request Status

Definition at line 453 of file efm32g890f128.h.

__I uint32_t DMA_TypeDef::CHSREQSTATUS

Channel Single Request Status

Definition at line 455 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHSWREQ

Channel Software Request Register

Definition at line 439 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CHUSEBURSTC

Channel Useburst Clear Register

Definition at line 441 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CHUSEBURSTS

Channel Useburst Set Register

Definition at line 440 of file efm32g890f128.h.

__I uint32_t DMA_TypeDef::CHWAITSTATUS

Channel Wait on Request Status Register

Definition at line 438 of file efm32g890f128.h.

__O uint32_t DMA_TypeDef::CONFIG

DMA Configuration Register

Definition at line 435 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::CTRLBASE

Channel Control Data Base Pointer Register

Definition at line 436 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::ERRORC

Bus Error Clear Register

Definition at line 451 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::IEN

Interrupt Enable register

Definition at line 461 of file efm32g890f128.h.

__I uint32_t DMA_TypeDef::IF

Interrupt Flag Register

Definition at line 458 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 460 of file efm32g890f128.h.

__IO uint32_t DMA_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 459 of file efm32g890f128.h.

uint32_t DMA_TypeDef::RESERVED0[3]

Reserved for future use

Definition at line 450 of file efm32g890f128.h.

uint32_t DMA_TypeDef::RESERVED1[880]

Reserved for future use

Definition at line 452 of file efm32g890f128.h.

uint32_t DMA_TypeDef::RESERVED2[1]

Reserved for future use

Definition at line 454 of file efm32g890f128.h.

uint32_t DMA_TypeDef::RESERVED3[121]

Reserved for future use

Definition at line 457 of file efm32g890f128.h.

uint32_t DMA_TypeDef::RESERVED4[60]

Reserved registers

Definition at line 463 of file efm32g890f128.h.

__I uint32_t DMA_TypeDef::STATUS

DMA Status Registers

Definition at line 434 of file efm32g890f128.h.

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The documentation for this struct was generated from the following file:

• efm32g890f128.h