Title Content
Fanout Buffers

Silicon Labs' family of low jitter non-PLL based fanout buffers produce multiple copies of an input clock at the same frequency with minimal additive jitter. LVDS, LVPECL, CML, HCSL, LVCMOS, SSTL and HSTL buffers are available, including devices that support integrated level translation.

The Si5330 devices are ideal for general purpose clock distribution of differential and single-ended signal formats.
The Si5335 devices are configurable with the ClockBuilder web utility as a universal clock buffer/level translator. The Si5335 supports output frequencies up to 350 MHz and any combination of differential or single-ended I/O formats (LVDS, LVPECL, CML, HCSL, LVCMOS, SSTL and HSTL) and supply voltages (1.5, 1.8, 2.5 and 3.3 V).
The Si5315x buffers support fanouts of 2, 4 or 9 PCle Gen 1/2/3 and/or other formats, with an I2C interface available for output control, AC tuning, and for enabling/disabling individual OEs.

Product Matrix Highlights

Device Family	Control	Clock Inputs	Clock Outputs	Input Freq (MHz)	Max Output Freq (MHz)	Phase Jitter (ps rms)	Output Formats
Si5330	Pin	1	Up to 8	5 - 710	5 - 710	0.15	LVPECL, LVDS, HCSL, CML, LVCMOS, SSTL, HSTL
Si5335	Pin	1	Up to 8	10 - 350	1 - 350	0.15	LVPECL, LVDS, HCSL, CML, LVCMOS, SSTL, HSTL
Si5315x	I²C/Pin	1	Up to 9	25	100	1.0	HCSL
CY28xxx	I²C/Pin	1	Up to 8	100	100	>1.0	HCSL
SL1886x	Pin	1	Up to 3	10 - 52	10 - 52	>1.0	LVCMOS

See all product matrix details

Features

Si5330/35

Non-PLL based clock distribution
1:4 LVPECL, LVDS, HCSL buffers
1:8 CMOS/SSTL/HSTL buffers
Low jitter: 150 fs typ
(12 kHz to 20 MHz)
Integrated level translation (e.g. differential to single-ended)
Fixed configuration family: Si5330
ClockBuilder web-configurable family: Si5335
Low propagation delay: 2.5 ns
Low output-to-output skew: 100 ps
Wide operating frequency: 5 to 710 MHz (Si5330); 350 MHz (Si5335)
1.8, 2.5 and 3.3 V operation

Si53152/54/56/59 and CY28400/800

Family supports fanout of 2, 4 or 9 PCIe Gen 1/2/3 and/or other format outputs
Some devices are spec compatible to Intel’s DB400 and DB800
Individual OEs for each output
Output polarity inversion option
I²C interface available for output control, AC tuning and enable/disable

SL18860/1

Very low phase noise: typical -168 dBx at 1 MHz offset
Low current consumption: 2.7 mA typ (VDD=1.8 V, CL=0 pF)
1.70 to 3.65 V power supply operation
10 to 52 MHz CLKIN range
Supports LVCMOS or sine inputs and LVCMOS square wave or clipped sine wave outputs for power consumption savings and harmonics attentuation
OE functions with TCXO feedback shutoff

Applications

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Data Sheet (17)

Document Name	Description	Version	Last Updated
CY28400.pdf	CY28400 Data Sheet	A	3/9/2011
CY28400-2.pdf	CY28400-2 Data Sheet	C	3/9/2011
CY28401.pdf	CY28401 Data Sheet	A	3/9/2011
CY28800.pdf	CY28800 Data Sheet	B	3/9/2011
Si53152.pdf	Si53152 Data Sheet	0.1	1/9/2012
Si53154.pdf	Si53154 Data Sheet	0.1	1/9/2012
Si53156.pdf	Si53156 Data Sheet	0.1	1/9/2012
Si53159.pdf	Si53159 Data Sheet	1.0	5/2/2012
Si5330.pdf	Si5330 Data Sheet	1.0	4/5/2012
Si5335.pdf	Si5335 Data Sheet	1.0	4/9/2012
SL18860.pdf	SL18860 Data Sheet	1.8	4/3/2012
SL18861.pdf	SL18861 Data Sheet	1.2	3/9/2011
SL2305.pdf	SL2305 Data Sheet	2.1	3/9/2011
SL2309.pdf	SL2309 Data Sheet	1.3	3/9/2011
SL23EP09NZ.pdf	SL23EP09NZ Data Sheet	2.2	3/9/2011
SL28DB200.pdf	SL28DB200 Data Sheet	C	3/9/2011
SL28PCIe14.pdf	SL28PCIe14 Data Sheet	AA	3/9/2011

User Guides (4)

Document Name	Description	Version	Last Updated
Si53154-EVB.pdf	Si53154-EVB User's Guide	0.1	1/9/2012
Si53159-EVB.pdf	Si53159-EVB User's Guide	0.1	1/9/2012
Si5338-EVB.pdf	Si5338-EVB User Guide	1.4	11/16/2011
Si5xx-ML52x-EVB.pdf	Si5xx-ML52x-EVB User Guide	0.2	9/23/2009

Application Notes (7)

Document Name	Description	Version	Last Updated
AN360.pdf	AN360: Crystal Selection Guide for Si533x and Si5355/56 Devices	0.5	3/28/2012
AN408.pdf	AN408: Termination Options for Any-Frequency, Any Output Clock Generators and Clock Buffers	0.4	11/23/2010
an56.pdf	AN56: Calculating Total Output Jitter for PLLs	0.3	5/4/2012
AN581.pdf	AN581: Meeting SerDes Jitter Requirements Simplified with Silicon Labs Clocks and Oscillators	0.1	9/2/2011
AN623.pdf	AN623: Customizing the Si5335 with ClockBuilder	1.0	11/17/2011
AN624.pdf	AN624: Si5335 Solves Timing Challenges in PCI Express, Computing, Communications and FPGA-Based Systems	1.0	11/17/2011
AN636.pdf	AN636: Si5214x and Si5315x Signal Integrity Tuning to Improve Connectivity	0.1	1/12/2012

White Papers (5)

Document Name	Description	Version	Last Updated
Configurable-Tiny-Clocks-Reduce-Space-Power-and-EMI.pdf	Configurable Tiny Clocks Reduce Space, Power and EMI in Consumer Electronics Designs	1.0	1/27/2012
MultiSynthWhitePaper.pdf	MultiSynth White Paper	041510	4/15/2010
Reducing-EMI_WP.pdf	Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking	1.0	5/31/2011
PCIe-Clock-Source-Selection.pdf	Selecting the Optimum PCIe Clock Source	1.0	1/10/2012
Timing-ICs-Keep-Beat-with-Needs-of-Todays-Embedded-Market.pdf	Timing ICs Keep Beat with Needs of Today’s Embedded Market	1.0	11/21/2011

Miscellaneous (6)

Document Name	Description	Version	Last Updated
ppr-programmable-product-request-form.docx	Programmable Product Request Form (PPR)	3.0	3/23/2012
Silicon-Labs-Timing-Cross-Reference.pdf	Silicon Labs Timing Cross-Reference to Xilinx, Altera and Lattice FPGA Devices	3.0	5/3/2012
timing-solutions-for-cavium-processors.pdf	Silicon Labs' Timing Solutions for Cavium Processors	1.2	7/15/2011
timing-solutions-for-freescale-processors.pdf	Silicon Labs' Timing Solutions for Freescale Processors	1.0	2/10/2012
Timing-Solutions-for-Altera.pdf	Timing Solutions for Altera	0.3	12/7/2011
timing-solutions-for-plx-technology.pdf	Timing Solutions for PLX Technology	1.0	11/8/2011

PCN (9)

Document Name	Description	Version	Last Updated
1107132 Si5330, Si5334, Si5338, Si5355, Si5356 Shipment Media Change std.pdf	1107132 Si5330, Si5334, Si5338, Si5355, Si5356 Shipment Media Change std
1109081 SPEL Assy PCN std.pdf	1109081 SPEL Assy PCN std
11090810 Test to UTL std.pdf	11090810 Test to UTL std
1109084_SL Assembly Transfer to UTAC Thailand std reissue.pdf	1109084 SL Assembly Transfer to UTAC Thailand std reissue
1110101B_Bulletin to expand OFC for ship OSEP parts.pdf	1110101B_Bulletin to expand OFC for ship OSEP parts
1203231B_LPP_Reel1.pdf	1203231B_LPP_Reel1
1204051B_Si5330 Datasheet v1.0 availability-Silicon_Labs Bulletin.pdf	1204051B_Si5330 Datasheet v1.0 availability-Silicon_Labs Bulletin
1204091B_ClockBuilder Desktop Software v5.0.0 Availability-Silicon_Labs.pdf	1204091B_ClockBuilder Desktop Software v5.0.0 Availability-Silicon_Labs
1204101B_Si5335_Datasheet_v1.0_availability_Bulletin.pdf	1204101B_Si5335_Datasheet_v1.0_availability_Bulletin

Development Tools

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Software (1)

Document Name	Description	Version	Updated
ClockBuilderDesktopSwInstall.zip	Si5335/38/51/56 ClockBuilder Desktop Software Version 5.0	5.0	3/17/2012

Models (30)

Document Name	Description	Version	Updated
si5330a-a00200-gm.ibs	Si5330A a00200 IBIS Model	3.1	11/9/2010
si5330a-a00202-gm.ibs	Si5330A a00202 IBIS Model	3.1	11/9/2010
si5330b-a00204-gm.ibs	Si5330B a00204 IBIS Model	3.2	11/21/2010
si5330b-a00206-gm.ibs	Si5330B a00206	3.2	11/21/2010
si5330b-a00205-gm.ibs	Si5330B a00305 IBIS Model	3.2	11/21/2010
si5330c-a00207-gm.ibs	Si5330C a00207 IBIS Model	3.2	11/21/2010
si5330c-a00208-gm.ibs	Si5330C a00208 IBIS Model	3.2	11/21/2010
si5330c-a00209-gm.ibs	Si5330C a00209 IBIS Model	3.2	11/21/2010
si5330f-a00214-gm.ibs	Si5330F a00214 IBIS Model	3.2	11/21/2010
si5330f-a00215-gm.ibs	Si5330F a00215 IBIS Model	3.2	11/21/2010
si5330f-a00216-gm.ibs	Si5330F a00216 IBIS Model	3.2	11/21/2010
si5330g-a00217-gm.ibs	Si5330G a00217 IBIS Model	3.2	11/21/2010
si5330g-a00218-gm.ibs	Si5330G a00218 IBIS Model	3.2	11/21/2010
si5330g-a00219-gm.ibs	Si5330G a00219 IBIS Model	3.2	11/21/2010
si5330h-a00220-gm.ibs	Si5330H a00220 IBIS Model	3.2	11/21/2010
si5330h-a00221-gm.ibs	Si5330H a00221 IBIS Model	3.2	11/21/2010
si5330h-a00222-gm.ibs	Si5330H a00222 IBIS Model	3.2	11/21/2010
si5330j-a00223-gm.ibs	Si5330J a00223 IBIS Model	3.2	11/21/2010
si5330k-a00224-gm.ibs	Si5330K a00224 IBIS Model	3.2	11/21/2010
si5330k-a00226-gm.ibs	Si5330K a00226 IBIS Model	3.2	11/21/2010
si5330l-a00228-gm.ibs	Si5330L a00228 IBIS Model	3.2	11/21/2010
si5330l-a00229-gm.ibs	Si5330L a00229 IBIS Model	3.2	11/21/2010
si5330l-a00230-gm.ibs	Si5330L a00230 IBIS Model	3.2	11/21/2010
si5330m-a00231-gm.ibs	Si5330M a00231 IBIS Model	3.2	11/21/2010
si5330m-a00232-gm.ibs	Si5330M a00232 IBIS Model	3.2	11/21/2010
si5330m-a00233-gm.ibs	Si5330M a00233 IBIS Model	3.2	11/21/2010
si5335A-axxxxx-gmr.ibs	Si5335A IBIS Model	3.2	11/30/2011
si5335B-axxxxx-gmr.ibs	Si5335B IBIS Model	3.2	11/30/2011
si5335C-axxxxx-gmr.ibs	Si5335C IBIS Model	3.2	11/30/2011
si5335D-axxxxx-gmr.ibs	Si5335D IBIS Model	3.2	11/30/2011

Product Matrix

Part Number	Available Documents	Control	Package	Reference Inputs	Clock Outputs	Input Frequency	Output Frequency	Phase Jitter (RMS)	Output Format(s)	VDD	VDDO
CY28400	Data Sheet	I2C/Pin	28-pin SSOP	1	4	100 MHz	100 MHz	> 1.0 ps	HCSL	3.3 V	3.3 V
CY28400-2	Data Sheet	I2C/Pin	28-pin SSOP/TSSOP	1	4	100 MHz	100 MHz	> 1.0 ps	HCSL	3.3 V	3.3 V
CY28401	Data Sheet	I2C/Pin	48-pin SSOP	1	8	100 MHz	100 MHz	> 1.0 ps	HCSL	3.3 V	3.3 V
CY28800	Data Sheet	I2C/Pin	48-pin SSOP	1	8	100 MHz	100 MHz	> 1.0 ps	HCSL	3.3 V	3.3 V
Si53152	Data Sheet	I2C/Pin	24-pin QFN	1	2	25 MHz	100 MHz	1.0 ps	HSCL	3.3 V	3.3 V
Si53154	Data Sheet	I2C/Pin	32-pin QFN	1	4	25 MHz	100 MHz	1.0 ps	HSCL	3.3 V	3.3 V
Si53156	Data Sheet	I2C/Pin	32-pin QFN	1	6	25 MHz	100 MHz	1.0 ps	HSCL	3.3 V	3.3 V
Si53159	Data Sheet	I2C/Pin	48-pin QFN	1	9	25 MHz	100 MHz	1.0 ps	HSCL	3.3 V	3.3 V
Si5330A	Data Sheet	Pin	4x4mm 24-QFN	1	4	5 - 710 MHz	5 - 170 MHz	0.15 ps	LVPECL	2.5 V, 3.3 V	2.5 V, 3.3 V
Si5330B	Data Sheet	Pin	4x4mm 24-QFN	1	4	5 - 710 MHz	5 - 170 MHz	0.15 ps	LVDS	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330C	Data Sheet	Pin	4x4 mm 24-QFN	1	4	5 - 200 MHz	5 - 250 MHz	0.15 ps	HCSL	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330E								> 1.0 ps	LVCMOS, HCSL	3.3 V	3.3 V
Si5330F	Data Sheet	Pin	4x4 mm 24-QFN	1	8	5 - 200 MHz	5 - 200 MHz	0.15 ps	LVCMOS	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330G	Data Sheet	Pin	4x4 mm 24-QFN	1	8	5 - 200 MHz	5 - 200 MHz	0.15 ps	LVCMOS	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330H	Data Sheet	Pin	4x4 mm 24-QFN	1	8	5 - 350 MHz	5 - 350 MHz	0.15 ps	SSTL	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330J	Data Sheet	Pin	4x4 mm 24-QFN	1	8	5 - 350 MHz	5 - 350 MHz	0.15 ps	HSTL	1.5V	1.5 V
Si5330L	Data Sheet	Pin	4x4 mm 24-QFN	1	4	5 - 350 MHz	5 - 350 MHz	0.15 ps	LVDS	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5330M	Data Sheet	Pin	4x4 mm 24-QFN	1	4	5 - 200 MHz	5 - 250 MHz	0.15 ps	HCSL	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5335A	Data Sheet	Pin	24-pin QFN	1	4	10 - 350 (Clock) 25 or 27 (Xtal)	1 - 350 MHz	1.0 ps	LVCMOS, LVDS, LVPECL, HCSL, SSTL, HSTL, CML	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5335B	Data Sheet	Pin	24-pin QFN	1	4	10 - 350 (Clock) 25/27 (Xtal)	1 - 350 MHz	1.0 ps	LVCMOS, LVDS, LVPECL, HCSL, SSTL, HSTL, CML	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5335C	Data Sheet	Pin	24-pin QFN	1	4	10 - 350 (Clock) 25/27 (Xtal)	1 - 350 MHz	1.0 ps	LVCMOS, LVDS, LVPECL, HCSL, SSTL, HSTL, CML	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
Si5335D	Data Sheet	Pin	24-pin QFN	1	4	10 - 350 (Clock) 25/27 (Xtal)	1 - 350 MHz	1.0 ps	LVCMOS, LVDS, LVPECL, HCSL, SSTL, HSTL, CML	1.8 V, 2.5 V, 3.3 V	1.8 V, 2.5 V, 3.3 V
SL18860DC	Data Sheet	Pin	10-pin TDFN	1	3	10 - 52 MHz	10 - 52 MHz	> 1.0 ps	LVCMOS	3.3 V	—
SL18861DC	Data Sheet	Pin	10-pin TDFN	1	3	10 - 52 MHz	10 - 52 MHz	> 1.0 ps	LVCMOS	3.3 V	—
SL2304NZ	Data Sheet	Pin	8-pin TSSOP/SOIC	1	4	1 - 140 MHz	1 - 140 MHz	> 1.0 ps	LVCMOS	3.3 V	—
SL2305NZ	Data Sheet	Pin	8-pin TSSOP/SOIC	1	5	1 - 140 MHz	1 - 140 MHz	> 1.0 ps	LVCMOS	3.3 V	—
SL2309NZ	Data Sheet	Pin	16-pin TSSOP/SOIC	1	9	10 - 140 MHz	10 - 140 MHz	> 1.0 ps	LVCMOS	3.3 V	—
SL23EP09NZ	Data Sheet	Pin	16-pin TSSOP/SOIC	1	9	10 - 220 MHz	10 - 220 MHz	> 1.0 ps	LVCMOS	2.5 V, 3.3 V	—
SL28DB200	Data Sheet	Pin	16-pin TSSOP	1	2	100 MHz	100 MHz	> 1.0 ps	HCSL	3.3 V	3.3 V
SL28PCIe14	Data Sheet	I2C/Pin	32-pin QFN	2	4	25/100 MHz	100 MHz	1.0 ps	HCSL	3.3 V	3.3 V

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Fanout Buffers

Product Matrix Highlights

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Applications