PCI Express (PCIe)
PCI Express (PCIe) is a serial point-to-point interconnect standard developed by the PCI-SI. Although originally designed for desktop personal computers, the PCIe standard has been widely adopted in a broad range of applications including blade servers, storage, embedded computing and networking and communications. Not only is the PCIe interface supported by a wide base of commercially available devices, it is also becoming more readily available in FPGAs and SoCs, providing designers with flexible solutions for transferring data within their systems. One of the key advantages of using PCIe is its scalable data bandwidth and flexible clocking solutions.
PCI Express (PCIe) Data Link
A PCIe data link consists of one or more lanes that provide a transmit (Tx) and receive (Rx) differential pair. One of the key advantages of PCIe is its bandwidth scalability enabling up to 32 lanes to be configured on a single link.

PCI Express (PCIe) Generation and Throughput
With the recent introduction of PCIe Gen 3, each lane can accommodate 8 Gbps per direction for a maximum data throughput of 64 Gbps of data transfer. Applications that need less data bandwidth can simply be configured with fewer lanes. Previous PCIe Gen 1 and Gen 2 standards offer 2.5 Gbps and 5.0 Gbps per lane, respectively. Choosing a PCIe standard with higher data rates ultimately means using less lanes or connection wires between devices, but it also places additional requirements on the clocking performance.
| PCIe Gen 1 |
2.5 Gbits/s |
500 MBytes/s |
16 GBytes/s |
2003 |
| PCIe Gen 2 |
5.0 Gbits/s |
1.0 GBytes/s |
32 GBytes/s |
2007 |
| PCIe Gen 3 |
8.0 Gbits/s |
2.0 GBytes/s |
64 GBytes/s |
2010 |
|---|
PCI Express (PCIe) Gen 1, 2 and 3
Clock Generators and Buffers
Silicon Labs offers both off-the-shelf and factory-customizable PCI Express (PCIe) generation 1, 2 and 3 clock generators and buffers for a wide range of applications.
Si5214x PCIe Clock Generators and Si5215x PCIe Buffers
The Si5214x PCIe clock generator family of off-the-shelf solutions provide either 2, 4, 6 or 9 PCIe gen 1/2/3 compliant HCSL outputs per device. The Si5315x PCIe off-the-shelf clock buffer family provides either 2, 4, 6 or 9 PCIe gen 1/2/3 compliant HCSL outputs per device. These low-power devices are designed for non-FPGA enterprise, embedded, CPE and consumer applications such as blade servers, storage, printer/copiers, teleconferencing, surveillance, gaming machines, computing, medical equipment, set-top boxes/DVR, Blu-ray recorders, etc. The Si521xx off-the-shelf clock generators and buffers are production ready and can be ordered anytime through our website, distributors or e-commerce partners.
Si5335 Clock Generator/Buffer
The Si5335 family is the industry’s most easily customizable clock generator/buffer, capable of providing PCIe Gen 1/2/3 and other output formats. Ideally suited for FPGA-based telecom/datacom, embedded computing, storage and communications systems, such as switches, routers, infrastructure, GPON/EPON, network servers telecom PBX, WAN. The Si5335 clock generators/buffers can be easily customized online, with devices available in two weeks without minimum order quantity restrictions.