Silicon Labs Clock Benefits
Silicon Labs offers a comprehensive portfolio of clock products.
Performance
Any-Frequency
Customizable
Short Lead Times
Clock Products
Narrow Product Families by Capability
Find Clocks by Functionality
| Family | Number of Outputs | Phase Jitter (ps) | Output Frequency Max (MHz) | Output Formats |
|---|---|---|---|---|
|
|
2, 4, 8, 10 | 0.09 | 350, 720, 1028 | Differential; Single-Ended |
|
|
1, 2, 4, 5, 8 | 0.23, 0.3, 0.4, 0.5, 0.6 | 100, 125, 150, 200, 243, 346, 350, 644, 710, 711, 808, 1050, 1417 | Differential; Single-Ended |
|
|
12 | 0.065 | 1474.56 | Differential; Single-Ended |
|
|
4, 10 | 0.09 | 350, 1028 | Differential; Single-Ended |
|
|
4 | 1 | 200, 350, 710 | Differential; Single-Ended |
|
|
2, 3, 8 | 2, 3.5, — | 100, 133, 170, 200 | Single-Ended |
|
|
1, 2, 4, 5, 6, 9 | 0.4, 1, 1.4, — | 100 | Differential |
|
|
2, 4 | 0.1 | 2750 | Differential; Single-Ended |
|
|
7 | 0.15 | 350, 718.5 | Differential; Single-Ended |
|
|
13, 16 | 166 | Differential; Single-Ended | |
|
|
1, 4 | 0.3 | 622, 2488 | Differential |
ClockBuilder Pro Speeds Up Clock Tree Design
ClockBuilder Pro and ClockBuilder Go software help you design advanced clock trees fast, without worrying about PLL and register settings
Clock Development Tools
View All ToolsDevelopment & Evaluation Kits
Rapidly evaluate device performance and features with easy-to-use kits.
Browse KitsConfiguration Software
ClockBuilder Pro simplifies device configuration and customization.
Download Configuration SoftwareClockBuilder Field Programmer Kit
Develop, program and debug any Si534x or Si538x clock device “in-system,” or in one of the convenient QFN sockets.
View KitsClock Reference Designs
A web-based tool that helps customers move from clock tree requirements to a bill of materials (BOM) in minutes.
Accelerate time to market with advanced reference designsClock Technology Center
View All DocumentationPatented DSPLL Technology
Improve jitter performance and simplify design of high-speed communication systems by eliminating VCXOs and loop filters.
Learn More About DSPLLPatented MultiSynth Technology
Eliminate the need for multiple PLLs with any-frequency and any-output clock synthesis. Take advantage of frequency flexibility with ultra-low jitter operation and excellent spurious performance.
Learn More About MultiSynthPCIe Clock Jitter Tool
Easily take PCIe Gen1/2/3/4 jitter measurement and save a PCIe compliance report for reference.
PCIe Learning CenterTiming Jitter Tutorial and Measurement Guide
This e-book provides an overview of jitter and offers practical assistance in taking jitter measurements.
Timing Jitter Tutorial and Measurement Guide (e-book)Optimizing Clocks in Small Cell Networks
Learn about our timing architectures that enable lower power, smaller form factor and higher performance small cell clock synthesis.
White Paper: Optimizing Small Cell Networks