I am testing a new design which uses your SI4713 FM transmitter.

 

I am using analog audio in - scope shows audio is less than 500 mv P-P.

 

Every 5 secs I issue an ASQ Status command

 

I am transmitting both audio and RDS PS (dynamically changing PS content).

 

The audio is coming thru the radio and signal strength is very strong.

 

Anywhere from 10 seconds to 2 minutes into the audio (music) - the RF goes dead (static on the radio and no signal strength) and my ASQ request comes back as a NAK to the SI4713 device address (0x22 includes W/R bit).

 

Any thoughts as to why the device would just stop working and not even respond to an I2C write address?

 

Any comments appreciated.

 

Joe

 

 

 

  • Audio and Radio
  • Discussion Forums
Unanswered
  • Update:

     

    As stated earlier, I am pushing new PS data to the device to display RDS information.

     

    I tried NOT sending the PS data and it appears the device does not go into error mode in my initial post.

     

    Why would I2C communication effect the way the device works?

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  • Update:

     

    I can trace the device going south when a I2C PS command fails.

     

    Any suggestions as to WHY or how to avoid this condition?

     

    Thanks.

     

    Joe

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  • I have attached two logic probe traces of the issue.

     

    I am sending a  TX_ASQ_STATUS  command.  The SI4713 does no ACK and holds that state until the reset line is brought low.  I'm not doing anything with the reset line so the SI4713 must be driving the its reset low.

     

    Comments?  Ideas?

     

    Thanks.

     

    Notice data low and clock hi -- until a reset occurs

     

    FM_Write.png

     

    I've pulled back on the time scale so you can see multiple messages.

     

    The Green dot shows the start of the 0x34 command displayed above.  118 millisec later the SI4713 brings reset low and the device stops working.

     

    FM_Write.png

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  • Update:

     

    I slowed the I2C baud rate from 375khz to 95khz and have reduced the size of the pull-up resistors.

     

    The device will still NAK some of the communication but it does not lock up and go into reset.

     

    Can someone confirm that the SI4713 can drive the reset line itself.

     

    I ask because to test the new board I hacked into an existing CPU board and was driving the reset line with a standard output - not an open collector output.  The output pin on the cpu no longer functions - I'm betting it got fried trying to keep the SI4713 reset pin hi and the SI4713 driving it low.

     

    I'm looking for confirmation on this to make sure I understand why the output is dead so I can address it in the final design (I will definitely be open collector)

     

    Thanks.

     

    Joe 

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