Jitter isn't just the unfortunate side effect of a caffeine bender. It can be a serious challenge when you’re designing with high frequency reference clocks. As communication standards demand ever higher speeds, especially in PCIe, 10/40/100G Ethernet, Broadcast Video and CPRI/OBSAI applications, it's becoming increasingly difficult to meet the constraints put on timing budgets.
Technically, jitter is the undesired deviation from true periodicity of a periodic signal in relation to a timing reference such as a reference clock signal or reference point in time. In simpler terms, jitter is a timing uncertainty between a desired signal or time frame and the actual signal.
You can picture it like this:
Why does jitter matter?
Why do we need to worry about jitter? Many new protocols and standards specify clock jitter requirements in order to ensure spec compliant and robust operation. These requirements weren't common in the past, but now jitter is a mainstream topic in system design. It’s vital to understand jitter's characteristics, effects, specification, measurement and mitigation.
Jitter is divided into two top-level classes: Random jitter (Gaussian jitter) and Deterministic jitter.
- Periodic jitter- has a discernible period and can be caused by things like switching power supply noise.
- Data dependent jitter- is often quasi-periodic, like inter symbol interference caused by a serial data stream like Ethernet or PCI Express.
Using a Jitter Attenuating Clock is the best way to reduce jitter and the unwanted effects it can have on your applications. Silicon Labs jitter attenuators will generate any output frequency from any input frequency with ultra-low jitter. Any input, any output, with no compromises.
For more information watch our “Primer on Jitter, Jitter Measurement and Phase-Locked Loops” or if you are in the San Francisco Bay Area you can attend our Jitter Workshop next month!