Timing 101 #7: The Case of the Spurious Phase Noise Part II
02/58/2018 | 12:17 AM
Hello and welcome to another chapter in our Timing 101 series from Silicon Labs' Kevin Smith.
Introduction
In this article, I want to continue last month’s discussion regarding spurs in clock phase noise measurements. There were a few items I just couldn’t include previously due to lack of time and space.
You will recall from last time that spurs are discrete frequency components in clock phase noise plots. Spurs are typically few and low amplitude, but generally undesirable as they contribute to a clock’s total jitter.
However, spurs can also be used for evaluation and characterization of timing devices. We can use lab sources configured for low-level modulation to apply spurious frequency components, directly or indirectly, as input stimuli to a clock device or system. The resulting output clock spurs are then measured with a spectrum analyzer or phase noise analyzer.
In this post, The Case of the Spurious Phase Noise Part II, I will briefly review suitable signal modulation options. Next I will discuss some notable measurements. Finally, I will give results for a select example, jitter transfer.
Modulation Selection, i.e. Not All Spurs are Created Equal
There are three basic analog modulation options to most lab grade generators, i.e., AM, FM, or PM, referring to Amplitude Modulation, Frequency Modulation, and Phase Modulation, respectively. Each have their place in our “spur toolbox.” But first a digression. Consider each of the spectrum analyzer screen caps below. The carrier is nominal 100 MHz and there are a pair of symmetric spurs on each side at 100 kHz offset from the carrier. Each spur is about 60 dB down from the carrier.
Can you tell which screen cap corresponds to AM, FM, or PM? No, not really, not without additional information. In this particular example, the images are in alphabetical order.
So, why are they so hard to distinguish? There are several reasons:
A spectrum analyzer measures only the amplitude of the spectra, but not the phase. In this sense, it acts like a voltmeter. See for example Keysight Technologies’ Spectrum Analysis Basics app note.
FM and PM are both angular modulation methods that behave the same way and really only differ by their modulating function. An FM signal can produce PM and vice-versa.
Finally, at low modulation indices, AM, FM and PM sideband amplitudes look very similar.
Note: These FM components are the same magnitude as for AM, but unlike AM there is a minus sign in front of the lower sideband. However, since the spectrum analyzer does not preserve phase information, low modulation AM, FM, and PM components look the same.
In general, the SSB or single sideband spur to carrier ratio of AM, FM, or PM is 20*log10 (Modulation Index/2). For example, given 200 Hz peak-peak frequency deviation and 100 kHz frequency modulation, we expect a SSB spur as follows:
SL = 20 log10 {(200/2)/100E3} = -60 dBc
Now, here’s the practical aspect of using FM versus PM. If your source supports PM, then you can directly enter the amount of peak phase modulation. You need not change this setting as you step the modulation frequency or spur offset frequency. However, if your source only supports FM, then the frequency modulation index must be maintained per the following relation.
In this case, you will need to scale the peak frequency deviation Delta-f together with the modulation frequency fm in order to keep Beta constant.
So What Tests Can We Do with Modulation Spurs?
Generally, we will measure output clock spurs in the frequency domain using either a spectrum analyzer or a phase noise analyzer. We choose different modulation methods depending on what stimulus we need to apply to the system. The table below summarizes some notable measurements. I will briefly discuss each of these tests and then focus on the last one in a bit more detail.
You will note that either FM or PM can be used to generate input clock spurs for jitter transfer testing. The only thing you will need to keep track of is the phase or frequency modulation index. Modern AWGs (Arbitrary Waveform Generators) typically support AM, FM, and PM. Higher frequency RF and Microwave signal generators also support at least FM.
Here are some more details about each of the tests mentioned in the table.
Input AM-to-PM Conversion
A high gain well designed clock buffer will tend to reject AM and only pass along phase (timing) error. However, no input clock buffer is perfect and some AM-to-PM conversion can take place. The mechanism and amount of such conversion will in general differ depending on the modulation frequency.
The set-up for this test is straight forward, i.e. apply an input clock with AM and then check for an output clock spur offset at the amplitude modulation frequency. There are a few considerations to keep in mind when doing this type of test:
Keep the modulation index low so there is practically only a single sideband spur of consequence.
Vary the modulation frequency over the regions of interest.
Use a limiter on the input to the spectrum analyzer or phase analyzer so that we needn’t worry about AM-to-PM conversion in the instrument.
PSR
PSR or Power Supply Rejection is similar to the previous test in that AM is applied. However, in this case, it is not the input clock that is modulated. Rather AM is introduced indirectly via the power supply and then spurs measured as before. This type of measurement also goes by other names such as PSRR (Power Supply Rejection Ratio) or power supply ripple testing.
In addition to the earlier AM-to-PM considerations, there are a few others:
We usually want to remove all the bypass capacitors if possible. This eliminates one variable and makes it easier to inject fixed amplitude ripple, e.g. 100 mVpp, into the power rail over the frequency range of interest. It is also fairer when comparing devices.
AM needs to be injected into the power supply without impacting instruments or other system components. We generally use a Bias Tee for this purpose.
Consistency is important for low level spur measurements, so try to keep set-ups the same when comparing devices.
This topic alone deserves much separate treatment. Please see Silicon Labs app note AN491: Power Supply Rejection for Low-Jitter Clocks for further details. Where there are multiple rails, and/or removing bypass caps may be a performance issue, you can leave them in and simply do straightforward performance testing as described in Silicon Labs’ app note AN887: Si534X and Power Supply Noise.
Jitter Transfer
A relatively quick way to check the transfer curve of a clock PLL chip is to apply low level PM or FM spurs and step the modulation offset frequency from well below the expected loop bandwidth to well above it. Then using a phase noise analyzer, with Max Hold enabled, you will see how the applied spurs roll off. The intersection of the asymptotes of the spur amplitudes allows one to estimate the loop bandwidth.
You can kind of tell what’s going on by looking at the phase noise, but using a fixed modulation index input clock allows us to more precisely measure the transfer function. The 2 screen caps below were taken applying a phase modulated 25 MHz input clock (0.2° phase deviation) to an Si5345 jitter attenuator and measuring the phase noise continuously in Max Hold for a 100 MHz output clock.
In the first case, figure below, the DSPLL bandwidth is set 400 Hz. The plot shows that the annotated asymptotic lines intersect right around 400 Hz, as expected. The roll-off in the vicinity of the corner frequency is a little over 30 dB/dec.
In the second case, figure below, the DSPLL bandwidth is set to 4 kHz. This time the plot shows that the annotated asymptotic lines intersect around 4.5 kHz, which is a little wider than the nominal target. The roll-off in the vicinity of the corner frequency here looks closer to 25 dB/dec.
The use of the Max Hold feature allows us to make a “quick and dirty” manual measurement. However, we could make more careful measurements using averaging and storing spur amplitudes across ensembles of runs in order to accurately characterize the loop bandwidth of the DUT.
Conclusion
Well, that’s it for this month. In this post, I’ve extended our discussion on spurs in phase noise measurements to include some thoughts on using them for test purposes. I hope you have enjoyed this Timing 101 article.
As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.
Timing 101 #7: The Case of the Spurious Phase Noise Part II
Hello and welcome to another chapter in our Timing 101 series from Silicon Labs' Kevin Smith.
Introduction
In this article, I want to continue last month’s discussion regarding spurs in clock phase noise measurements. There were a few items I just couldn’t include previously due to lack of time and space.
You will recall from last time that spurs are discrete frequency components in clock phase noise plots. Spurs are typically few and low amplitude, but generally undesirable as they contribute to a clock’s total jitter.
However, spurs can also be used for evaluation and characterization of timing devices. We can use lab sources configured for low-level modulation to apply spurious frequency components, directly or indirectly, as input stimuli to a clock device or system. The resulting output clock spurs are then measured with a spectrum analyzer or phase noise analyzer.
In this post, The Case of the Spurious Phase Noise Part II, I will briefly review suitable signal modulation options. Next I will discuss some notable measurements. Finally, I will give results for a select example, jitter transfer.
Modulation Selection, i.e. Not All Spurs are Created Equal
There are three basic analog modulation options to most lab grade generators, i.e., AM, FM, or PM, referring to Amplitude Modulation, Frequency Modulation, and Phase Modulation, respectively. Each have their place in our “spur toolbox.” But first a digression. Consider each of the spectrum analyzer screen caps below. The carrier is nominal 100 MHz and there are a pair of symmetric spurs on each side at 100 kHz offset from the carrier. Each spur is about 60 dB down from the carrier.
Can you tell which screen cap corresponds to AM, FM, or PM? No, not really, not without additional information. In this particular example, the images are in alphabetical order.
So, why are they so hard to distinguish? There are several reasons:
Let’s look at the last couple of points in some detail. The following relations are adapted from the appendix in Keysight Technologies’ Spectrum Analysis Amplitude and Frequency Modulation app note.
Note: These FM components are the same magnitude as for AM, but unlike AM there is a minus sign in front of the lower sideband. However, since the spectrum analyzer does not preserve phase information, low modulation AM, FM, and PM components look the same.
In general, the SSB or single sideband spur to carrier ratio of AM, FM, or PM is 20*log10 (Modulation Index/2). For example, given 200 Hz peak-peak frequency deviation and 100 kHz frequency modulation, we expect a SSB spur as follows:
SL = 20 log10 {(200/2)/100E3} = -60 dBc
Now, here’s the practical aspect of using FM versus PM. If your source supports PM, then you can directly enter the amount of peak phase modulation. You need not change this setting as you step the modulation frequency or spur offset frequency. However, if your source only supports FM, then the frequency modulation index must be maintained per the following relation.
In this case, you will need to scale the peak frequency deviation Delta-f together with the modulation frequency fm in order to keep Beta constant.
So What Tests Can We Do with Modulation Spurs?
Generally, we will measure output clock spurs in the frequency domain using either a spectrum analyzer or a phase noise analyzer. We choose different modulation methods depending on what stimulus we need to apply to the system. The table below summarizes some notable measurements. I will briefly discuss each of these tests and then focus on the last one in a bit more detail.
You will note that either FM or PM can be used to generate input clock spurs for jitter transfer testing. The only thing you will need to keep track of is the phase or frequency modulation index. Modern AWGs (Arbitrary Waveform Generators) typically support AM, FM, and PM. Higher frequency RF and Microwave signal generators also support at least FM.
Here are some more details about each of the tests mentioned in the table.
Input AM-to-PM Conversion
A high gain well designed clock buffer will tend to reject AM and only pass along phase (timing) error. However, no input clock buffer is perfect and some AM-to-PM conversion can take place. The mechanism and amount of such conversion will in general differ depending on the modulation frequency.
The set-up for this test is straight forward, i.e. apply an input clock with AM and then check for an output clock spur offset at the amplitude modulation frequency. There are a few considerations to keep in mind when doing this type of test:
PSR
PSR or Power Supply Rejection is similar to the previous test in that AM is applied. However, in this case, it is not the input clock that is modulated. Rather AM is introduced indirectly via the power supply and then spurs measured as before. This type of measurement also goes by other names such as PSRR (Power Supply Rejection Ratio) or power supply ripple testing.
In addition to the earlier AM-to-PM considerations, there are a few others:
This topic alone deserves much separate treatment. Please see Silicon Labs app note AN491: Power Supply Rejection for Low-Jitter Clocks for further details. Where there are multiple rails, and/or removing bypass caps may be a performance issue, you can leave them in and simply do straightforward performance testing as described in Silicon Labs’ app note AN887: Si534X and Power Supply Noise.
Jitter Transfer
A relatively quick way to check the transfer curve of a clock PLL chip is to apply low level PM or FM spurs and step the modulation offset frequency from well below the expected loop bandwidth to well above it. Then using a phase noise analyzer, with Max Hold enabled, you will see how the applied spurs roll off. The intersection of the asymptotes of the spur amplitudes allows one to estimate the loop bandwidth.
You can kind of tell what’s going on by looking at the phase noise, but using a fixed modulation index input clock allows us to more precisely measure the transfer function. The 2 screen caps below were taken applying a phase modulated 25 MHz input clock (0.2° phase deviation) to an Si5345 jitter attenuator and measuring the phase noise continuously in Max Hold for a 100 MHz output clock.
In the first case, figure below, the DSPLL bandwidth is set 400 Hz. The plot shows that the annotated asymptotic lines intersect right around 400 Hz, as expected. The roll-off in the vicinity of the corner frequency is a little over 30 dB/dec.
In the second case, figure below, the DSPLL bandwidth is set to 4 kHz. This time the plot shows that the annotated asymptotic lines intersect around 4.5 kHz, which is a little wider than the nominal target. The roll-off in the vicinity of the corner frequency here looks closer to 25 dB/dec.
The use of the Max Hold feature allows us to make a “quick and dirty” manual measurement. However, we could make more careful measurements using averaging and storing spur amplitudes across ensembles of runs in order to accurately characterize the loop bandwidth of the DUT.
Conclusion
Well, that’s it for this month. In this post, I’ve extended our discussion on spurs in phase noise measurements to include some thoughts on using them for test purposes. I hope you have enjoyed this Timing 101 article.
As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.
Cheers,
Kevin
Below are the other Timing 101 articles:
Timing 101: The Case of the (Apparently) Jittery Jitter Attenuated Clock
Timing 101: The Case of the Ouroboros Clock
Timing 101: The Case of the Jitterier Divided-Down Clock
Timing 101: The Case of the Split Termination
Timing 101: The Case of the PLL’s VCO High Pass Transfer Function
Timing 101: The Case of the Spurious Phase Noise Part I
Timing 101 The Case of the Cycle-to-Cycle Jitter Rule of Thumb
Timing 101: The Case of the Discrepant Scope Measurements
Timing 101: The Case of the Half-terminated Differential Output Clock