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      • Timing 101 #6: The Case of the Spurious Phase Noise Part I

        Lance Looper | 01/29/2018 | 11:19 AM

        Hello and welcome to another edition of the Timing 101 blog from Silicon Labs' Kevin Smith. It’s a new year and time for a new post!

        In this month’s article, I will discuss spurs in clock phase noise measurements. Most everyone in timing will recognize spurs as the distinctive spikes in the phase noise plot below. They are generally undesired and in the frequency synthesis business low level spurs are not uncommon. They are the foam on the beer as it were. This particular plot comes from an AWG or Arbitrary Waveform Generator configured for 100 MHz sinusoidal output with 1 MHz FM. I will be using this plot or similar versions of this data throughout this article.

        What is not always appreciated is their relative significance and how they should be displayed and accounted for in applications and troubleshooting. They can also be generated for device and system evaluation and characterization.

        In this first post, I will briefly review spurs and their distinctive characteristics. Next, I will discuss how to account for them when calculating total RMS phase jitter. Finally, I will sum up with my assessment of the relative merits of the three approaches to displaying spurs (or not) in phase noise plots. Looking ahead to part 2, I will discuss the usefulness of generating spurs on purpose for evaluation and testing.

        What are spurs?

        The technical term spur is short for spurious which comes from the Latin spurius meaning illegitimate or false. See for example the entry here. There is another more general use of the word spur which refers to a spike or protuberance as in cowboy spurs and the San Antonio Spurs. Coincidentally, both meanings are somewhat fitting in this context.

        Here spurs are carrier or clock frequency spectral imperfections measured in the frequency domain just like phase noise. However, unlike phase noise they are discrete frequency components. This gives these features several particular and interesting characteristics:

        1. Spurs are deterministic.
        2. Spur power is independent of bandwidth.
        3. Spurs contribute bounded peak jitter in the time domain.

        Let me expand a little bit on each of these characteristics in turn.

        Spurs are deterministic

        Spurs are generally undesirable and to be distinguished from the harmonics needed to constitute a square wave or trapezoidal wave clock. Their specific frequencies can aid us in determining their origins and relative importance. For example, they can be caused by systemic sources such as board power supply noise, crosstalk, mixing, modulation, PLL architecture, and power line harmonics.

        PLLs effectively sample the input clock, usually through a PFD (Phase Frequency Detector), and therefore must suppress update rate spurs. Further, PLLs that synthesize fractional output frequencies typically yield spurs due to fractional division.

        Spur power is independent of bandwidth

        This is true for discrete frequency components generally and can be observed directly on a spectrum analyzer. By contrast non-deterministic noise power is proportional to bandwidth. Consider the 2 side-by-side plots below displaying a 100 MHz sinusoidal carrier with +/- 100 kHz FM sidebands acting as spurs. The traces were averaged over 5 runs and the span was set to 300 kHz. The only difference between the 2 plots is the RBW or Resolution Bandwidth.

        In the left hand side plot the RBW = 6.25 kHz. In the right hand side plot the RBW = 291 Hz. You can see by the red line annotations that the peaks remain essentially the same magnitude while the noise level dropped going left to right. I “eyeballed” the noise to be about a 10 dB delta between the plots. We expect the noise to decrease narrowing the RBW from 6.25 kHz to 291 Hz by 10*log10(6.25 kHz/291 Hz) = 10*log10(16) = 12 dB which is reasonably close in this case. Note that the discrete frequency components get narrower also.

         

         

        Spurs contribute bounded peak jitter in the time domain.

        Each spur can be regarded as a phase modulation sideband to the carrier whose amplitude determines the peak phase deviation contribution. This useful feature can be exploited in testing and I will discuss this topic in the next post. By contrast, peak phase deviation is unbounded for random phase noise.

        Accounting for Spurs

        Phase noise in a phase noise plot is a power spectral density measurement displayed on a per Hertz basis, i.e. in units of dBc/Hz, and then integrated over a jitter bandwidth to yield an RMS phase jitter quantity. The units make sense since [dBc/Hz] x [Hz] = [dBc], a measure of the RMS phase jitter power with respect to the carrier. Statistical methods then have to be used to estimate the peak phase jitter over that same bandwidth. (Phase noise instruments do not actually measure the phase noise in 1 Hz increments but use a larger RBW depending on the offset frequency range.)

        The RMS jitter contribution for each spur can be calculated as follows. (See for example Silicon Labs app note AN256: Integrated Phase Noise.)

        L(f) here is taken to be the spur power in dBc at offset frequency f for carrier frequency f0. The proper way to account for spurs when calculating RMS jitter for both phase noise + spurs is to add each spur’s individual jitter power contribution in RSS (Root Sum Square) with the RMS phase jitter due to noise only.

        We can demonstrate this with an example.

        The left-hand plot below is a phase noise plot for the example nominal 100 MHz clock with spurs omitted. The right-hand plot is the same phase noise plot but with spurs identified and explicitly displayed in dBc. For this instrument, spurs in dBc are displayed in a different color than the phase noise. In the first case the RMS phase jitter measured between 12 kHz to 20 MHz was calculated as 668.837 fs. In the second case, the RMS phase jitter measured was recorded as 878.156 fs. This is an increase of about 209 fs or about a 31% increase.

        An interesting question is how spurs are identified in phase noise test equipment. This particular instrument defines a threshold in terms of how much higher a peak has to be than the standard deviation of the noise based on a moving average. The default spurious sensibility setting is 3 x standard deviation (sigma) which has proven to be a good practical value.

        To see why the spurs contributed this much additional jitter, note that there are 3 spurs shown in band, i.e. between 12 kHz and 20 MHz offset. In the table below I list the 3 spurs together with their individual RMS jitter contributions as calculated per the cited formula. The 1 MHz spur due to FM dominates. (The spur offset frequency location and amplitude came directly from the instrument’s spur list.)

        Now, let’s RSS all these values together:

        This is very close to the 878.156 fs reported by the instrument. You can go through a similar exercise, entering spurious data separately, using our online Phase Noise to Jitter Calculator.

         

        Displaying Spurs

        You may have noticed that the very first phase noise plot had spikes that looked different (shorter) than the plot with spurs in dBc above. Let's put the two figures together side-by-side. You can see now that the left-hand side plot has the spurs in the same color as the phase noise. The spurs in the left-hand plot are depicted in units of dBc/Hz. That is the instrument scales the spur down by normalizing them with respect to the RBW as follows:

        Spur peak [dBc/Hz] = Spur amplitude [dBc] – 10*log10 (RBW)

        In most instruments the RBW will vary from Hz to MHz, depending on the offset frequency range, usually on the order of 10% down to 1% of the offset frequency. The instrument may or may not explicitly provide the RBW. However, we can always deduce it.

        You will recall the largest spur at 1 MHz was displayed as -72 dBc in the right-hand plot. In the left-hand plot the same spur is depicted roughly speaking as a skinny triangle with the peak measuring about -117.5 dBc/Hz and a base that now extends slightly below and above 1 MHz offset. So we can calculate the RBW at 1 MHz offset as follows:

         

         

        You may wonder why the "spurs in dBc/Hz" view is useful. If all you care about is the impact of the RMS phase noise then this view helps puts things in proper perspective versus the non-spurious phase noise. In some cases, sales and field applications engineers may regard the right-hand style plot as unduly alarming though they contain approximately equivalent information.

        On the other hand, the right-hand style plot is more accurate and more useful for troubleshooting. Note that in this particular example, going left to right, the calculated RMS jitter differs increasing from 809.574 fs versus 878.156 fs respectively for an increase of about 8%. Further, it is very useful to know the dBc value of the spur directly without being concerned about the instrument's RBW at a particular offset frequency.

        The table above summarizes my assessment of the relative merits of the three approaches to displaying spurs. Your mileage may vary.

         

        Conclusion

        This month I’ve discussed spurs in phase noise measurements. I hope you have enjoyed this Timing 101 article. This is only a brief introduction as entire books could be written just on this topic. I will return to this subject in The Case of the Spurious Phase Noise Part II next time to discuss generating and using spurs for testing.

        As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

         

        Cheers,

        Kevin

      • IoT Hero DeviceRadio Levels Playing Field for IoT Innovation

        Lance Looper | 01/22/2018 | 05:32 PM

        IoT Hero DeviceRadio Levels Playing Field for IoT Innovation

        Just before the holidays, Silicon Labs had the chance to sit down with Christian Klemetsson, the founder of Swedish-based start-up DeviceRadio. The company has created a horizontal connectivity layer of technology that sits on top of various protocols supporting IoT products, such as Wi-Fi, LoRa, Bluetooth, etc. The seamless layer removes the need for specific IoT design expertise, giving companies and designers of all backgrounds immediate ability to build IoT products from the ground up, regardless of designer expertise.

        Tell me about DeviceRadio – how did it come about?

        The company started out as a hobby project. At the time, I was killing all of my houseplants and it was getting expensive to replace them. I have an electronics background, so I wanted to build some sort of solution to monitor the plants with an application on my phone. I quickly realized that building something cheap, simple, and with long battery life wasn’t available. The solutions I found were based on technology built for other purposes. For example, Bluetooth, at least at the time a few years ago, wasn’t built for IoT, only wireless peripherals. So I created my own radio protocol specifically for IoT and added encryption and plug and play along with additional features. Two and a half years ago, I found the Silicon Labs/Digi-Key competition and entered the device I had just built. I ended up being one of the winners and received $10,000 worth of components from Silicon Labs. I also received media attention in Sweden from the electronics press, and the overall feedback was that I was on the right track – there was a possible missing piece in IoT. From that starting point, I started DeviceRadio.

         

        Was your IoT radio protocol the first one you’ve seen on the market?

        At that point, (2014) there wasn’t anything specifically for IoT. There were protocols for low-power communications, such as Z-Wave and peripheral protocols, such as Bluetooth and Wi-Fi, but nothing for IoT.

        What I did was transform the protocol into something that could be placed on top of existing protocols, which would provide encryption, plug and play, abstraction, etc. Regardless if you’re using Bluetooth, Wi-Fi, 4G, etc., it would all be the same. Our layer goes on top of whatever protocols you’re using, making everything seamless and consistent. 

        The product is sort of like the Internet, but specifically for devices and their sensor data and signals. We create the mechanism to move sensor data between each other and provide the integration to cloud platforms and services.

         

        You call this horizontal connectivity, right? How would you explain the value of this concept to a non-developer?

        I think it’s easier to talk about the value of Internet connected devices to help non-developers understand the value of our product. When working with today’s technologies to build connected devices, a lot of custom development and expertise is required. You need to know about security, servers, scaling, protocols, etc., and hook everything up to an IoT platform. This process becomes limiting and IoT development ends up being only available to a select few companies with this level of expertise.

        What we’re trying to do is democratize and hide the complexity of IoT by placing a horizontal layer on top of everything. This means if you’re a product company, your developers can create an IoT product without relying on exclusive and hard-to-find talent.

        Think about it from a macro perspective – western countries are all trying to increase efficiency, reduce environmental impact, and care for a large aging population. But developed countries are still the minority - the rest of the world doesn’t have basic services or our standard of living. Our resources are limited if we want to bring the entire world up to our living standards. The only way to solve these big problems is with technology. I think IoT can grow core technologies to do so much more. But in order for this to happen, IoT needs to be available to all companies, not just experts.

         

        What exactly does the horizontal layer include?

        We host an infrastructure for customers that can be replicated and takes care of access control and gets data to the right place. Our vertical communication layer is a software library that designers place on top of their protocol layers and hardware. By using our software library, designers don’t have to think about cloud APIs, Internet connectivity, etc.

        We are giving designers the opportunity to create something fast without thinking much about what technology to use. Designers can create a prototype on their hardware and focus entirely on the benefit and business value of the device up front, worrying about technology and scaling requirements much later on in the process. Designers have the freedom to stretch the product further without having to rewrite the apps and alter the code.

         

        Have you started selling the product?

        Right now we’re doing small pilot and proof of concept projects. We also have additional funding from angel investors and government grants. We’re still in the development phase and we want to make sure we’re building the right product. Our pilot projects are giving us critical insights. Our goal is to increase the number of devices using DeviceRadio by 10-fold every six months.

         

        What are some of the design challenges you have run into while building the product?

        From a technical standpoint, there were plenty of challenges. But the biggest challenge I have seen is an awareness problem - getting the right awareness and feedback circulating among companies about IoT. There is so much hype and confusion because everyone wants to be a part of IoT. But the companies that can benefit the most don’t really know it exists and what the benefits are – I think that’s a big challenge.

         

        So they don’t understand what’s possible?

        Exactly, a lot of the IoT media attention is around must-have killer applications solving luxury problems, such as connecting a water bottle or something. One of the companies I spoke with recently is building drones that work with emergency services to deliver heart defibrillators in a fraction of the time they were previously delivered, using IoT to save lives.

         

        What Silicon Labs products are you using?

        The Silicon Labs Blue Gecko BGM123, but we also use your 8-bit processors.

         

        Where do you see the future of IoT going in the next 5-8 years?

        Even though there are some cool IoT start-ups and things happening, it’s really going to be about existing companies discovering how to leverage IoT in a way that’s seamless. If you’re building connected washing machines, it should work as a normal washing machine, but then have additional connected features or benefits. It needs to be a gradient, where we move from unconnected to a connected world, and eventually an interconnected one. Right now it’s vertical. The same company that builds the IoT product owns the servers, apps, etc., making everything isolated. In 5-10 years, you’ll have multiple companies building the hardware, IoT enablement technologies, and software services and apps, allowing people to utilize products from multiple companies in ways we can’t even imagine at the moment.

         

         

         

      • A Certified Great Place to Work

        Lance Looper | 01/15/2018 | 12:39 PM

        Arcade games, big wheel races, and fitness challenges are a few of the things we do at Silicon Labs between developing the silicon, software, and solutions for a smarter, more connected world. After more than 20 years in business, we've created a corporate culture that fosters talent and encourages a healthy work-life balance. 

        2017 was a great year for us being recognized as a great place to work and we were proud to receive recognition from the following organizations:

        2017 Top Workplace (Austin American-Statesman)

        2017 Best CEO (Austin Business Journal)

        2017 Ethics in Business & Community (Recognize Good)

        2017 Best Place to Work (Austin Business Journal)

        Certified as a 2017/2018 Great Place to Work

        If you're interested in a career with Silicon Labs, check out our career page here