Introduction

In this month’s post, I will review a basic, but sometimes overlooked, best practice necessary for making proper output clock measurements. 

Those of you familiar with our clock IC evaluation boards know that we generally AC-couple our input and output clocks and provide separate SMA RF connectors for each polarity of the differential clock signal.  This is the most flexible approach in terms of being able to immediately connect output clocks to single-ended 50 Ω inputs on test equipment such as frequency counters, oscilloscopes, phase noise analyzers, spectrum analyzers, etc. The AC-coupling capacitors keep us from attempting to impose a DC bias on test equipment inputs and vice-versa. 

Here’s the best practice rule:  Both polarities of differential output buffers should be terminated when making measurements. This include the polarity that is not being measured.  What are the consequences for not doing this?  That is the subject of this article, The Case of the Half-terminated Differential Output Clock.  

 

Example Phase Noise Measurement

First, let’s work in the frequency domain.  Consider the phase noise plot below. It is from OUT0 of an Si5345 evaluation board for these 2 cases annotated in the screen capture.

1. OUT0B is routed to a 50 Ω oscilloscope input. This is the properly (fully) terminated case.   
2. OUT0B is routed to a 1 MΩ oscilloscope input. This is the half-terminated case.

The output format is 2.5V LVDS AC-coupled with the nominal frequency set to 161.1328125 MHz based on the current CBPro sample plan.  The board is actually in Free Run mode just to minimize the bench set-up.

In the first case, the 12 kHz to 20 MHz RMS phase jitter measured 89.512 fs.  This curve was saved in memory.  In the second case, the 12 kHz to 20 MHz RMS phase jitter increased to 124.16 fs. That’s not bad but the relative increase is about 39%. That is a significant impact.

 

Example Oscilloscope Measurements

Next we’ll work in the time domain.  Consider the oscilloscope plots below. The top trace is OUT0 assigned to channel 2, OUT0B is assigned to channel 3, and the common mode (CM) voltage is computed as f1. Note that since we are on the far side of the AC-coupling capacitor, we aren’t measuring the DC value but rather the noise represented by the average value of AC-coupled OUT0 and OUT0B.  (The difference in scales here is to accommodate the half-terminated case and is not relevant to the calculation.)

In this first screen capture, both oscilloscope inputs are set to 50 Ω. The waveform shapes look reasonable and the CM noise is about 38mVpp on average.

 

In this second screen capture, the only difference is that OUT0B’s input has been set to 1 MΩ. Now both waveform shapes are larger and distorted.  Further, the CM noise has increased to about 344 mVpp on average.  This is almost an order of magnitude increase in CM noise.

Note that in these experiments, the time domain measurements are much more striking than the frequency domain measurements.  The phase noise differences might even have been glossed over in automated testing.  A good argument for a lab bench to have both types of instrumentation! 

 

Root Cause

Why is terminating only half of the output clock having such an impact? We don’t need to know all the details of the buffer’s design but a simplified model will provide some insight. Consider the figure below.

Components in the left hand side box are internal to the IC and illustrate a simplified model of a CML or Current Mode Logic driver that can be made compatible with several swing formats.  The AC-coupling caps are usually on the EVB and the load resistor R shown here is typically 50 Ω as for test equipment. Transmission lines are not illustrated but PCB traces and coaxial cable can all be assumed to be nominal 50 Ω.  (The AC coupled load terminations can also be regarded as 100 Ω differential across CLKP and CLKN where the center-tap CM voltage is GND.)

Some notable features include the following:

1. Current source Ibias sinks continuously.  To first order, current is switched through one of the input NMOS transistors when turned fully on depending on the input signals.
2. The internal termination resistors Rint are normally ~ R or perhaps 2*R to save current.
3. Common mode voltage Vcm is sensed at the center-point of 2 resistors Rcm. The value of these resistors is usually >> R, for example on the order of kΩ.
4. An op amp drives the Bias network so that the sensed Vcm is equal to Vref.
5. Each output voltage swing is based on Vsupply minus the voltage drop swing across Rint as the current changes.

The driver is symmetric and designed for specific DC biasing over expected terminated operation. DC-coupled loads would need to have a common voltage exactly equal to Vcm in order to not impact the intended bias.  This is why we need to AC-couple to instrument loads.

However, even if we are AC-coupled, if we don’t have symmetric loads, then the driver will be imbalanced and the result is that the output common mode voltage Vcm will be modulated which can impact biasing and operation.  In this particular case the CM feedback circuit is clearly unable to keep up. The performance of the measured terminated half-circuit is degraded by the operation of the unterminated half-circuit.  

 

Crosstalk

Half-terminated differential outputs can even impact neighboring output driver performance in subtle ways. In this experiment, we continue to work with an Si5345 EVB as before.  The phase noise plot below is for OUT0 set to nominal 161.1328125 MHz as before with OUT0B terminated.  Adjacent channel OUT1/OUT1B is set to nominal 2 times that or 322.265625 MHz. Both polarities are properly terminated. The 12 kHz to 20 MHz phase jitter measured 94.32 fs averaged over 5 sweeps. Spurs are depicted in dBc so we can see the details.

 

The next phase noise plot is for OUT0 again, under previous conditions, except this time neighboring output OUT1B is unterminated. There is not a significant increase in phase jitter. However, we have clearly introduced 2 new spurs above the powerline frequencies region as annotated below.

These were identified in the instrument spur list as 140.374 kHz at -104.874 dBc and 4.90 MHz at -108.235 dBc. There is no obvious mathematical relationship yet this is a consistent result for this board and configuration. For wireless applications interested in the reason for every spur we can at least attribute these to the adjacent channel’s improper termination.

 

Termination Options

There are a number of termination options for our evaluation boards, and similar application boards, depending on what’s available at your bench.  These include:

1. Use a differential limiting amplifier or balun to convert a differential clock in to a single-ended clock.
2. Connect each polarity in to a 50 Ω instrument input.
3. Terminate each unmeasured polarity using an SMA 50 RF load termination.

If one is attempting to make careful measurements on a 12 output evaluation board that could call for 24 – 1 or 23 SMA terminations. That’s a fair number. So what to do?

One approach is to just make sure that the nearest channel output clocks to the measured clock are terminated. That cuts the quantity down quite a lot. The other is to use RF pads or attenuators as described in the next section.

 

Attenuators as Lab Expedient Terminations

In our lab we have many multi-channel clock EVBs which can consume a large quantity of terminations during testing. If a lot of us are working in the lab simultaneously, we can’t always terminate every clock exactly the way we would like.  So another approach is to use a high value RF pad or attenuator as a lab expedient termination.

Commercially available attenuators are PI attenuators made up of a 3-resistor network. That is, the resistor network resembles the Greek letter "pi".  The first resistor R1 is shunted to GND, followed by R2 in series, followed by another R1 shunted to GND.

Using an online calculator such as at https://www.microwaves101.com/calculators/858-attenuator-calculator we can calculate the R1 and R2 values and the resulting effective Rload assuming no connection past the attenuator. The table below lists the effective load using 6 dB, 10 dB, and 20 dB terminations.

You can see that for increasing attenuator values the effective impedance looking in to the attenuator alone increases.  By 20 dB attenuation it’s an almost perfect termination. This can be very handy at times.  The results using this technique are indistinguishable from purpose-built terminations.

 

Conclusion

I hope you have enjoyed this Timing 101 article. I’ve given you some insight as to why it’s a best practice to terminate even unmeasured differential outputs.  And provided a tip for using an attenuator as a lab expedient termination if necessary.

As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

 

Below are the other Timing 101 articles:

Timing 101: The Case of the (Apparently) Jittery Jitter Attenuated Clock

Timing 101: The Case of the Ouroboros Clock

Timing 101: The Case of the Jitterier Divided-Down Clock

Timing 101: The Case of the Split Termination

Timing 101: The Case of the PLL’s VCO High Pass Transfer Function

Timing 101: The Case of the Spurious Phase Noise Part I

Timing 101: The Case of the Spurious Phase Noise Part II

Timing 101 The Case of the Cycle-to-Cycle Jitter Rule of Thumb

Timing 101: The Case of the Discrepant Scope Measurements

Timing 101: The Case of the Half-terminated Differential Output Clock

 

 

 

 

 

 

 

 

This summer, Silicon Labs had more than one hundred students participate in our global internship program, in offices around the world - from Finland to Singapore to the US and beyond. Eleven of those interns were a part of the team in Boston. We’re excited to share a day in the life of our Boston interns, shining the spotlight on applications engineering interns Anusha Datar and Matt Hagan, as well as high school intern John Mikulski.

 

 

 

 

As engineering interns, they often began their mornings working on a variety of projects. John’s focus this summer was creating Fuzz Tests with the Java simulator. Anusha spent her time working on the Zigbee 3.0 trust center replacement. Her favorite part of the internship was having “a great opportunity to learn and grow in terms of both (her) technical and personal professional development,” and “getting a lot better at ping pong.” Check out her Knowledge Base article in our community to review her findings on different trust center replacement methods.

 

 

During lunch, the interns often explored nearby Boston attractions, or simply lounged on the comfortable office furniture. While they didn’t have a favorite restaurant, they tried many new places throughout the city, which was a cool experience. Like their Austin counterparts, they enjoyed competing in friendly games of ping pong. Conveniently, there was also a pinball machine located in the open space that they enjoy playing with as well.

 

 

Throughout the summer, interns, new college grads (NCGs), and managers participated in teambuilding activities. During one afternoon trip, interns and NCGs took a trip to Fort Warren, a historic fort on Georges Island.

 

 

During their walking tour, they stopped to explore and pose for group photos in front of the island’s most famous landmarks, including the Guard House where fort security was managed during the Civil War. 

 

 

At the end of their trip, everyone gathered near the island pier and wharf area where they enjoyed the scenic views of the surrounding islands and the Boston Harbor.

 

 

There were often evening activities as well. They joined Silicon Labs employees who participated in the Boston J.P. Morgan Chase Corporate Challenge, benefiting Boston Children's Hospital. This was the 15th year in a row we’ve participated, and we had record attendance this year with 31 Silicon Labs participants! The interns also had opportunities to participate in health and wellness and volunteer activities, so they could give back to the community.

 

Sinduja Vijayakumar joined Silicon Labs in August 2017 as an application engineer in Singapore. Her role allows her to develop software, test products, and work with her fellow validation team members to identify and tackle issues. Sinduja looks forward to coming into the office every day because she can discover something new and interact closely with other smart engineers. “I love to see the great work of my team in the products that we produce.”

 

 

She enjoys learning from everyone and everything around her, so being a part of a team that communicates and works well with each other is something she appreciates. “I am always able to ask members of my team a question and get great answers from them.” Doing the right thing is something that Sinduja values, and she says it is what connects her with Silicon Labs the most. “I see, on my team and in the company, we all do the right thing, and it helps us design great products for our customers.”

 

When asked what she would like to have with her, if stranded on a deserted island, Sinduja answered, “Something to write on and a pen.” She said she would use it to make a map and find her way home.

 

Thank you, Sinduja, for working hard and being a team player. We’re happy to have such an amazing engineer on our team!

 

Several years ago, we had the chance to talk to Rich Morris, the founder of Broodminder, a start-up company based in Madison, Wisconsin. Rich created a rugged IoT device to help backyard beekeepers raise more healthy bee hives.

As evidenced by numerous studies over recent years, bee populations have been on the decline for the past two decades. As pollinators of numerous crops, honeybees are averaging more than 33 percent population loss per year. Most experts conclude the loss is caused by a variety of factors, including pesticides, habitat loss, and disease.

Three years ago, Rich took matters into his own hands and raised nearly $30,000 to start his company with an Indiegogo campaign. An avid beekeeper and electrical engineer for more than three decades, Rich created a temperature and humidity measuring system using the Silicon Labs BLE113 Bluetooth Smart Module to measure the overall health of a hive. The following year they added a smart hive scale to the mix.

Hive temperature is critical – a healthy hive where bees are brooding generally maintains a temperature of 95 degrees Fahrenheit. If the temperature variates much in either direction, it typically signifies there is something wrong with the queen. Monitoring bee hives using Broodminder’s IoT technology makes it possible for beekeepers to keep tabs on the bees without disrupting brooding (larvae and bee development) or honey production. If the temperature data reflects problems, the beekeeper can intervene by replacing the queen, add more bees, or whatever else is required to maintain a healthy hive. The device also alerts beekeepers when the honey-flow process starts, creating a mechanism where they can begin servicing the hives for honey at the appropriate time.

Up until this point, if a beekeeper needed to obtain this data, they had to open and/or take apart the hive, which disrupted the brooding and honey-making process, and posed a risk to the hives’ bee and honey yields.

New Hive Monitor, Half the Cost

Broodminder has sold close to 6,000, $65 internal temperature hive monitors and 3,000, $179 hive scales, enabling thousands of beekeepers to improve the brooding process without dismantling the hive.

This month, Broodminder is launching a new version of the product focused exclusively on temperature measurement at half the price of the original. Broodminder built the new product using the Silicon Labs Blue Gecko BGM11S SiP Bluetooth module, which Rich explained was crucial in allowing the product to be built more cost-effectively thanks to the SiP’s size, price point, and ease of use. Cost is especially important because Broodminder’s manufacturing is entirely local and the company only uses components from the Madison area.

Beekeepers Unite in the Cloud

One of the key benefits of the Broodminder device is it connects to smart devices via Bluetooth, so users can quickly acquire data from their hives and publish the data to the cloud, creating a public database of hive diagnostics. Data is sent to the cloud by either the beekeeper’s cell phone or a dedicated hub created using the Silicon Labs Bluegiga BLE121 module, helping beekeepers track, maintain, and improve the health of bee populations.

Rich said his team is now just starting to find important data patterns among hive owners in the cloud, and he’s optimistic about the future. He says citizen scientist backyard beekeepers are generating and sharing increasing amounts of data at their public domain site BeeCounted.org, and he believes the next step for beekeeping cloud data will be applying AI technology to improve hive outcomes.

Regardless of the future, Broodminder has already made an impact in improving hive habitats, and it’s exciting for Silicon Labs to see our technology applied to environmental conservation.

Sky Liu joined Silicon Labs in November 2012 as a sales manager in the Shenzhen office. Since joining the company, he has maintained close connections with distributors in China and is responsible for WES, WMN, BlueGiga, and sensor product sales. During this time he has lead by example, and it shows through his proven sales and marketing track record.

 

 

With Liu’s contributions, the wireless business in South China grew from $8.65M in 2013 to $13M in 2015. In addition to revenue success, Liu’s focus on innovation has allowed him to lead many complicated cross selling projects, as well as extend the Zigbee business in the lighting market.

 

Liu said his role allows him to “be on the front line, explore new market opportunities, bring value to customers, and help them be successful.” His favorite thing about working at Silicon Labs is connecting with talented colleagues to study and get support from, improve his personal skills and open a new vision of his life.

 

When asked which historical figure he would like to meet, Liu said Elon Musk, whom Liu admires for his reputation as an innovator and adventurer.

 

Thank you for everything you do for Silicon Labs, Sky Liu. Keep up the great work!

 

Tracy Chea joined Silicon Labs in May 2018 as an IT Support intern working under Randy Ferguson, the service delivery manager. As an intern, her responsibilities include providing technological support for employees, managing the Windows 7-to-Windows 10-migration process, and creating websites and documentation to improve service desk efficiency. She attends the University of Texas at Austin where she’s pursuing a bachelor’s degree in MIS and a certificate in computer science.

On a typical day, Tracy arrives at the office at 8am and starts her day with a granola bar from the company’s microkitchen and an IT team meeting, where the group shares updates on new deployments and urgent problems needed to be solved. Every week, she also has a service desk meeting where Randy, her manager, reviews weekly tasks and everyone shares what they have been working on.

Tracy is spending her summer working on several projects, including building websites, imaging laptops, and learning PowerShell. Her work schedule is very flexible and she has the freedom to switch between projects easily. In her free time, she also helps solve IT ticket requests. 

Every other week, Tracy's team bonds over a team lunch. This week’s lunch was at Casino el Camino, which is within walking distance from the office, and it quickly became one of her favorite burger restaurants. After lunch she spotted Everett, the Chief Information Officer, making his way back to the corporate office on a Lime-a popular electric scooter sharing service in Austin.

Following lunch, Tracy continues to work on her projects. Her favorite thing about Silicon Labs is being able to play with all the technology and getting the chance to fix things- especially the laptops of fellow interns!

 

Several days a month, there are intern events hosted by the People Team, which is the company’s HR team. So far, out of the stand-up comedy show, company pool party, lunch-and-learns, and volunteering events, Tracy enjoyed the service event with Habitat for Humanity the most.

 

“I really enjoy philanthropy, and it’s cool to intern for a company that also is committed to serving the community. A few hours out of a day may leave a lasting impact, and that impact may encourage those people to help someone else. It's like a chain reaction.”

 

At the end of the day, Tracy reflects upon her experiences in a journal. She finds it helpful to record the things she has learned. Before she heads for the parking garage at the end of the day, she makes one final check of her emails and IT tickets to make sure everything is clear before she leaves.

 

Overall, Tracy’s favorite part about Silicon Labs has been the exposure to new things. "Since I like working hands-on with equipment, it was really cool when I got the chance to see my coworker’s projects on audio and visual settings in the conference rooms. Silicon Labs has provided me a lot of exploration, and I like being able to experience a bit of everything.”

Barbara Baylor joined Silicon Labs in 2006 as the distribution coordinator in Austin. This role gives her the opportunity to interact with virtually every department and has allowed her to interact and form relationships with Silicon Labs employees around the world. Barbara says she looks forward to coming to work every day, “because you never know who you will meet or what you will learn.” On a typical work day, her responsibilities include monitoring printers on all floors, making bindings for training manuals, and wrapping, shipping, and receiving packages. “I enjoy helping people and I want to help everyone to be successful.”

 

 

Being a native of Germany, Barbara enjoys working at a company that is multicultural and one that believes in hiring, fostering, and empowering great talent. “I like that you are not just a number. You are a person with a name and a story.” Because she has worked here for 12 years, she’s heard many stories and connected people from the same home countries or with similar interests and hobbies. She has also received hundreds of post cards from Silicon Labs employees traveling across the world. These postcards cover three bulletin boards and serve as a reminder of the relationships she’s built here.  “It’s nice to receive post cards from the beautiful places people travel and have that connection with them.”

 

Prior to joining the Silicon Labs team, she spent 25 years at the Deutsche Post, a German postal service. When asked if she could travel to any country, Barbara expressed wanting to return to Germany. It has been 10 years since she last visited her home country, and she “looks forward to seeing her family and friends” in October.

 

We are thankful to have someone so generous and dedicated on the Silicon Labs team. Thank you, Barbara, for keeping us all connected and helping us be successful!

 

 

Hi all,

I'm pleased to announce the latest SDK that includes improvements and bug fixes for our Bluetooth, Thread, Zigbee, and MCU product families. This release provides the following: 

• EmberZNet 6.3.0 (Full release here)
  • Zigbee Pro 2017 (R22) compliant stack w/ GPPB and SE1.4/GBCS support
  • Dynamic block request delay support for OTA upgrades
  • Sub-GHz only mode support for SE1.4/GBCS
  • NVM3 G.A integration
  • Gecko Bootloader LZMA decompression support
  • IAR EWARM 7.80.4 and GCC 7.2.1 support
• Silicon Labs - Thread 2.7.0 (Full release here)
  • Thread with Micrium OS Beta support 
  • DotDot DTLS security support
  • DotDot resource directory and discovery support
  • DotDot conformance testing support
  • IAR EWARM 7.8.4 and GCC 7.2.1 support
  • GRL Test Harness support bug fixes
• Flex SDK (Full release here)
  • Version 2.2.1.0 GA – enhanced support for QFN68 variants of EFR32xG12
  • Version 2.2.2.0 GA – RAIL and Connect feature enhancements and bug fixes
  • Version 2.2.2.1 GA – minor metadata changes, no application or stack changes
• Bluetooth SDK (Full release here)
  • +20dBm support and AFH
  • Long advertisement packets & additional RF channels 
  • Bluetooth + RAIL DMP enhancements 
• MCU (Full release here)
  • Gecko LE-USB support on GG11, to complement existing Micrium USB 
  • Micrium OpenCAN support for GG11/TG11

Need help? Please contact Silicon Labs Technical Support.

~Tabi

One of our timing customers sees a real opportunity in the way FPGA-based designs are commercialized and brought to market.

Jim Bittman, principal hardware engineer, founded BittWare in 1989. The company was recently acquired and today is BittWare, a Molex company, with headquarters in Concord, New Hampshire. Back in the 1990s, BittWare was focused on DSP boards—but in the early 2000s the company realized a new opportunity for growth using a new generation of powerful FPGAs. Switching from designing and manufacturing DSP-based boards to those with large FPGAs was not simple, however, as the nature of these devices brought significant engineering challenges for early adopters like BittWare.

FPGAs combine programmable logic, embedded high-speed transceivers, protocol IP controllers, digital signal processing, memory controllers, and a tremendous amount of computational power. FPGAs are truly the brains in modern electronic designs. But to unlock and harness the power of the industry’s latest FPGAs, system designers are faced with a formidable system integration challenge. Designs require network connectivity, high speed serial interfaces to share data across chips and boards, memory, power, timing and other resources. Designers need to develop solutions that can be brought to market quickly and efficiently. And there is also a need to develop customized solutions that are uniquely tailored for different markets and customers.

That’s where BittWare comes in. BittWare develops Intel and Xilinx board-level solutions that combine FPGAs with 10/40/100GbE high-speed networking interfaces, PCIe Gen 1, Gen 2 or Gen 3 connectivity, DDR4 memory, Silicon Labs low jitter programmable clocks and a board management controller for advanced system monitoring. The boards are based upon industry-standard commercially-off-the-shelf (COTS) form factors to ensure compatibility and interoperability with chassis and single board computer vendors. The benefit? BittWare’s customers get a turnkey solution that significantly reduces technology risk and accelerates time-to-revenue.

Another challenge is that different applications often require different frequency clocks to support different networking protocols and control plane functions. BittWare and Silicon Labs worked closely together to address this challenge by building support into BittWare’s software so that their customers can directly customize Silicon Labs’ programmable clocks for their own applications. One common hardware platform can be easily adapted to support a broad range of different applications. The hardware, including clocking, is remotely field-upgradable, so new applications can be enabled quickly via software upgrades.

A broad range of markets are benefiting from these system-level turnkey solutions, including broadcast video, finance, instrumentation, government and military/aerospace. In particular, applications like cyber security, high frequency trading, and high-performance computing in data centers require rapid reprogrammability to support innovative new features and services.

By combining Intel and Xilinx programmable FPGAs and Silicon Labs programmable clocks in their designs, BittWare is powering the next wave of innovation in high-speed electronics design.

To learn more about Silicon Labs' timing solutions, click here. 

 

 

 

Date: Thursday, August 30, 2018

Time: 10:00 AM Japan Standard Time

Duration: 1 hour

Design advanced, reliable applications with Silicon Labs’ low-power EFM8 8051-based 8-bit MCUs. Covering solutions ranging from automotive to IoT, we provide industry leading system benefits in terms of performance, size, cost, and power consumption. Get to market faster with advanced tools including integrated IDE, free unlimited code size Keil Compiler, energy monitoring, and advanced debugging.

In this webinar, we explore the advantages of designing with Silicon Labs EFM 8-bit MCUs and identify ideal applications such as automotive, motor control, optical modules, and more.