SPI transfer corruption caused by Configuration and Control Command transfers on the CP2130
04/109/2019 | 06:33 PM
Problem: A CP2130 device becomes unresponsive after issuing a control command transfer (i.e. Set_GPIO_mode_and_level or other control functions).
Cause: Any active SPI transfer must complete on the SPI bus before the host starts a USB Configuration and Control Commands transfer. This includes reading or writing GPIOs or checking status. USB bus traffic will determine when a transfer reaches the CP2130. Sufficient time must be inserted after SPI transfers for USB bus traffic and the SPI bus transfer itself, before starting any USB Configuration and Control Command transfers.
Since timing for active SPI transfers are not guaranteed, there is no specific min or max wait time required before submitting a control command.
SPI transfer corruption caused by Configuration and Control Command transfers on the CP2130
Problem: A CP2130 device becomes unresponsive after issuing a control command transfer (i.e. Set_GPIO_mode_and_level or other control functions).
Cause: Any active SPI transfer must complete on the SPI bus before the host starts a USB Configuration and Control Commands transfer. This includes reading or writing GPIOs or checking status. USB bus traffic will determine when a transfer reaches the CP2130. Sufficient time must be inserted after SPI transfers for USB bus traffic and the SPI bus transfer itself, before starting any USB Configuration and Control Command transfers.
Since timing for active SPI transfers are not guaranteed, there is no specific min or max wait time required before submitting a control command.