When issuing a command to the CP2120, the read data is corrupted. What can cause this issue?
The CP2120 relies on chip select being asserted during the entire command write and response read process. Toggling chip select between this write and read will corrupt the internal state machine and return invalid data.
Make sure that chip select is asserted for the entire duration of each SPI command (including SPI write and SPI read transfer).
The CP2120 has logic to switch the MISO output pin between push pull and open drain mode. The device only drives the MISO pin in push pull mode when it's expected to return data to the SPI master. If the SPI master toggles CS more than once during a SPI command write and then read, the device state machine will enter an invalid state and send bytes with the pin configured as open-drain, which is not a strong enough driver to meet the minimum rise time for high SPI clock rates, resulting in corrupted data being sent to the SPI master.
Can the CP2110, CP2114, or CP2130 draw more than 500 mA when plugged into a USB 3.0 or USB 3.1 port?
The short answer is no, but understanding why this is the case requires some background.
Foremost, we need to know what kind of power delivery capabilities are supported by the different versions of USB. This is not as clear cut as it might seem.
The USB specifications define power in terms of unit loads. A unit load as defined by the USB 1.1 and 2.0 specifications is 100 mA, and a maximum of 5 unit loads (500 mA) can be drawn from a powered root hub port. For USB 3.0, a unit load is 150 mA, and the maximum current draw is 6 unit loads (900 mA).
At first blush, these numbers might seem suspiciously low. After all, a variety of portable electronic devices come with chargers capable of delivering 1 A, 2 A, or more. This differs substantially from the maximums specified in terms of unit loads.
Key to this, of course, is that these are chargers, and the maximum current that can be provided by a USB charger is governed by the USB Battery Charging Specification. Depending on the type of charging port, as defined in the specification, current draw up to 5 A can be supported, although not necessarily with concurrent data transmission (as is the case with USB 3.0). Regardless, the USB device needs to be able to detect the type of charging port to which it is connected in order to determine how much current it can draw, and this is something that the CP2110, CP2114, and CP2130 cannot do.
So, how does a host know how much current a connected device can draw? Like everything else involving USB capabilities, the host figures out what a device can do during enumeration.
When a connected device enumerates, it transmits an overview of its capabilities packaged in a series of descriptors to the host. Two fields in two of these descriptors are relevant to knowing how much current a USB device reports that it can/will draw.
The first of these is the bcdUSB field in the device descriptor. This is just a binary coded decimal representation of the version of the USB specification with which the device is compliant: 0x0110, 0x0200, and 0x0300 for USB 1.1, 2.0, and 3.0, respectively. The devices referenced in this article report as:
While this does not immediately tell how much current a USB device can draw, it implicitly sets the maximum per the definition of unit loads above. Actual current draw is reported by a device using the MaxPower field in its configuration descriptor.
For most devices, the 8-bit MaxPower value is multiplied by 2 mA to get the reported current draw, thus a maximum of 250 (0xFA), which equates to 500 mA, is allowed. However, for USB 3.0 devices operating in SuperSpeed (5 Gbps) mode, the MaxPower multiplier is 8 mA, for a maximum of 112 (0x70) equating to 900 mA.
So, in the case of the CP2110, CP2114, and CP2130, while MaxPower can be customized, it is still interpreted relative to the 2 mA multiplier for USB 1.1 and USB 2.0 devices and thus subject to a maximum value of 0xFA (250 x 2 mA = 500 mA) even when plugged into a USB 3.0 port.
How do I install a .bin file in Linux, such as the CP2110/4 software package?
Certain Linux software packages are .bin self-extracting files. This article provides step-by-step instructions for installing these types of packages on your system. For this example, we will use the CP2110/4 software package, entitled CP2110_4_Linux.bin, but the same process applies to other files of this type.
2. Open a terminal and change directories to the directory where the .bin file is located (i.e. CP2110_4_Linux.bin).
3. To extract and run the file, you must change the permissions of the file to add executable permission by typing chmod +x filename and pressing enter. In this case, that is"
chmod +x CP2110_4_Linux.bin
4. Now you can execute the file. Do this by typing ./filename followed by enter. In this case, that looks like:
This will start an extraction process and will launch the installer GUI, from which you can select an installation directory and continue the installation of the software package. A screenshot of steps 1-4 is shown below:
In an application where only the Master clock (MCLK) is needed, the CP2114 doesn't generate MCLK without being connected to the USB host. Is this the expected behavior?
The CP2114 goes into a low power mode when the USB is suspended. In this mode, the clocks to the device are turned off, which is why you do not see the clock output. Only when USB is generating traffic will the device keep the oscillators out of suspend mode.
AN721 CP210xCustomizationUtility fails to program certain fields such as GPIO settings.
There are known issues using the customization tool in AN721 on devices such as the CP2105.
Silicon Labs is working to develop new tools to replace AN721. In the meantime, use the legacy CP210x_SetIDs and CP210x_PortConfig tools if you are having issues with the customization utility in AN721.
Note: CP2104, CP2105, CP2109, CP2110, CP2112, and CP2130 are all one-time programmable. Once a set of customization settings has been programmed, they cannot be changed.
For more information about CP210x_SetIDs, see AN144.
For more information about CP210x_PortConfig, see AN223 (Revision 0.4)