While writing my own library to use DMA for EFM32HG & EFM32WG I have discovered inconsistency between reference manual and actual chip behaviour.
EFM32HG-RM.pdf revision 0.9 (newest as for 20.03.2017)
Ref manual on page 58 (chapter 8.4.3 - Channel control data structure) states that Primary data structures occupies memory from 0x000 to 0x040 and alternate structures holds from 0x040 to 0x080.
However real test shows that is not true.
Below screenshot showing EFM32HG108F64 indicating that alternate data structure base adress is primary base adress + 0x080, not +0x040.
As far as i understand register "DMA_ALTCTRLBASE" it takes pointer from "DMA_CTRLBASE" and increase it by specific value which depends on channels available for specific chip.
Yes, it looks like there is some mistake in reference manual for EFM32HG device. for EFM32HG108F64 the file efm32hg10864.h define
#define DMA_CHAN_COUNT 6
Then dmactrl.c define
#elif ( ( DMA_CHAN_COUNT > 4 ) && ( DMA_CHAN_COUNT <= 8 ) ) #define DMACTRL_CH_CNT 8 #define DMACTRL_ALIGNMENT 256
It looks one channel will occupy 0x10 bytes.
It looks like EFM32ZG has 4 independent DMA channels.
My views are my own and do not necessarily represent the views of Silicon Labs