Instead of using the standard SPI ports that are listed in the datasheet for the extension header (PC6, PC7, PC8, PC9), I want to reconfigure this in order to use the GPIO pins (in my case, PA2, PA3, PD11, PD10).
I have the following line in my code:
SPIDRV_Init_t initData = SPIDRV_MASTER_USART1;
And this refers to:
#define SPIDRV_MASTER_USART1 \
{ \
USART1, /* USART port */ \
_USART_ROUTELOC0_TXLOC_LOC11, /* USART Tx pin location number */ \
_USART_ROUTELOC0_RXLOC_LOC11, /* USART Rx pin location number */ \
_USART_ROUTELOC0_CLKLOC_LOC11,/* USART Clk pin location number */ \
_USART_ROUTELOC0_CSLOC_LOC11, /* USART Cs pin location number */ \
3000, /* Bitrate */ \
8, /* Frame length */ \
0, /* Dummy tx value for rx only funcs */ \
spidrvMaster, /* SPI mode */ \
spidrvBitOrderMsbFirst, /* Bit order on bus */ \
spidrvClockMode0, /* SPI clock/phase mode */ \
spidrvCsControlAuto, /* CS controlled by the driver */ \
spidrvSlaveStartImmediate /* Slave start transfers immediately*/ \
}
For example, TXLOC_LOC11 is defined as the following
#define _USART_ROUTELOC0_TXLOC_LOC11 0x0000000BUL
Changing pin locations on the hardware configurator doesn't actually seem to change the value of this. It remains 0x0000000BUL, regardless of what pin i select on the configurator. Where can I find the mappings for each pin in order to manually rewrite the definition?
Thank you!
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32-bit MCUs
Unanswered
In case my question wasn't clear, what I want to do is just route the SPI CLK, CS, TX, RX pins from their default to a different GPIO on the expansion header.
Have you followed the definitions of where _USART_ROUTELOC0_TXLOC_LOC11, etc. are defined? I suspect you might be surprised by what you find.
John
0
Yep, sorry that solved the problem. I was just relying on the hardware configurator, which as I found out does not work.
0
You should NOT change the definition of _USART_ROUTELOC0_TXLOC_LOC11 but instead you should modify SPIDRV_MASTER_USART1 or even better make a copy of it with a different name and use that.
How to redefine SPI ports on EFR32BG1P
Hi,
Instead of using the standard SPI ports that are listed in the datasheet for the extension header (PC6, PC7, PC8, PC9), I want to reconfigure this in order to use the GPIO pins (in my case, PA2, PA3, PD11, PD10).
I have the following line in my code:
And this refers to:
So I need to redefine the defintions of
For example, TXLOC_LOC11 is defined as the following
Changing pin locations on the hardware configurator doesn't actually seem to change the value of this. It remains 0x0000000BUL, regardless of what pin i select on the configurator. Where can I find the mappings for each pin in order to manually rewrite the definition?
Thank you!
In case my question wasn't clear, what I want to do is just route the SPI CLK, CS, TX, RX pins from their default to a different GPIO on the expansion header.
Hi @pa1329,
Have you followed the definitions of where _USART_ROUTELOC0_TXLOC_LOC11, etc. are defined? I suspect you might be surprised by what you find.
John
Yep, sorry that solved the problem. I was just relying on the hardware configurator, which as I found out does not work.
You should NOT change the definition of _USART_ROUTELOC0_TXLOC_LOC11 but instead you should modify SPIDRV_MASTER_USART1 or even better make a copy of it with a different name and use that.
Hi @pa1329,
Yep, sorry that solved the problem. I was just relying on the hardware configurator, which as I found out does not work.
You didn't get it. No, that's not what you're supposed to do
My point was that there are definitions for each possible TX location defined in efr32bg1b_usart.h:
You needed to pick the definition for the location you want to use, not redefine the one you found in an example...
John