The EFM32JG datasheet says typical wake-up time from EM2 to EM0 (first instruction executed) is 10.7uS from flash. But here are some finer detail questions.
1. If the wake up source is an interrupt (say LETIMER0 interrupt), is the wake-up time 10.7uS until I execute the first instruction in the interrupt ? Do I need to add the interrupt latency time of 12 cycles, or am I splitting hairs here ? Is there a "maximum" wake-up time ?
2. From a power calculation standpoint, what is happening during the 10.7uS wake-up ? Is this EM2 current draw, EM0 current draw, or somewhere in between during the wake up time ?
3. It appears as if the flash sense amps are turned off during EM2 (10.7uS wake up from flash as opposed to 3uS when code executing from RAM). It's extremely unlikely that I will be able to execute all my code from RAM, but I may be able to execute the ISR from RAM. So, if I am running code from both flash and RAM, what is the wake up time ? For instance, if I go to sleep from flash, but wake to an ISR executed from RAM, what is the wake up time ?
If this information is in the datasheet or RM, I apologize in advance.
The wake up time is the time to start executing code in the ISR. The part goes into EM2 by executing a WFI or WFE instruction (with the deepsleep bits set), so the processor should already be prepared for an interrupt to occur.
During the wake up time, the oscillator is running, but the core is not executing instructions. Based on this I would expect the power consumption to be close to EM1.
The wake up time is determined by what code is executed after waking up, so if the ISR is the next thing executed, and the ISR is in ram, you can expect 3uS wake time. Keep in mind, if interrupts are disabled, the processor will execute non-ISR code until interrupts are enabled.
Thanks Joe !
This is exactly the information that I was looking for (also hoping for)