What is the difference between Pulse Density Modulator's HFCLK_PDM and HFPERCLK_PDM?
01/28/2019 | 07:45 PM
I see in the CMU chapter that two clocks are present for the PDM (Pulse Density Modulation) interface. There is HFCLK_PDM and HFPERCLK_PDM. what is the difference between these two clocks as their names are very similar?
Despite their similar names and use by the PDM interface, the HFCLK_PDM and HFPERCLK_PDM have entirely different purposes. HFCLK_PDM is the clock source for the PDM receiver core just as a synchronous serial audio interface (e.g. I2S/SSI) will have its own specific clock that is usually some multiple of the audio sampling clock. The CMU PDM Control Register (CMU_PDMCTRL) allows you to select this clock , which can be asynchronous to the main system clock. In Figure 42.1 of the Giant Gecko 12 Reference Manual, this is the clock labeled hfpdm_clk.
HFPERCLK_PDM is the PDM module bus clock. It clocks all of the register and power management logic in the PDM block. You would disable the PDM module by disabling the HFPERCLK_PDM in the CMU_HFPERCLKEN0 register, which is the reset state when you power up. Before the PDM can be used, you must enable HFPERCLK_PDM, then enable HFCLK_PDM.
What is the difference between Pulse Density Modulator's HFCLK_PDM and HFPERCLK_PDM?
I see in the CMU chapter that two clocks are present for the PDM (Pulse Density Modulation) interface. There is HFCLK_PDM and HFPERCLK_PDM. what is the difference between these two clocks as their names are very similar?
Despite their similar names and use by the PDM interface, the HFCLK_PDM and HFPERCLK_PDM have entirely different purposes. HFCLK_PDM is the clock source for the PDM receiver core just as a synchronous serial audio interface (e.g. I2S/SSI) will have its own specific clock that is usually some multiple of the audio sampling clock. The CMU PDM Control Register (CMU_PDMCTRL) allows you to select this clock , which can be asynchronous to the main system clock. In Figure 42.1 of the Giant Gecko 12 Reference Manual, this is the clock labeled hfpdm_clk.
HFPERCLK_PDM is the PDM module bus clock. It clocks all of the register and power management logic in the PDM block. You would disable the PDM module by disabling the HFPERCLK_PDM in the CMU_HFPERCLKEN0 register, which is the reset state when you power up. Before the PDM can be used, you must enable HFPERCLK_PDM, then enable HFCLK_PDM.