When setting up GPIO, there's an option to use a glitch suppression filter. Can you give more details about the filtering? (For example, does it act like a capacitor to shunt spikes or is it more sophisticated and can be considered like debounce logic)?
The glitch suppression filter does not have advanced debounce logic. It can filter pulses up to 25 ns in width, and it is always advisable to have either hardware or software workarounds in case there is a possibility of accidental glitches being registered as button presses-
1. Hardware workaround - Add additional caps on the GPIOs
2. Software workaround - Every time the GPIO interrupt is called, disable it and have a timer waiting upto 35 ms before enabling the GPIO interrupts again. That way, you will avoid triggering the GPIO interrupt functions everytime a false button press is detected.
Except CMUCLKOUT0 and CMUCLKOUT1, EFM32GG11 has an additonal clock output, which is CMUCLKOUT2.
The clocks which can be produced via CMUCLKOUT0, CMUCLKOUT1 and CMUCLKOUT2 are selected via the CLKOUTSEL0, CLKOUTSEL1 and CLKOUTSEL2 fields respectively in CMU_CTRL register.
To enable CLKOUT2 output on the pin, set CLKOUT2PEN in CMU_ROUTE and select locaction (CLKOUT2LOC) in CMU_ROUTELOC0.
Two more clocks can be selected as the CMUCLKOUT2 output, which are HFXODIV2Q (HFXO divided by two qualified) and HFXOX2Q (HFXO doubler qualified). These two clocks are usually used for Ethernet peripheral.
The high frequency peripherals are grouped into three different peripheral clock domains, which are HFPERCLK, HFPERBCLK, and HFPERCCLK (refer to Table 10.2 in EFM32GG11 reference manual for peripherals belong to which clock domain).
The prescale factors for prescaling HFCLK into HFPERCLK, HFPERBCLK, and HFPERCCLK are set using the CMU_HFPERPRESC, CMU_HFPERPRESCB, and CMU_HFPERPRESCC registers respectively. The setting can be changed dynamically and the new setting takes effect immediately.
// HFPERCLK domain divided by 4 CMU_ClockDivSet(cmuClock_HFPER, cmuClkDiv_4); // HFPERBCLK domain divided by 4 CMU->HFPERPRESCB = 3 << _CMU_HFPERPRESCB_PRESC_SHIFT; // HFPERCCLK domain divided by 4 CMU->HFPERPRESCC = 3 << _CMU_HFPERPRESCC_PRESC_SHIFT;