What happened if the RX FIFO of EFM8LB1 I2C Slave overruns?
EFM8LB1 I2C Slave peripheral includes two separate 2-byte FIFOs on transmit and receive. When the RX FIFO is full during I2C write transfer, only the first two bytes will be stored in the RX FIFO. The first two bytes can be (Slave Address + Data Byte 0) if ADDRCHK bit is set to 1, or (Data Byte 0 + Data Byte 1) when ADDRCHK bit is 0. The reset of the bytes are thrown away. Therefore, it is responsibility of software to clear the FIFO before it overruns.