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      • F96x DCDC Converter Initialization

        Silicon_Labs | 12/351/2013 | 08:14 PM
        Problem

         

        I am configuring the DC0CN, DC0CF, and DC0MD registers in my DCDC converter initialization, but the DCDC converter's output voltage is incorrect. Am I initializing the DCDC converter correctly?




        Solution

         

        In addition to the DC0CN, DC0CF, and DC0MD registers, you must enable the DCDC converter bias (LCD0MSCN.5) and clear the LCD mode bit (LCD0PWR.3).

           // Enable DCDC
           SFRPAGE   =  LCD0_PAGE;
           LCD0MSCN |=  0x20;                  // Enable DCDC bias
           LCD0PWR  &= ~0x08;                  // Clear LCD mode bit when usign DCDC


           SFRPAGE = DPPE_PAGE;
           DC0CN = 0x03;                       // DCDC clock source = local osc, 40 ns pulse
           DC0CF = 0x0B;                       // DCDC output = 1.9 V
           DC0MD = 0x43;                       // Enable DCDC


           while((DC0RDY & 0x40)!=0x40);       // Wait on DCDC above low threshold.
           PCON |= 0x04;                       // Select DCDC as VREG0 input
           while((DC0RDY & 0x80)!=0x00);       // Wait on DCDC below high threshold

        A complete firmware example implementing this code can be found under the 'Attachments' section. It is a simplified version of the example that is distributed with the Silicon Labs IDE:

        CRobot FrustratediLabsMCUExamplesC8051F96xF96xMeasureCurrentF96xMeasureActiveCurrent



      • Capacitive Sensing without CS0

        Silicon_Labs | 12/345/2013 | 07:01 PM
        Question

         

        Can I add capacitive sensing to a system using an MCU that does not have the CS0 capacitance-to-digital converter peripheral?




        Answer

         

        Capacitive sensing can be added to any Silicon Laboratories MCU that includes a comparator and two timers, one of which uses a port pin input as its clock source.

        On most MCUs, the circuit would look as shown in the schematic below.  The R1 resistors in the diagram can be sized to around 200K and the R2 resistor should be around 100K.


        In firmware, enable the comparator with CP0+, CP0-, and CPA connections corresponding to the external circuit connections shown in the schematic above.  A timer should be configured to count transitions on the port pin that is supplied with the comparator output.  Another timer is configured to interrupt at a set rate of time, such as 20 ms.  Code in the interrupt service routine for the second timer should periodically check the number of counts stored in the first timer’s 16-bit counter SFRs.  The oscillation of the comparator will decrease as the capacitance on the touch sensor increases.  This change will register as a negative delta in the timer counts measured periodically.


        The C8051F93x/2x family integrates all R1 resistors and R2, so that only the touch sensor is outside the MCU.



        In the code examples that come included with the Silicon Laboratories IDE, a relaxation oscillator code example is included in the directory installed by default at CRobot FrustratedilabsMCUExamplesC8051F336_9TouchSense_Switch.



      • EC2 Connectivity Problems

        Silicon_Labs | 12/345/2013 | 05:54 PM
        Question

         

        How do I get support for the EC2 debug adapter?




        Answer

         

        Silicon Laboratories no longer supports the EC2 and the EC2 is no longer available for purchase.  It will continue to work for some devices in the Silicon Laboratories IDE, but support is not tested.  We recommend migrating to the USB debug adapter, which comes included in development kits and can be purchased from vendors such as Mouser.



      • Statement of Volatility

        Silicon_Labs | 12/345/2013 | 04:31 PM
        Question

         

        My project requires a Statement of Volatility before I can use a Silicon Labs MCU. Where can I obtain a Statement of Volatility for a given MCU?




        Answer

         

        A Statement of Volatility can be obtain by contacting Silicon Labs technical support: http://www.silabs.com/support/resources

        The Statement of Volatility we provide is signed and contains the following information:

        • Amount of volatile memory (if any)
        • Amount of non-volatile memory (if any)
        • Procedure to sanitize/erase non-volatile memory (if applicable)

        If you require any additional information in the Statement of Volatility, be sure to specify the requirements when contacting technical support.



      • Truncated Command Line Flags in the 8-bit IDE

        Silicon_Labs | 12/344/2013 | 09:45 PM
        Problem

         

        I have a lot of command line flags defined under Project > Tool Chain Integration. When I reopen the Tool Chain Integration window, the command line flags I've previously defined are truncated and lost. How do I preserve all my command line flags?




        Solution

         

        Ensure no carriage returns and line feeds (end of lines) are present within the command line flags.

        Copy and paste the command line flags into a text editor to confirm.



      • Maximum Current Output of VREF Pin

        Silicon_Labs | 12/344/2013 | 08:57 PM
        Question

         

        How much current can the VREF pin source?




        Answer

         

        See the voltage reference Load Regulation specification in the datasheet. The maximum current the VREF can source is stated as a condition to meet the Load Regulation specification.

        For the C8051F32x, the maximum current the VREF can source is 200uA.

        In general, the internal VREF is not meant to supply a lot of current.



      • HE and non-HE Flash in the Quality and Reliability Report

        Silicon_Labs | 12/344/2013 | 06:52 PM
        Question

         

        What does 'HE' stand for in the Quality and Reliability Monitor Report?




        Answer

         

        HE stands for High Endurance.

        The Silicon Labs C8051Fxxx, C8051Txxx and SiM3xxxx MCUs use non-HE flash, as indicated in the 'Part Numbers by Fab Technology' section of the Quality and Reliability Monitor Report.




        More Information

         

        The Quality and Reliability Monitor Report can be obtained here:
        http://www.silabs.com/support/quality/pages/default.aspx#reliability



      • Unrestricted Keil

        Silicon_Labs | 12/340/2013 | 02:04 PM
        Problem

         

        When I try to compile my project, I get a linker error telling me that I've gone over a 4K build limitation.  What are my options?




        Solution

         

        Silicon Laboratories now offers an unrestricted version of the Keil compiler that can be used by customers for free.  In order to unlock the toolset and overcome the 4K limit, you will need to register with Keil by following the steps starting with the link on this page:

        http://www.silabs.com/products/mcu/Pages/8-bit-microcontroller-software.aspx



      • CAN Communication with the F56x

        Silicon_Labs | 12/339/2013 | 08:13 PM
        Problem

         

        Why am I seeing CAN bus communications errors when using the C8051F5xx device?




        Solution

         

        When running a F5xx device at a frequency faster than 24 MHz, access to CAN0 SFRs must be throttled back so that the effective frequency of access to these registers remains no higher than 24 MHz.  A straightforward way to accomplish this is to insert NOP statements between lines that write and then read CAN SFRs.   NOPs need to be placed where code writes to and then immediately reads from the CAN peripheral.  Special care must be taken to observe when an SFR16-style variable is being accessed in code that is adjacent to an access of an SFR of which the SFR16 is composed.


        For example, this code will fail when running the oscillator at a frequency higher than 50 MHz:


            CAN0IF1CR = Screener; // Start command request
                while (CAN0IF1CRH & 0x80) {} // Poll on Busy bit


        In order to make this code function properly, a NOP would need to be inserted between the write to CAN0IF1CR and the while statement below it.
         



      • Independent read and write lock bytes

        Silicon_Labs | 12/339/2013 | 07:59 PM
        Question

         

        Can read and write access be controlled independently using the lock byte?




        Answer

         

        Silicon Laboratories devices which use the JTAG interface for debug and development use separate lock bytes to control read and write access.  Silicon Laboratories devices that have a C2 debug interface have a single lock byte that controls both read and write access.  For C2-based devices, read and write access levels for regions of Flash are identical, and a function of the lock byte value.