答案

CP210x和芯科带USB功能的8-bit MCU不能用做USB主机或者集线器。他们不具有USB主机/集线器功能所以只用作USB外围设备。

答案

对于芯科具有USB功能的微控制器和CP210x系列桥接设备，如下的两个图展示了在使用USBXpress 时数据流向:

答案

对于C8051F34x/C8051F34x设备，可选的电源配置如下：

• USB总线供电
• USB自供电
• USB自供电，Regulator关闭
• USB无连接

这些选项在数据手册的'Voltage Regulator' 这一章的'VBUS detection' 一节以图形形式进行的说明。即使在regulator关闭且设备直接由VDD供电的情况下，建议不要把REGIN引脚悬空。在这种情况下，把VDD和VREGIN直接连接在一起是安全的。这些选项示意如下：

Answer

Silabs Applications team strongly recommends customer to perform a margin read test on these devices during the programming verification step. This test reads back the relative strength of a programmed bit and indicates whether a bit is strongly programmed versus weakly programmed. In other words, if a normal OTP read returns 0x01 and the margin read returns 0x03, that means that bit 1 is actually weakly programmed. This would provide an early indication that a bit may not have been programmed correctly and ensure that all bits are strongly programmed when the device is soldered in the product.

To do this margin read:

1. Program the OTP as normal, but do not lock the code space.

2. Change the EPCTL register to 0xC0.

3. Read the byte of OTP. If it reads back the same as it was programmed, then the bits are strongly programmed. If it reads back incorrectly, then some of the bits are weakly programmed and a failure should be flagged.

4. Repeat steps 2-3 for the entire programming area.

5. (Optional) Lock the OTP by writing to the lock byte.

Answer

Silicon Labs provides ESD (HBM, MM, CDM) data in the device's Qualification Report. To find the Qualification Report from silabs website, please see the article below:

http://community.silabs.com/t5/32-bit-MCU-Knowledge-Base/Qualification-report/ta-p/142819

答案

为了保护USB的D+、D-和VBUS引脚以防静电放电事件发生，我们建议使用专为USB高速数据传输设计的瞬态电压抑制器（TVS）二极管。需确保您所选的ESD保护器件具有低电容值并满足USB的上升和下降时间要求。选择期间注意Silicon Labs的CP210x USB-UART转接桥是USB 2.0全速（12 Mbps）器件。另外，取决于您的固件设计，Silicon Labs的USB微控制器可以工作在USB2.0全速（12 Mbps）或 USB 2.0 低速（1.5 Mbps）模式。

下面是一些为USB设计的ESD保护器件型号：

Littlefuse SP0503BAHT

California Micro Devices PACDN043Y4
Cooper Industries 0603ESDA

STMicro USBLC6-2xx6

下面是一些特别适用于USB的ESD保护设计的资源：

Littlefuse Application Notes [PDFs]: EC606，EC630，EC631

California Micro Devices Application Note [PDF]: AP-220

Author of the book 'USB Complete' Jan Axelson' USB Central page [Scroll down to the 'ESD and Overcurrent Protection for USB' section].

答案

当MCU引脚通过PCB连线引到PCB外部电路或连接头时，这些连线可能会经受静电放电、锁存或甚至可能将信号传导到其它没有共地的系统。有许多方法可以用于保护MCU引脚避免这些情况发生。

• 电流隔离
• 过滤
• 肖特基二极管

以上任一保护方法以及对于锁存、ESD和接地回路的详细讨论可以参考AN203关于C8051Fxxx PCB设计笔记中第5节隔离和保护以及附录A。

答案

大多数MCU器件的SPI外设同时支持 3-wire和 4-wire模式。所选模式影响器件的引脚输出。

4-wire模式SPI使用4个引脚，分别为：SCK, MISO, MOSI和NSS。而对于3-wire模式，NSS引脚没被使用。

确定SPI是被配置为应用所需的模式。在使能Crossbar之前先配置想要的SPI模式，这是一个好办法。

Answer

According to the link below, the speed for a serial mouse is 1200 baud.

http://paulbourke.net/dataformats/serialmouse/

However, the CP2105 standard port did not support a baud rate this low. The range of supported baud rates for the standard port is 2400 up to 921600. This is why the serial mouse works on the enhanced port but not the standard port.

Answer

EFM8LB1 has SFRPAGE support, and the VDD monitor register is only accessible when SRFPAGE equals 0x00.

When the device enters the SMBus ISR, the SRFPAGE register automatically switches to 0x20 to enable quick access to the SMBus registers.  This means that without updating the SFRPAGE register manually, firmware will not be able to access the VDD monitor within the SMBus ISR. To enable the VDD monitor within the SMBus ISR, add the following code:

vddMonInitSFRPAGE = SFRPAGE; 
SFRPAGE = 0x00; 
VDM0CN = 0x80; // Enable VDD monitor 
RSTsrc=0x02; // Enable VDD monitor as a reset source 
SFRPAGE = vddMonInitSFRPAGE;