When design programmer to programm C8051T616 device, how to gurantte the reliability?
Silabs Applications team strongly recommends customer to perform a margin read test on these devices during the programming verification step. This test reads back the relative strength of a programmed bit and indicates whether a bit is strongly programmed versus weakly programmed. In other words, if a normal OTP read returns 0x01 and the margin read returns 0x03, that means that bit 1 is actually weakly programmed. This would provide an early indication that a bit may not have been programmed correctly and ensure that all bits are strongly programmed when the device is soldered in the product.
To do this margin read:
1. Program the OTP as normal, but do not lock the code space.
2. Change the EPCTL register to 0xC0.
3. Read the byte of OTP. If it reads back the same as it was programmed, then the bits are strongly programmed. If it reads back incorrectly, then some of the bits are weakly programmed and a failure should be flagged.
4. Repeat steps 2-3 for the entire programming area.
5. (Optional) Lock the OTP by writing to the lock byte.
However, the CP2105 standard port did not support a baud rate this low. The range of supported baud rates for the standard port is 2400 up to 921600. This is why the serial mouse works on the enhanced port but not the standard port.
I tried to enable the VDD monitor within the SMBus ISR to enable flash write/erase routines. However, the flash write/erase routines failed. What is wrong?
EFM8LB1 has SFRPAGE support, and the VDD monitor register is only accessible when SRFPAGE equals 0x00.
When the device enters the SMBus ISR, the SRFPAGE register automatically switches to 0x20 to enable quick access to the SMBus registers. This means that without updating the SFRPAGE register manually, firmware will not be able to access the VDD monitor within the SMBus ISR. To enable the VDD monitor within the SMBus ISR, add the following code: