The following figure from the C8051F12x-13x datasheet describes the division of program memory into memory “banks.” The datasheet refers to a Common code bank as well as Banks 0-4 and shows Bank 0 as always mapped to memory locations 0x0000 – 0x7FFF.
From the figure, it appears that 2 copies of the first 32k of program memory exist in the device, and if IFBANK = 0, then the same memory contents are accessible from 0x00000-0x7FFF as well as from 0x8000-0xFFFF. Is this correct?
The "Common" bank and BANK0 are the same physical memory, with address mappings from 0x0000 to 0x7FFF and from 0x8000 to 0x0FFFF, respectively. The COMMON bank is always accessible from 0x0000 to 0x7FFF, regardless of the value of IFBANK. If IFBANK = 0, then the region from 0x8000 to 0x0FFFF will contain the same data as the region 0x0000 to 0x7FFF, though this data exists in only one physical memory bank. Banks 1, 2, and 3 are all separate physical memory locations, but are all mapped to 0x8000 to 0x0FFFF, and are accessed depending on the value of IFBANK.
The above discussion applies for instruction fetches with regard to the value of IFBANK, however an analogous discussion applies to data/constant memory accesses (MOVC and Flash MOVX instructions), and applies based on the value of COBANK.
Setting this up code banking properly in the Silicon Labs 8-bit IDE as described in AN130: Code Banking Using the Keil 8051 Tools and the AN130 Example Code should result in automatic handling of bank switching.