Once you get a result that isn't i2cTransferInProgress or i2cTransferDone, there is no point continuing to call I2C_Transfer.

This will exit when appropriate:

  /* Do a polled transfer */
  result = I2C_TransferInit(I2C0, &i2cTransfer);
  while (result == i2cTransferInProgress /* && timeout--*/) {
    result = I2C_Transfer(I2C0);
  }

Have you tried a simple I2C_FLAG_WRITE_READ ?

Also, a simple logic analyzer on the I2C bus can help find issues.

On my custom BGM121 board, mine differs from yours:

1. Ground plane/pours go to the edge of the PCB (ie. upper on right).

2. Pin 54 is connected to GND on the top layer also.

3. RF pins are connected directly (rather than through 0 ohm/solder bridge)

4. GND stitching to the right of pad 56

5. Trace between pads 55 and 56 is normal (narrower).

As the documentation says, "Verify the GND connections for the antenna pads for top layer".

I don't use any via-in-pads; just put the vias close to the GND pins. (I have eight GND vias underneath, and none in pads)

Martin

Did you remove the board (if any) from the WSTK socket? It will draw power from VTARGET (whatever the switch position).

Your external 3.0V supply may also interfere with the 3.3V that AEM mode supplies to VTARGET.

(Presumably you have also added a common ground between the external supply and the WSTK.)

(You are correct; I'm a novice when it comes to using the registers directly...)

Do you realize you are doing I2C_TransferInit twice?

		I2C_TransferInit(I2C0, &seq);
		I2C_TransferReturn_TypeDef status;
		status= I2C_TransferInit(I2C0, &seq);

(You are correct; I'm a novice when it comes to using the registers directly...)

Do you realize you are doing I2C_TransferInit twice?

		I2C_TransferInit(I2C0, &seq);
		I2C_TransferReturn_TypeDef status;
		status= I2C_TransferInit(I2C0, &seq);

This is from the EFR32xG1 reference:

17.3.9.3 Slave Transmitter

If the address was accepted and the R/W bit was set (R), indicating that the master wishes to read from the slave, the slave now goes into the slave transmitter mode. Software interaction is now required to decide whether the slave wants to acknowledge the request or not. The accepted address byte is loaded into the receive buffer like a regular data byte. If no valid interaction is pending, the bus is held until the slave responds with a command. The slave can reject the request with a single NACK command.

I don't see an ACK or NACK after you read RXDATA. Is this done in the tx_callback() ? Even if it is, an ACK/NACK is necessary if a write flag is received.

addr = I2C0->RXDATA;

Shouldn't this be (since you are not sending any bytes after the address?)

addr = I2C0->SADDR;

Another post using I2C0 as a slave recommends setting the slave mask:

Add this line to the setupI2C function:

I2C0->SADDRMASK = 0x7F;

addr = I2C0->RXDATA;

Shouldn't this be (since you are not sending any bytes after the address?)

addr = I2C0->SADDR;

(Also, you may want to consider using the I2C_* functions for the slave as well.)

Another post using I2C0 as a slave recommends setting the slave mask:

Add this line to the setupI2C function:

I2C0->SADDRMASK = 0x7F;