Hi Alva,

Does this issue happen on the latest DLL from our website, or does it only happen with the other version you have?

Regards,

Joe

Hi Shavkat,

As suggested from the datasheet below, "bypass capacitors required for each power pin placed as close to the pins as possible". You can check this. 
https://www.silabs.com/documents/public/data-sheets/cp2102n-datasheet.pdf

Also, how many part/board do you have? I suggest you to try with different part/board as well.

If all of above is checked and the issue stay the same, I suggest you try to use a scope to measure the voltage on RSTb, VBUS, VREGIN, VDD pins to see if is in range as specified from section "3. Electrical Specifications" of the datasheet.

Paul,

I've let our admins know about this issue, I will update you when I have more information.

Regards,

Joe

Hi,

Thank you for contacting Silicon Labs Technical Support regarding the CP210x VCP driver. It sounds like you are experiencing problems with a third party product that integrates a Silicon Labs CP210x device. It is often the case that third party products that use the CP210x devices utilize customized CP210x devices as well as customized drivers. In these cases, the examples and documentations (which are related to Tysso VFD-860 working with WebUSB API) are not availables.

Anyway, we recommend that you contact the original product manufacturers, and if necessary, those companies can work with Silicon Labs to create the documentations, the examples or something else like that. This policy, other tips and techniques are described in the following knowledge base article:

https://www.silabs.com/community/interface/knowledge-base.entry.html/2014/10/03/troubleshooting_apr-10iL

Have you contacted the manufacturer of your device for assistance with this matter?

Thank you, and please let me know if you have any questions.

Best Regards,
Vuong Ngo

Iman,

The GPIO pins on the device do not require external pull ups or pull downs.  Internally the pins can be configured to push-pull mode or open drain mode.

We recommend transient voltage supression diodes on the USB signals (D+, D-, and VBUS), and a ground plane on the PCB, especially under the part.

How many boards to you have, and how many have had problems?  If you replace the part, does the problem follow the part, or the board?

Regards,

Joe

I recommend placing the bypass capacitors on VDD as close to the chip as possible.  What powers the chip?  Is it subjected to sudden power loss or electrical noise?  Both of these can potentially cause flash corruption.

Regards,

Joe

Is there a cell network available?  Does the LTE module need an antenna to be attached?

Regards,

Joe

Zhang,

Can you share your layout and schematic files for the board?  Has only one board failed in this way?

Regards,

Joe

Iman,

The thermal pad is listed as "optional" in the datasheet, but if you are having thermal problems, I would recommend soldering it.  When you say the chip fails, do you mean it is no longer recognized as a USB device by the host?  Does a USB protocol analyzer show any unusual activity?  Are VDD, VIO and VREGIN still at the voltage you expect them to be?  Is the power consumption of the board unusually high?

Regards,

Joe

Since this does not exceed the absolute maximum rating, this will not damage the part.  Since this exceeds the recommended operating conditions it may put the part in an unstable state (where it would need to be power cycled or reset to operate normally), or it may draw excessive current, draining the battery.

Will any of the IO pins be connected to 3.6 V while the device is unpowered?  Would it be possible to use a FET to disconnect the battery when VDD is unpowered?  I think that would be the best solution.

Regards,

Joe