Introduction

You have probably read or heard that phase noise is the frequency domain equivalent of jitter in the time domain. That is essentially correct except for what would appear to be a somewhat arbitrary dividing line. Phase noise below 10 Hz offset frequency is generally considered wander as opposed to jitter.  

Consider the screen capture below where I have measured phase noise down to 1 Hz minimum offset and explicitly noted the 10 Hz dividing line. Wander is on the left hand side and jitter is on the right hand side. The phase noise plot trends as one might expect right through the 10 Hz line.  So what’s different about wander as opposed to jitter and why do we care? From the perspective of someone who takes a lot of phase noise plots, I consider this the case of the really slow jitter. It’s both slow in terms of phase modulation and in how long it takes to measure. 

The topic of wander covers a lot of material.  Even introducing the highlights will take more than one blog article. In this first post, I will discuss the differences between wander and jitter, the motivation for understanding wander, and go in to some detail regarding a primary wander metric: MTIE or Maximum Time Interval Error. Next in this mini-series, I will discuss TDEV or Time Deviation. Finally, I plan to wrap up with some example lab data.  

Some Formal Definitions

The 10 Hz dividing line, in common use today, has been used in synchronous optical networking (SONET) and synchronous digital hierarchy (SDH) standards for years.  For example, ITU-T G.810 (08/96) Definitions and terminology for synchronization networks [1] defines jitter and wander as follows.

4.1.12 (timing) jitter: The short-term variations of the significant instants of a timing signal from their ideal positions in time (where short-term implies that these variations are of frequency greater than or equal to 10 Hz).

4.1.15 wander: The long-term variations of the significant instants of a digital signal from their ideal position in time (where long-term implies that these variations are of frequency less than 10 Hz).

Similarly, the SONET standard Telcordia GR-253-CORE [2] states in a footnote

“Short-term variations” implies phase oscillations of frequency greater than or equal to some demarcation frequency. Currently, 10 Hz is the demarcation between jitter and wander in the DS1 to DS3 North American Hierarchy.

Wander and jitter are clearly very similar since they are both “variations of the significant instants of a timing signal from their ideal positions in time”. They are also both ways of looking at phase fluctuations or angle modulation (PM or FM). Their only difference would appear to be scale. However, that can be a significant practical difference.

Consider by analogy the electromagnetic radiation spectrum, which is divided into several different bands such as infrared, visible light, radio waves, microwaves, and so forth.  In some sense, these are all “light”. However, the different types of EM radiation are generated and detected differently and interact with materials differently. So it has always made historical and practical sense to divide the spectrum into bands. This is roughly analogous to the wander versus jitter case in that these categories of phase fluctuations differ technologically.   

Why 10 Hz?

So, how did this 10 Hz demarcation frequency come about? Generally speaking, wander represented timing fluctuations that could not be attenuated by typical PLLs of the day. PLLs in the network elements would just track wander, and so it could accumulate.  Networks have to use other means such as buffers or pointer adjustments to accommodate or mitigate wander. Think of the phase noise offset region, 10 Hz and above, as “PLL Land”.

Things have changed since these standards. Back in the day it was uncommon or impractical to measure phase noise below 10 Hz offset. Now phase noise test equipment can go down to 1 Hz or below. Likewise with digital and FW/SW PLLs it is possible to have very narrowband PLLs which can provide some “wander attenuation”. Nonetheless, 10 Hz offset remains a useful dividing line and lives on in the standards.

Wander Mechanisms

Clock jitter is due to the relatively high frequency inherent or intrinsic jitter of an oscillator or other reference ultimately caused by flicker noise, shot noise, and thermal noise.  Post processing by succeeding devices such as clock buffers, clock generators, and jitter attenuators can contribute to or attenuate this random noise. Systemic or deterministic jitter components also can occur due to crosstalk, EMI, power supply noise, reflections etc.

Wander, on the other hand, is caused by slower processes. These include lower frequency offset oscillator and clock device noise components, plus the following.

• Slight initial differences in frequency and phase between clocks
• Slow changes in frequency and phase between clocks due to environmental differences such as temperature or vibration     
• Frequency and phase transients caused by switching clocks

For a good discussion of some of these wander mechanisms and their impact on a network, see [3]. 

Since wander mechanisms are different, at least in scale, and networks tend to pass or accumulate wander, industry has focused on understanding and limiting wander through specifications and standards.  

Wander Terminology and Metrics  

You may recall the use of the terms jitter generation, jitter transfer, and jitter tolerance. These measurements can be summarized as follows.  

• Jitter Generation - How much jitter is output if a jitter-free input clock is applied 
• Jitter Tolerance - How much input jitter can be tolerated without affecting device performance
• Jitter Transfer - How much jitter is transferred if a jittery input clock is applied

These definitions generally apply to phase noise measurements made with frequency domain equipment such as phase noise analyzers or spectrum analyzers. They are useful when cascading network elements.    

By contrast, wander is typically measured with time domain equipment. Counterpart definitions apply as listed below.   

• Wander Generation - How much wander is output if a wander-free input clock is applied
• Wander Tolerance - How much input wander can be tolerated without affecting device performance
• Wander Transfer - How much wander is transferred if a wandering input clock is applied

Wander has its own peculiar metrics too.  In particular, standards bodies such as the ITU rely on masks that provide limits to wander generation, tolerance, and transfer based on one or both of the following two wander parameters. See for example ITU-T 8262 [4].

• MTIE (Maximum Time Interval Error)
• TDEV (Time Deviation)

Very briefly, MTIE looks at peak-peak clock noise over intervals of time as we will discuss below. TDEV is a sort of standard deviation of the clock noise after some filtering. We will discuss TDEV next time. 

Before going into detail about MTIE, let’s discuss the foundational measurements Time Error and TIE (Time Interval Error).  These are both defined in the previously cited ITU-T G.810.

Time Error (TE)

The Time Error function x(t) is defined as follows for a measured clock generating time T(t) versus a reference clock generating time Tref(t). The frequency standard Tref(t) can be regarded as ideal, i.e., Tref(t) = t. 

x(t) = T(t) - Tref(t)

Time Interval Error (TIE)

Similarly, the Time Interval Error function is then defined as follows, where the lower case Greek letter "tau" is the time interval or observation interval.

TIE(t;tau) = [T(t+tau) - T(t)] - [Tref(t + tau) - Tref(t)] = x(t + tau) - x(t)

Maximum Time Interval Error (MTIE)

MTIE measures the maximum peak-peak variation of TIE for all observation times of length tau = n*tau0 within measurement period T. ITU-T G.810 gives the following formula for estimating MTIE. (Note: I am restricted to plain text in the formula below so please interpret "_" as preceding a subscript and "<=" as "less than or equal to".) 

MTIE(n*tau0) = max_1<=k<=N-n [max_k<=i<=k+n (x_i) - min_k<=i<=k+n (x_i)],
n = 1,2,...N- 1

Where
tau0 = sample period
tau = observation time
T = measurement period or (N-1)*tau0
x_i = i-th time error sample
MTIE (tau) = maximum xpp for all observations of length tau within T
xpp or xppk = peak-to-peak x_i within the k-th observation

The sampling period represents the minimum measurement interval or observation interval. There are many terms used in the industry that are synonymous and should be recognizable in context: averaging time, sampling interval, sampling time, etc. This could mean every nominal period if you are using an oscilloscope to capture TIE data. However, most practical measurements over long periods of time are only sampling clocks. This would correspond to a frequency counter’s “gate time”, for example, if post-processing frequency data to obtain phase data.       

An MTIE Example

It’s better to show you the general idea at this point. Below, I have modified an illustration after ITU-T G.810 Figure II.1 and indicated a tau=1*tau0 observation interval or window as it is moved across the data.  (The data are for example only and do not come from the standard. I have also started at 0 as is customary to show changes in Time Error or phase since the start of the measurement.) The initial xppk peak-peak value at the location shown is about 1.1 ns – 0 ns = 1.1 ns.

Now slide the tau=1*tau0 observation interval right and the next xppk peak-peak value is 1.4 ns – 1.1 ns = 0.3 ns.

If we continue in this vein to the end of the data, we will find the worst case to be between 17*tau0 and 18*tau0 and the value is 7.0 ns – 4.0 ns = 3.0 ns. Therefore, the MTIE for tau=1*tau0 is 3.0 ns.

I have calculated the MTIE plot for this dataset in the attached Excel spreadsheet Example_MTIE_Calcs.xlsx. Note that the first value in the plot is 3 ns as just mentioned. This is a relatively simple example for illustration only.  MTIE data typically spans many decades and are plotted against masks on logarithmic scales.   

However, even this simple example suggests a couple of items to note about MTIE plots:

1. MTIE plots always increase monotonically.
   This is because MTIE acts as a max peak detector over an interval.  Larger variations in the data are encompassed as the observation interval increases.
2. Large transients will mask smaller transients.
   Again, a max peak detector will not reveal smaller variations.

Why is MTIE Useful?

MTIE is a relatively computation intensive measurement.  So what good are these type of plots?  There are at least two good reasons besides standards compliance:

1. MTIE can be used to size buffers. As noted here [3]:

2. MTIE indicates phase behavior. [4]   
   1. Plateaus correspond to a phase shift.
   2. Ramps correspond to a phase slope (frequency offset).

Conclusion

In this post, I have discussed the differences between wander and jitter, the motivation for understanding wander, and delved in to MTIE, a wander metric important to standards compliance and useful in sizing buffers.

I hope you have enjoyed this Timing 201 article. In the Part 2 follow-up post, I will discuss another important wander metric: TDEV or Time Deviation.   

As always, if you have topic suggestions or questions appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 201 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,
Kevin

References

[1] ITU-T G.810 Definitions and terminology for synchronization networks
https://www.itu.int/rec/T-REC-G.810-199608-I/en

[2] Telcordia GR-253-CORE, Synchronous Optical Network (SONET) Transport Systems: Common Generic Criteria
The official version is orderable but not free from
https://telecom-info.njdepot.ericsson.net/site-cgi/ido/docs.cgi?ID=SEARCH&DOCUMENT=GR-253&.
My old copy is Issue 3, September 2000 but the fundamentals have not changed with the newer issues.

[3] Understanding Jitter and Wander Measurements and Standards, 2003
http://literature.cdn.keysight.com/litweb/pdf/5988-6254EN.pdf
This old Agilent (now Keysight) document remains a treasure, especially for SONET/SDH jitter and wander. See “Cause of wander” starting on p. 118.

[4] ITU-T G.8262 Timing characteristics of a synchronous equipment slave clock
https://www.itu.int/rec/T-REC-G.8262-201811-I/en

[5] K. Shenoi, Clocks, Oscillators, and PLLs, An introduction to synchronization and timing in telecommunications, WSTS – 2013, San Jose, April 16-18, 2013
https://tf.nist.gov/seminars/WSTS/PDFs/1-1_Qulsar_Shenoi_tutorial.pdf
An excellent tutorial. See slide 12.

[6] L. Cossart, Timing Measurement Fundamentals, ITSF November 2006.
http://www.chronos.co.uk/files/pdfs/itsf/2006/workshop/05-Cosart.pdf
Another excellent tutorial. See slides 40 – 41.

I suggest you create a ticket and then provide a project based on our WSTK to reproduce the issue.

You can create the ticket here https://siliconlabs.force.com/s/contactsupport

Hi Juan,

I want to highlight, that there might be two issues, which were addressed by Jim:
1. By importing your radio configuration into a RAILTest project the packet transmission fails due to the RAILTest's default packet isn't in accordance with your variable length configuration: it fires a RAIL_EVENT_TX_ABORTED event, and the TX shuts off before the first preamble chip.
2. Even if the packet is transmitted correctly, the detection performance will be terrible poor on the RX side, due to the inappropriate packet detection mechanism. It can be configured in the Advanced fields section of the radio configurator GUI.

I did not test the configuration Jim shared - I suppose it uses correct detection configuration - using the following config resulted much better detection performance (i.e., the PER decreased dramatically), than what you have in radioConfigDSSSEnabled.isc.



Let us know, if you managed to get it work, or if you have any concerns!

Best Regards,
Bence

Hi Marcos, 

one good reference sensitivity level for 2GFSK H=1 BT=05 is the -103 dBm for 100 kbps 50 kHz. Scaling with BW you should get 1.38 x 3 approx. 4 dB better sensitivity with a good radio setting. 

By default the frequency offset tolerance with internal compensation (locked at preamble detect most of the time due to DC imbalanced sync words) is around +/- deviation 3 dB above sensitivity.

Unfortunately the AFC side of the radio calculator is far from optimal, so we do AFC optimization within customer cases, if needed.

From my previous experiences I can tell that it is possible to cover approx. +/- CHBW/2 frequency offset tolerance with AFC on 40+ bits on 2FSK configs where the CHBW follows Carson's rule of thumb (2 x dev + data_rate).

AFC is a measure, tune synth, wait for settling process, but for some reason the wait parameter is not accessible from the GUI.

I also encountered some problems with the calculations around AFC, so feel yourself lucky/proud in using AFC :) , therefore I would advise you to open up a ticket if you need proper AFC settings for your PHY.

Hopefully we will address all major issues around the AFC in the near future.

/Feri

Hi,

Not sure I fully understand your question - let me know if I misunderstood.

In Studio, you can open the Radio Configurator and for example select a PHY which is close to the required PHY. In this case above I would probably select 434MHz 2GFSK 200kbps. In the Radio Configurator there is a switch "Customized". If that's turned "on", you can change the PHY parameters, like center frequency to 490MHz, and the required data rate (ex.: 250kbps) and the deviation (rule of thumb: the date rate should be about the double of the deviation in this case). The save the configuration and recompile the project.

BR,

/sza2

Hi,

First of all, don't move sl_power_manager_sleep() from the main.c to app_process.c. The main loop in main.c will call sl_power_manager_sleep().

You did not mentioned which components did you install. You have to install the Power Manager component if you did not do that (In Simple TRX with Auto-ACK it is not installed by default).

You can control the possible lowest sleep mode by calling

sl_power_manager_remove_em_requirement()

and

sl_power_manager_add_em_requirement()

functions from the application on demand.

Additionally, in the Universal Configurator (opens by clicking on the project's .slcp file) navigate to the Software Component tab and search for "vcom", then click on Configure. There is a switch named Restrict the energy mode toallow reception. That switch must be on off position, otherwise the application will not go to EM2 and lower.

BR,

/sza2

Hi Zahoor,

Sorry for the late replay.  Do you have any update?

First you should make sure the transmit side transmits the proper bytes. Did you try to check the signals on GPIO as I recommended?

In your configuration you have selected variable length, so the receiver will handle the first two bytes of the transmitted packet as packet length. This will be adjusted with the number that you have configured as 90. I don't think this was your intention. I recommend to start with a simple short fixed length packet configuration, and if it works you can step forward to variable length. And please use hex representation if you list packet content here.

Regards,

Tamás

Use the Direct TX project of WDS, that also generates the RX config for the same RF parameters. You may have to change only the GPIO config if you want to use the same GPIOs for RX and TX. After that you can change state between RX and TX.

See the article Direct mode GPIO configuration on Si4x6x and Si4x55 and app note AN633: Pprogramming Guide for EZRadioPRO Si4x6x Devices

Regards

Tamás

The more power generated by a smaller power supply, the more cost effective it is and the less room it takes in the design. Designers can improve W/mm³ with faster switching. Switching technology using Gallium Nitride (GaN) or Silicon Carbide (SiC) allows faster switching rates than are currently available—up to 20 times faster.

The technologies’ lateral structures, compared to vertical for silicon, make them low-charge devices capable of switching hundreds of volts in mere nano-seconds (ns). The challenge is that they require isolated gate drivers to work, and today’s technology typically cannot support the required noise immunity from their superfast switching.

Faster Switching - SMPS Want It

Fast power switching is most prevalent in switched mode power supplies (SMPS). SMPS convert their input power from ac to dc (ac-dc) or from dc to dc (dc-dc). In most cases, they also change voltage levels to suit the needs of the application.

Typical ac-dc SMPS block diagram

The new GaN and SiC technology switches faster and is more efficient than current switches. But their faster switching causes higher switching transients as shown in the figure below with a typical 600 V high side rail.

Switching transients in a power converter

GaN switching times are typically about 5ns, or about 10x - 20x faster than conventional systems. In this case, the 600 V high voltage rail results in a 120 kV/µs transient (600 V / 5 ns = 120 V/ns or 120 kV/µs).

CMTI – Common Mode Transient Immunity – the Key Isolated Gate Driver Spec

The isolated gate drivers controlling the power switches have to be designed to withstand these noise transients without creating glitches or latching-up. The ability of the driver to withstand these common mode noise transients is generally defined as CMTI (common mode transient immunity), and is expressed in units of kV/µs.

What are the Isolated Gate Driver Options?

Isolated gate drivers must preserve the integrity of the isolation from the primary to the secondary side. There are a number of isolated gate driver solutions available today:

• Junction-isolated drivers – With 50 kV/µs for latch-up immunity (CMTI proxy), these are not suitable for new, fast-switching tech’s requirement.
• Opto-coupled drivers – With 10-50 kV/µs for latch-up immunity (CMTI proxy), these are still not good enough.
• Transformer-coupled drivers – Getting closer with 50-100 kV/µs for latch-up immunity (CMTI proxy), but these are still not adequate.
• Capacitive-coupled drivers – She’s got it where it counts. These explicitly specify CMTI at 200 kV/µs (MIN) for signal integrity and 400 kV/µs (MAX) for latch-up immunity. These exceed the 120 kV/µs requirement.

There are other advantages for these drivers. Their latency (propagation delay) can be as much as 10x better than popular optocoupled gate drivers, and their part-to-part matching can be more than 10x better. This provides the designer with another key advantage—the system’s overall modulation scheme can be fine-tuned for maximum efficiency (W/mm³) and safety without having to accommodate specification slop. They also support lower voltage operation (2.5 V compared to 5 V) and a wider operating temperature range.

Plus, they offer advanced features such as input noise filters, asynchronous shutdown capability, and multiple configurations such as half bridge or dual independent drivers in a single package.

Finally, they are rated to 60 years of operating life at high voltage conditions, longer than any other comparable solution.

Power supply designers want to maximize their W/mm³ using the fastest power switching technology available. The latest GaN- and SiC-based switches are the fastest available technology today, but isolated require gate drivers with very high noise immunity (CMTI).

The Si827x isolated gate drivers from Silicon Labs meet GaN’s and SiC’s noise immunity requirements with margin to spare (120 kV/µs required, 200 kV/µs supplied).

Silicon Labs IDE can be downloaded from www.silabs.com/documents/login/software/mcu_ide.exe

You can get the free license key at https://pages.silabs.com/lp-keil-pk51.html