Hi Leo,

Si5394A datasheet does require the REFCLK Frequency be within 24.97MHz - 54.06MHz on its Page 27. It has been characterized to get guaranteed performance within this frequency range. So, ClockBuilder Pro follows this requirement strictly, and it is not a bug.

https://www.silabs.com/documents/public/data-sheets/si5395-94-92-a-datasheet.pdf

If you still like to try a XO of 100MHz, although we strongly recommend not, you may work around the limit of ClockBuilder Pro through setting XO=50MHz, export the register file, revise the PXAXB register from 0 (divider value =1) to be 1 (divider value=2)  as shown on Page 73 of Si5394A RM, and then import the new register file to the chip on EVB through GUI tool of ClockBuilder Pro.

https://www.silabs.com/documents/login/reference-manuals/si5395-94-92-family.pdf

if any further question, feel free to let me know.

Regards,

Andy

Introduction

Hello and welcome to the inaugural article for a new blog series, Timing 201. My previous blog series, Timing 101, ran for 12 articles over a period of roughly a year and a half.

As the name suggests, I intend to discuss timing topics with a little bit more breadth and depth than might be considered “Timing 101” material. However, that does not mean I won’t cover introductory material, if and when it’s called for, especially if readers ask for it.

When More is Less

You may recall that clock buffers are typically specified in terms of additive jitter. That is because they do not have an intrinsic phase noise source such as an XO (crystal oscillator) or a PLL’s VCXO. They consist of only amplifiers and perhaps dividers. So we would generally expect an XO followed by a clock buffer to have at least somewhat increased phase noise or jitter compared to the XO alone.

All things being equal, this will be the case, except when the amplifier has sufficiently high gain to act as a limiting amplifier or LA. In these situations, the apparent measured source + LA phase noise may actually decrease. I ran in to this phenomena years ago evaluating various clock + buffer combinations. The results weren’t always making sense and it turned out at the time that some of the noise I was measuring was in fact, not really phase noise, hence the title of this case.

To see how this might happen, let’s touch on what is meant here by apparent measured phase noise.

Phasors ON

You may recall I discussed modulation spurs previously in Timing 101 #7: The Case of the Spurious Phase Noise Part II. In that article, I considered carriers with relatively small amounts of AM (Amplitude Modulation) and narrowband FM (Frequency Modulation) or equivalent PM (Phase Modulation). The general ideas comparing AM and FM/PM spurs also apply to AM and FM/PM noise.

One topic I did not touch on at that time was the phasor or phase vector representations of AM and NB FM as shown below. The carrier vector is shown as a thick red arrow and the modulation LSB (lower sideband) and USB (upper sideband) vector components are shown as thinner blue arrows. The vector sum or resultant of the modulation is the thick blue arrow. The modulating frequency is f<subscript>M and the rotating arrows indicate the change in the modulation vectors over time versus the carrier. For the figures below the overall vector sum is the geometric addition of the carrier + modulation resultant.

What’s useful about the phasor representation is that it indicates that random noise modulating the carrier can be regarded as consisting of both AM and PM components. That is, components of the noise contributing to carrier magnitude changes are the AM components. Likewise, components of the noise contributing to carrier angle changes are FM or equivalent PM components.

You may see authors emphasizing this distinction by using script L(f) or ℒ(f) to refer to PM noise or “real” phase noise and script M(f) or ℳ(f) to refer to AM noise. The first paper I know of using this notation is:

Spectral Density Analysis: Frequency Domain Specification and Measurement of Signal Stability, by Donald Halford, John H. Shoaf, and A. S. Risley, National Bureau of Standards, Boulder, CO, published in 27th Annual Symposium on Frequency Control, 12-14 June 1973, https://tf.nist.gov/general/pdf/1558.pdf

The magnitude of noise that is AM + PM will be the RSS or Root Sum Square of the individual modulation contributions. Instruments that treat these noise components the same will then “see” this RSS noise directly as phase noise. This is what is meant by apparent phase noise and it is a particular issue for Spectrum Analyzers as discussed below.

The Spectrum Analyzer in Brief

As I noted in Timing 101 #7, Spectrum Analyzers do not preserve phase information and so a low modulation AM spur appears similar to a narrow band low modulation FM spur. 

Below is a block diagram for a classic swept spectrum analyzer which suggests why. It is essentially a calibrated frequency selective peak responding voltmeter. The difference in phase between the DUT (Device Under Test) and the LO (Local Oscillator) inputs at the mixer is arbitrary. The Spectrum Analyzer doesn’t “know” anything about their relative phases and AM and PM cannot be distinguished. 

The Phase Noise Analyzer in Brief

By contrast, the Phase Noise Analyzer is much less susceptible to AM. The simplified block diagram below gives the basic idea behind the method typically used by Phase Noise Analyzers and Signal Source Analyzers. The mixer is usually a double-balanced mixer to suppress even-order mixing products.

Note that, unlike the Spectrum Analyzer, there is a PLL (Phase Lock Loop) that enforces a specific phase relationship between the DUT and the Reference. Further, it can be shown that AM and PM can be distinguished as follows.

• If phase offset = 90˚ then the mixer detects PM and suppresses AM
• If phase offset = 0˚ then the mixer detects AM and suppresses PM

As designed, the Phase Noise Analyzer will be superior to the spectrum analyzer for rejecting AM.

Take It to the Limit

So how exactly does the limiting amplifier or LA help us here? The clue lies in the behavior of the LA: It removes, or at least minimizes, amplitude variation from the clock signal. Therefore, if a source has both AM and PM noise components, then an ideal limiter will remove the AM component noise leaving only the PM noise (the genuine phase noise) behind.  The exaggerated sketch below gives the basic idea.

Now getting back to the original work which prompted this post:

If a clock source had apparent phase noise that included both AM and PM noise contributions, then following it with a high gain clock buffer or LA would strip away the AM resulting in less than expected measured phase noise. Rather than yielding additive jitter the new component apparently yielded “subtractive” jitter. Thus the case of the phase noise that wasn’t.

When should AM be considered when making phase noise measurements?

The short answer is that AM is always a potential consideration when one is making careful jitter and phase noise measurements. Having a limiter on one’s lab bench is as important as a balun.

However, there are specific instances where AM can be more of an issue than others.

1. Measuring phase noise using a spectrum analyzer or any other instrument that does not sufficiently reject AM.

A limiter can be valuable even when working with a Phase Noise Analyzer by suppressing AM beyond the rejection capability of the mixer. This may be necessary when measuring very low phase noise sources.

2. Measuring low frequency low phase noise sources.

You may recall the 20log(N) rule, i.e. if the carrier frequency of a clock is divided down by a factor of N then we expect the phase noise to decrease by 20log(N); however, this rule only applies to phase noise. If there is significant AM noise also then this component will loom larger, as we decrease the carrier frequency, and potentially impact measurements.

3. Measuring a source known or suspected to have AM noise.

Clock sources with high common mode noise fall in to this category. For example, we specifically inject power supply ripple when testing oscillator power supply rejection. This is why you see a limiting amplifier shown in Figure 5. PSRR Setup in AN491: Power Supply Rejection For Low-Jitter Clocks. See the highlighted block in the diagram below which comes from that app note.

4. Troubleshooting

Finally, the ability to distinguish between phase noise and spurs, and AM noise and spurs, can be very helpful when troubleshooting a system and determining the root cause of performance issues. Additional testing may also be needed to determine how sensitive the ultimate receiver is to clock impairments that include AM noise.

Conclusion

I hope you have enjoyed this Timing 201 article. In the next article, I will give some measurement examples and offer a few rules of thumb.

As always, if you have topic suggestions for this blog or timing-related questions, please send them to kevin.smith@silabs.com with “Timing 201” in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

Introduction

Hello and welcome to the inaugural article for a new blog series, Timing 201. My previous blog series, Timing 101, ran for 12 articles over a period of roughly a year and a half.

As the name suggests, I intend to discuss timing topics with a little bit more breadth and depth than might be considered “Timing 101” material. However, that does not mean I won’t cover introductory material, if and when it’s called for, especially if readers ask for it.

When More is Less

You may recall that clock buffers are typically specified in terms of additive jitter. That is because they do not have an intrinsic phase noise source such as an XO (crystal oscillator) or a PLL’s VCXO. They consist of only amplifiers and perhaps dividers. So we would generally expect an XO followed by a clock buffer to have at least somewhat increased phase noise or jitter compared to the XO alone.

All things being equal, this will be the case, except when the amplifier has sufficiently high gain to act as a limiting amplifier or LA. In these situations, the apparent measured source + LA phase noise may actually decrease. I ran in to this phenomena years ago evaluating various clock + buffer combinations. The results weren’t always making sense and it turned out at the time that some of the noise I was measuring was in fact, not really phase noise, hence the title of this case.

To see how this might happen, let’s touch on what is meant here by apparent measured phase noise.

Phasors ON

You may recall I discussed modulation spurs previously in Timing 101 #7: The Case of the Spurious Phase Noise Part II. In that article, I considered carriers with relatively small amounts of AM (Amplitude Modulation) and narrowband FM (Frequency Modulation) or equivalent PM (Phase Modulation). The general ideas comparing AM and FM/PM spurs also apply to AM and FM/PM noise.

One topic I did not touch on at that time was the phasor or phase vector representations of AM and NB FM as shown below. The carrier vector is shown as a thick red arrow and the modulation LSB (lower sideband) and USB (upper sideband) vector components are shown as thinner blue arrows. The vector sum or resultant of the modulation is the thick blue arrow. The modulating frequency is f<subscript>M and the rotating arrows indicate the change in the modulation vectors over time versus the carrier. For the figures below the overall vector sum is the geometric addition of the carrier + modulation resultant.

What’s useful about the phasor representation is that it indicates that random noise modulating the carrier can be regarded as consisting of both AM and PM components. That is, components of the noise contributing to carrier magnitude changes are the AM components. Likewise, components of the noise contributing to carrier angle changes are FM or equivalent PM components.

You may see authors emphasizing this distinction by using script L(f) or ℒ(f) to refer to PM noise or “real” phase noise and script M(f) or ℳ(f) to refer to AM noise. The first paper I know of using this notation is:

Spectral Density Analysis: Frequency Domain Specification and Measurement of Signal Stability, by Donald Halford, John H. Shoaf, and A. S. Risley, National Bureau of Standards, Boulder, CO, published in 27th Annual Symposium on Frequency Control, 12-14 June 1973, https://tf.nist.gov/general/pdf/1558.pdf

The magnitude of noise that is AM + PM will be the RSS or Root Sum Square of the individual modulation contributions. Instruments that treat these noise components the same will then “see” this RSS noise directly as phase noise. This is what is meant by apparent phase noise and it is a particular issue for Spectrum Analyzers as discussed below.

The Spectrum Analyzer in Brief

As I noted in Timing 101 #7, Spectrum Analyzers do not preserve phase information and so a low modulation AM spur appears similar to a narrow band low modulation FM spur. 

Below is a block diagram for a classic swept spectrum analyzer which suggests why. It is essentially a calibrated frequency selective peak responding voltmeter. The difference in phase between the DUT (Device Under Test) and the LO (Local Oscillator) inputs at the mixer is arbitrary. The Spectrum Analyzer doesn’t “know” anything about their relative phases and AM and PM cannot be distinguished. 

The Phase Noise Analyzer in Brief

By contrast, the Phase Noise Analyzer is much less susceptible to AM. The simplified block diagram below gives the basic idea behind the method typically used by Phase Noise Analyzers and Signal Source Analyzers. The mixer is usually a double-balanced mixer to suppress even-order mixing products.

Note that, unlike the Spectrum Analyzer, there is a PLL (Phase Lock Loop) that enforces a specific phase relationship between the DUT and the Reference. Further, it can be shown that AM and PM can be distinguished as follows.

• If phase offset = 90˚ then the mixer detects PM and suppresses AM
• If phase offset = 0˚ then the mixer detects AM and suppresses PM

As designed, the Phase Noise Analyzer will be superior to the spectrum analyzer for rejecting AM.

Take It to the Limit

So how exactly does the limiting amplifier or LA help us here? The clue lies in the behavior of the LA: It removes, or at least minimizes, amplitude variation from the clock signal. Therefore, if a source has both AM and PM noise components, then an ideal limiter will remove the AM component noise leaving only the PM noise (the genuine phase noise) behind.  The exaggerated sketch below gives the basic idea.

Now getting back to the original work which prompted this post:

If a clock source had apparent phase noise that included both AM and PM noise contributions, then following it with a high gain clock buffer or LA would strip away the AM resulting in less than expected measured phase noise. Rather than yielding additive jitter the new component apparently yielded “subtractive” jitter. Thus the case of the phase noise that wasn’t.

When should AM be considered when making phase noise measurements?

The short answer is that AM is always a potential consideration when one is making careful jitter and phase noise measurements. Having a limiter on one’s lab bench is as important as a balun.

However, there are specific instances where AM can be more of an issue than others.

1. Measuring phase noise using a spectrum analyzer or any other instrument that does not sufficiently reject AM.

A limiter can be valuable even when working with a Phase Noise Analyzer by suppressing AM beyond the rejection capability of the mixer. This may be necessary when measuring very low phase noise sources.

2. Measuring low frequency low phase noise sources.

You may recall the 20log(N) rule, i.e. if the carrier frequency of a clock is divided down by a factor of N then we expect the phase noise to decrease by 20log(N); however, this rule only applies to phase noise. If there is significant AM noise also then this component will loom larger, as we decrease the carrier frequency, and potentially impact measurements.

3. Measuring a source known or suspected to have AM noise.

Clock sources with high common mode noise fall in to this category. For example, we specifically inject power supply ripple when testing oscillator power supply rejection. This is why you see a limiting amplifier shown in Figure 5. PSRR Setup in AN491: Power Supply Rejection For Low-Jitter Clocks. See the highlighted block in the diagram below which comes from that app note.

4. Troubleshooting

Finally, the ability to distinguish between phase noise and spurs, and AM noise and spurs, can be very helpful when troubleshooting a system and determining the root cause of performance issues. Additional testing may also be needed to determine how sensitive the ultimate receiver is to clock impairments that include AM noise.

Conclusion

I hope you have enjoyed this Timing 201 article. In the next article, I will give some measurement examples and offer a few rules of thumb.

As always, if you have topic suggestions for this blog or timing-related questions, please send them to kevin.smith@silabs.com with “Timing 201” in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

Introduction

Hello and welcome to the inaugural article for a new blog series, Timing 201. My previous blog series, Timing 101, ran for 12 articles over a period of roughly a year and a half.

As the name suggests, I intend to discuss timing topics with a little bit more breadth and depth than might be considered “Timing 101” material. However, that does not mean I won’t cover introductory material, if and when it’s called for, especially if readers ask for it.

When More is Less

You may recall that clock buffers are typically specified in terms of additive jitter. That is because they do not have an intrinsic phase noise source such as an XO (crystal oscillator) or a PLL’s VCXO. They consist of only amplifiers and perhaps dividers. So we would generally expect an XO followed by a clock buffer to have at least somewhat increased phase noise or jitter compared to the XO alone.

All things being equal, this will be the case, except when the amplifier has sufficiently high gain to act as a limiting amplifier or LA. In these situations, the apparent measured source + LA phase noise may actually decrease. I ran in to this phenomena years ago evaluating various clock + buffer combinations. The results weren’t always making sense and it turned out at the time that some of the noise I was measuring was in fact, not really phase noise, hence the title of this case.

To see how this might happen, let’s touch on what is meant here by apparent measured phase noise.

Phasors ON

You may recall I discussed modulation spurs previously in Timing 101 #7: The Case of the Spurious Phase Noise Part II. In that article, I considered carriers with relatively small amounts of AM (Amplitude Modulation) and narrowband FM (Frequency Modulation) or equivalent PM (Phase Modulation). The general ideas comparing AM and FM/PM spurs also apply to AM and FM/PM noise.

One topic I did not touch on at that time was the phasor or phase vector representations of AM and NB FM as shown below. The carrier vector is shown as a thick red arrow and the modulation LSB (lower sideband) and USB (upper sideband) vector components are shown as thinner blue arrows. The vector sum or resultant of the modulation is the thick blue arrow. The modulating frequency is f<subscript>M and the rotating arrows indicate the change in the modulation vectors over time versus the carrier. For the figures below the overall vector sum is the geometric addition of the carrier + modulation resultant.

What’s useful about the phasor representation is that it indicates that random noise modulating the carrier can be regarded as consisting of both AM and PM components. That is, components of the noise contributing to carrier magnitude changes are the AM components. Likewise, components of the noise contributing to carrier angle changes are FM or equivalent PM components.

You may see authors emphasizing this distinction by using script L(f) or ℒ(f) to refer to PM noise or “real” phase noise and script M(f) or ℳ(f) to refer to AM noise. The first paper I know of using this notation is:

Spectral Density Analysis: Frequency Domain Specification and Measurement of Signal Stability, by Donald Halford, John H. Shoaf, and A. S. Risley, National Bureau of Standards, Boulder, CO, published in 27th Annual Symposium on Frequency Control, 12-14 June 1973, https://tf.nist.gov/general/pdf/1558.pdf

The magnitude of noise that is AM + PM will be the RSS or Root Sum Square of the individual modulation contributions. Instruments that treat these noise components the same will then “see” this RSS noise directly as phase noise. This is what is meant by apparent phase noise and it is a particular issue for Spectrum Analyzers as discussed below.

The Spectrum Analyzer in Brief

As I noted in Timing 101 #7, Spectrum Analyzers do not preserve phase information and so a low modulation AM spur appears similar to a narrow band low modulation FM spur. 

Below is a block diagram for a classic swept spectrum analyzer which suggests why. It is essentially a calibrated frequency selective peak responding voltmeter. The difference in phase between the DUT (Device Under Test) and the LO (Local Oscillator) inputs at the mixer is arbitrary. The Spectrum Analyzer doesn’t “know” anything about their relative phases and AM and PM cannot be distinguished. 

The Phase Noise Analyzer in Brief

By contrast, the Phase Noise Analyzer is much less susceptible to AM. The simplified block diagram below gives the basic idea behind the method typically used by Phase Noise Analyzers and Signal Source Analyzers. The mixer is usually a double-balanced mixer to suppress even-order mixing products.

Note that, unlike the Spectrum Analyzer, there is a PLL (Phase Lock Loop) that enforces a specific phase relationship between the DUT and the Reference. Further, it can be shown that AM and PM can be distinguished as follows.

• If phase offset = 90˚ then the mixer detects PM and suppresses AM
• If phase offset = 0˚ then the mixer detects AM and suppresses PM

As designed, the Phase Noise Analyzer will be superior to the spectrum analyzer for rejecting AM.

Take It to the Limit

So how exactly does the limiting amplifier or LA help us here? The clue lies in the behavior of the LA: It removes, or at least minimizes, amplitude variation from the clock signal. Therefore, if a source has both AM and PM noise components, then an ideal limiter will remove the AM component noise leaving only the PM noise (the genuine phase noise) behind.  The exaggerated sketch below gives the basic idea.

Now getting back to the original work which prompted this post:

If a clock source had apparent phase noise that included both AM and PM noise contributions, then following it with a high gain clock buffer or LA would strip away the AM resulting in less than expected measured phase noise. Rather than yielding additive jitter the new component apparently yielded “subtractive” jitter. Thus the case of the phase noise that wasn’t.

When should AM be considered when making phase noise measurements?

The short answer is that AM is always a potential consideration when one is making careful jitter and phase noise measurements. Having a limiter on one’s lab bench is as important as a balun.

However, there are specific instances where AM can be more of an issue than others.

1. Measuring phase noise using a spectrum analyzer or any other instrument that does not sufficiently reject AM.

A limiter can be valuable even when working with a Phase Noise Analyzer by suppressing AM beyond the rejection capability of the mixer. This may be necessary when measuring very low phase noise sources.

2. Measuring low frequency low phase noise sources.

You may recall the 20log(N) rule, i.e. if the carrier frequency of a clock is divided down by a factor of N then we expect the phase noise to decrease by 20log(N); however, this rule only applies to phase noise. If there is significant AM noise also then this component will loom larger, as we decrease the carrier frequency, and potentially impact measurements.

3. Measuring a source known or suspected to have AM noise.

Clock sources with high common mode noise fall in to this category. For example, we specifically inject power supply ripple when testing oscillator power supply rejection. This is why you see a limiting amplifier shown in Figure 5. PSRR Setup in AN491: Power Supply Rejection For Low-Jitter Clocks. See the highlighted block in the diagram below which comes from that app note.

4. Troubleshooting

Finally, the ability to distinguish between phase noise and spurs, and AM noise and spurs, can be very helpful when troubleshooting a system and determining the root cause of performance issues. Additional testing may also be needed to determine how sensitive the ultimate receiver is to clock impairments that include AM noise.

Conclusion

I hope you have enjoyed this Timing 201 article. In the next article, I will give some measurement examples and offer a few rules of thumb.

As always, if you have topic suggestions for this blog or timing-related questions, please send them to kevin.smith@silabs.com with “Timing 201” in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

Introduction

In this follow-up post, The Case of the Noisy Source Clock Tree Part 2, I will discuss in more detail exactly how to calculate the total jitter for a noisy source clock tree that includes a jitter attenuator. I will also provide a measurement and spreadsheet example.

Recap

In Part 1, I first discussed the low jitter source canonical clock tree, how to calculate the total jitter by Root Sum Square, and reviewed the terms jitter transfer, jitter generation, and additive jitter. I then moved on to the noisy source clock tree, the motivation for adding jitter attenuation, and introduced how to calculate its total jitter.

As I mentioned last time, following the clock signal from the source through the clock tree components to the sink or destination is best viewed as a system that processes phase noise. That is, if we know the phase noise characteristics of each clock tree component, we should be able to estimate the end clock phase noise and its phase jitter over a particular jitter bandwidth.

By best I mean that this approach is more universal and accurate. It can be applied to all types of clock trees, with or without noisy sources and jitter attenuators.

The Basic Idea

The general approach is illustrated below. Every clock tree can be regarded as a cascade of phase noise processing elements each of which, in the most general sense, can be modeled as the Root Sum Square or RSS of the Jitter Generation (JGEN) phase noise in contribution with the Jitter Transfer Function (JTF) applied to the scaled input clock phase noise.

Scaling is required so that the components contributing to the RSS are all at the same carrier frequency. The details will be made clearer in the example that follows.

The ith element above illustrates the general clock tree component model. All the contributions shown apply in the case of a jitter attenuator which also multiplies or divides the input clock. However, in practice, not all aspects of the general model apply, or are readily available, for every clock tree component:

1. The independent clock source such as an XO at Element “1”, the root of the clock tree, has no input clock so the JTF branch is zeroed out. It can be modeled simply as JGEN, i.e. the source’s output clock phase noise.
2. The typical clock generator has a wide bandwidth so the JTF contribution is negligible and it too is modeled simply as JGEN.
3. The clock buffer has no PLL so JGEN is not applicable. Unfortunately, a JTF is usually not available. We typically have to rely on additive jitter specified over a particular bandwidth or do further characterization.

A Practical Measurement Example

Consider the following simplified block diagram. I used an Arbitrary Waveform Generator or AWG as my noisy 50 MHz input clock source and followed it with an Si5345 evaluation board. The Si5345 does both jitter attenuation and clock multiplication as is the common practical case. I then followed the jitter attenuator (JA) with an Si53301 clock buffer evaluation board. The output clocks for both the jitter attenuator and clock buffer are 156.25 MHz.

No baluns or limiters were used. Just straightforward single-ended connections to and from test equipment and differential connections between the jitter attenuator and clock buffer. The unmeasured output clock polarity was terminated on the clock buffer EVB.

Calculating Phase Jitter

In the work that follows, we often want to calculate RMS phase jitter, i.e. integrated phase noise over a select frequency range, from a dataset of phase noise L(f) (dBc/Hz) versus offset frequency f (Hz). For the purpose of this exercise, we ignore spurs though they can certainly be included.

The general procedure is as follows.

1. Convert SSB phase noise data L(f) from dBc/Hz to W/Hz.                                                             
2. "Brickwall" filter the data over the selected jitter filter bandwidth. In this example, we take 12 kHz to 20 MHz. (Sloped filters can be used too but not in these particular spreadsheets.)                                      
3. Over the jitter filter bandwidth, take the average of the current and previous spot phase noise measurements (W/Hz) multiplied by the difference in offset frequencies (Hz).                                           
4. Sum all these jitter power contributions.                                                                   
5. Double to account for DSB or Double Sideband and then convert to UI or Unit Intervals.                       
6. Finally, convert from UI to time domain units, typically fs.             

As will be seen, the worksheets that use this technique calculate values very close to what the phase noise instrument reports.

Measurement Steps

I have attached a spreadsheet, PhaseJitterCalcsClockTreeWithoutSpurs.xlsx, that records the results and compares them to lab measurements in the form of Agilent E5052B screen caps. There are 9 total measurements steps listed below in worksheet order as follows with additional details. The convention on the calculations worksheets is that input data are in yellow colored cells.

1. 50 MHz AWG Meas Data - Measure the AWG’s 50 MHz phase noise. This is the clock phase noise that will be input to the jitter attenuator. This worksheet imports the CSV file containing the measured phase noise for an Arbitrary Waveform Generator (AWG) operating at nominal 0 dBm and 50 MHz.
2. 50 MHz AWG Calcs - Calculate the AWG’s 50 MHz phase jitter based on the measured phase noise data using the procedure described earlier. In this context, the term “phase jitter” always refers to the RMS quantity based on integrating phase noise over the 12 kHz – 20 MHz offset frequency range. The calculated result is 7917 fs or 7.7917 ps which is noisy indeed. This result is accurate to 0.1% compared to the figure reported by the Agilent E5052B screen cap.
3. 50 MHz Sig Gen Meas Data - Measure the signal generator’s 50 MHz phase noise. This worksheet imports the CSV file containing the measured phase noise for a signal generator also operating at nominal 0 dBm and 50 MHz.

Note: This is the clock phase noise that will be input to the jitter attenuator (JA) to estimate its Jitter Generation (JGEN) at the output frequency. It was presumed, based on previous experience, that the sig gen’s performance would be better than the AWG’s and so would be a good candidate for this role. However, this had to be confirmed.

4. 50 MHz Sig Gen Calcs - Calculate the sig gen’s 50 MHz phase jitter. The calculated result is 785 fs, accurate to 0.02% compared to the figure reported by the Agilent E5052B.  
5. 50 MHz AWG vs Sig Gen Plots - Here I compare the AWG versus the signal generator phase noise, both operating at 50 MHz. Generally speaking the sig gen’s phase noise is close to, or better than, that of the AWG’s performance. The previous worksheets’ calculations showed that the signal generator was roughly an order of magnitude better than the AWG in terms of phase jitter. Given this confirmation, it is reasonable to select the sig gen to be the low noise source for the subsequently estimated JGEN.

Note: It may also be expedient to operate a jitter attenuator in Free Run mode and use its output clock phase noise as a stand-in for JGEN. It does not account for all noise sources but can often get within 5% for typical jitter bandwidths. However, it will not be as accurate at low offset frequencies.

6. JGEN 156.25 MHz Meas Data - This worksheet imports the CSV file containing the JA’s 156.25 MHz output clock measured phase noise where the low noise RF signal generator supplies the 50 MHz input clock. This data is used to the estimate the JA’s JGEN.
7. JGEN 156.25 MHz Calcs - Calculates the JA’s JGEN phase jitter. The calculated result is 83.5 fs, accurate to 0.03% compared to the figure reported by the Agilent E5052B.
8. Clock Tree Calcs - This is the clock tree calculations worksheet that puts everything together. Inspecting the columns going from left to right you can see the following operations:

• Scale the input clock phase noise with reference to the output clock carrier frequency.
• Apply jitter attenuation. Here we assume a low pass filter response with 40 dB /dec attenuation starting at the loop BW frequency 100 Hz. This is a simplified version, accurate well beyond the corner frequency. (The more accurate the JTF, the better the results.)
• Bring in the JGEN data from worksheet “7. JGEN 156.25 MHz Meas Calcs”.
• RSS the contributions from the JGEN phase noise plus the scaled jitter attenuated phase noise.
• Calculate the phase jitter for the JA’s output clock.
• Finally, calculate the phase jitter for the clock buffer’s output clock. There is no JTF for this buffer but there is a specified typical spec of 145 fs additive phase jitter, 12 kHz – 20 MHz.

Two different E5052B screen caps are copied on to this last calculations worksheet, one for the JA output clock, and one for the buffer output clock.

9. Clock Tree Plots - All of the relevant input, interim, and output curves for the jitter attenuator are plotted here.

Overall Results

So how did it go? It went reasonably well with a caveat at the end.

The JA output clock phase jitter was calculated to be 83.47 fs which was 0.9% lower than the measured 84.19 fs. The shape of the measured phase noise plot looks close to the expected plot except close in.

The buffer output clock phase noise was calculated to be 167.31 fs which was -5.2 % lower than measured, based on using the datasheet typical value for additive jitter, 12 kHz – 20 MHz. We don’t simply see +1 or +2 dB added everywhere to the JA output clock phase noise. Rather, the shape of the measured phase noise plot showed more phase noise at far offset frequencies, where the “floor” rose from about -162 to -152 dBc/Hz.

Bottom line: These results are good from a phase jitter point of view. However, it appears that a buffer JTF would be needed to better predict the end phase noise plot.

Conclusion

I hope you have enjoyed this Timing 101 article. This is the last post for 2018. Happy Holidays and Happy New Year to you all! I look forward to exploring more topics with you in 2019.

As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

Introduction

In this follow-up post, The Case of the Noisy Source Clock Tree Part 2, I will discuss in more detail exactly how to calculate the total jitter for a noisy source clock tree that includes a jitter attenuator. I will also provide a measurement and spreadsheet example.

Recap

In Part 1, I first discussed the low jitter source canonical clock tree, how to calculate the total jitter by Root Sum Square, and reviewed the terms jitter transfer, jitter generation, and additive jitter. I then moved on to the noisy source clock tree, the motivation for adding jitter attenuation, and introduced how to calculate its total jitter.

As I mentioned last time, following the clock signal from the source through the clock tree components to the sink or destination is best viewed as a system that processes phase noise. That is, if we know the phase noise characteristics of each clock tree component, we should be able to estimate the end clock phase noise and its phase jitter over a particular jitter bandwidth.

By best I mean that this approach is more universal and accurate. It can be applied to all types of clock trees, with or without noisy sources and jitter attenuators.

The Basic Idea

The general approach is illustrated below. Every clock tree can be regarded as a cascade of phase noise processing elements each of which, in the most general sense, can be modeled as the Root Sum Square or RSS of the Jitter Generation (JGEN) phase noise in contribution with the Jitter Transfer Function (JTF) applied to the scaled input clock phase noise.

Scaling is required so that the components contributing to the RSS are all at the same carrier frequency. The details will be made clearer in the example that follows.

The ith element above illustrates the general clock tree component model. All the contributions shown apply in the case of a jitter attenuator which also multiplies or divides the input clock. However, in practice, not all aspects of the general model apply, or are readily available, for every clock tree component:

1. The independent clock source such as an XO at Element “1”, the root of the clock tree, has no input clock so the JTF branch is zeroed out. It can be modeled simply as JGEN, i.e. the source’s output clock phase noise.
2. The typical clock generator has a wide bandwidth so the JTF contribution is negligible and it too is modeled simply as JGEN.
3. The clock buffer has no PLL so JGEN is not applicable. Unfortunately, a JTF is usually not available. We typically have to rely on additive jitter specified over a particular bandwidth or do further characterization.

A Practical Measurement Example

Consider the following simplified block diagram. I used an Arbitrary Waveform Generator or AWG as my noisy 50 MHz input clock source and followed it with an Si5345 evaluation board. The Si5345 does both jitter attenuation and clock multiplication as is the common practical case. I then followed the jitter attenuator (JA) with an Si53301 clock buffer evaluation board. The output clocks for both the jitter attenuator and clock buffer are 156.25 MHz.

No baluns or limiters were used. Just straightforward single-ended connections to and from test equipment and differential connections between the jitter attenuator and clock buffer. The unmeasured output clock polarity was terminated on the clock buffer EVB.

Calculating Phase Jitter

In the work that follows, we often want to calculate RMS phase jitter, i.e. integrated phase noise over a select frequency range, from a dataset of phase noise L(f) (dBc/Hz) versus offset frequency f (Hz). For the purpose of this exercise, we ignore spurs though they can certainly be included.

The general procedure is as follows.

1. Convert SSB phase noise data L(f) from dBc/Hz to W/Hz.                                                             
2. "Brickwall" filter the data over the selected jitter filter bandwidth. In this example, we take 12 kHz to 20 MHz. (Sloped filters can be used too but not in these particular spreadsheets.)                                      
3. Over the jitter filter bandwidth, take the average of the current and previous spot phase noise measurements (W/Hz) multiplied by the difference in offset frequencies (Hz).                                           
4. Sum all these jitter power contributions.                                                                   
5. Double to account for DSB or Double Sideband and then convert to UI or Unit Intervals.                       
6. Finally, convert from UI to time domain units, typically fs.             

As will be seen, the worksheets that use this technique calculate values very close to what the phase noise instrument reports.

Measurement Steps

I have attached a spreadsheet, PhaseJitterCalcsClockTreeWithoutSpurs.xlsx, that records the results and compares them to lab measurements in the form of Agilent E5052B screen caps. There are 9 total measurements steps listed below in worksheet order as follows with additional details. The convention on the calculations worksheets is that input data are in yellow colored cells.

1. 50 MHz AWG Meas Data - Measure the AWG’s 50 MHz phase noise. This is the clock phase noise that will be input to the jitter attenuator. This worksheet imports the CSV file containing the measured phase noise for an Arbitrary Waveform Generator (AWG) operating at nominal 0 dBm and 50 MHz.
2. 50 MHz AWG Calcs - Calculate the AWG’s 50 MHz phase jitter based on the measured phase noise data using the procedure described earlier. In this context, the term “phase jitter” always refers to the RMS quantity based on integrating phase noise over the 12 kHz – 20 MHz offset frequency range. The calculated result is 7917 fs or 7.7917 ps which is noisy indeed. This result is accurate to 0.1% compared to the figure reported by the Agilent E5052B screen cap.
3. 50 MHz Sig Gen Meas Data - Measure the signal generator’s 50 MHz phase noise. This worksheet imports the CSV file containing the measured phase noise for a signal generator also operating at nominal 0 dBm and 50 MHz.

Note: This is the clock phase noise that will be input to the jitter attenuator (JA) to estimate its Jitter Generation (JGEN) at the output frequency. It was presumed, based on previous experience, that the sig gen’s performance would be better than the AWG’s and so would be a good candidate for this role. However, this had to be confirmed.

4. 50 MHz Sig Gen Calcs - Calculate the sig gen’s 50 MHz phase jitter. The calculated result is 785 fs, accurate to 0.02% compared to the figure reported by the Agilent E5052B.  
5. 50 MHz AWG vs Sig Gen Plots - Here I compare the AWG versus the signal generator phase noise, both operating at 50 MHz. Generally speaking the sig gen’s phase noise is close to, or better than, that of the AWG’s performance. The previous worksheets’ calculations showed that the signal generator was roughly an order of magnitude better than the AWG in terms of phase jitter. Given this confirmation, it is reasonable to select the sig gen to be the low noise source for the subsequently estimated JGEN.

Note: It may also be expedient to operate a jitter attenuator in Free Run mode and use its output clock phase noise as a stand-in for JGEN. It does not account for all noise sources but can often get within 5% for typical jitter bandwidths. However, it will not be as accurate at low offset frequencies.

6. JGEN 156.25 MHz Meas Data - This worksheet imports the CSV file containing the JA’s 156.25 MHz output clock measured phase noise where the low noise RF signal generator supplies the 50 MHz input clock. This data is used to the estimate the JA’s JGEN.
7. JGEN 156.25 MHz Calcs - Calculates the JA’s JGEN phase jitter. The calculated result is 83.5 fs, accurate to 0.03% compared to the figure reported by the Agilent E5052B.
8. Clock Tree Calcs - This is the clock tree calculations worksheet that puts everything together. Inspecting the columns going from left to right you can see the following operations:

• Scale the input clock phase noise with reference to the output clock carrier frequency.
• Apply jitter attenuation. Here we assume a low pass filter response with 40 dB /dec attenuation starting at the loop BW frequency 100 Hz. This is a simplified version, accurate well beyond the corner frequency. (The more accurate the JTF, the better the results.)
• Bring in the JGEN data from worksheet “7. JGEN 156.25 MHz Meas Calcs”.
• RSS the contributions from the JGEN phase noise plus the scaled jitter attenuated phase noise.
• Calculate the phase jitter for the JA’s output clock.
• Finally, calculate the phase jitter for the clock buffer’s output clock. There is no JTF for this buffer but there is a specified typical spec of 145 fs additive phase jitter, 12 kHz – 20 MHz.

Two different E5052B screen caps are copied on to this last calculations worksheet, one for the JA output clock, and one for the buffer output clock.

9. Clock Tree Plots - All of the relevant input, interim, and output curves for the jitter attenuator are plotted here.

Overall Results

So how did it go? It went reasonably well with a caveat at the end.

The JA output clock phase jitter was calculated to be 83.47 fs which was 0.9% lower than the measured 84.19 fs. The shape of the measured phase noise plot looks close to the expected plot except close in.

The buffer output clock phase noise was calculated to be 167.31 fs which was -5.2 % lower than measured, based on using the datasheet typical value for additive jitter, 12 kHz – 20 MHz. We don’t simply see +1 or +2 dB added everywhere to the JA output clock phase noise. Rather, the shape of the measured phase noise plot showed more phase noise at far offset frequencies, where the “floor” rose from about -162 to -152 dBc/Hz.

Bottom line: These results are good from a phase jitter point of view. However, it appears that a buffer JTF would be needed to better predict the end phase noise plot.

Conclusion

I hope you have enjoyed this Timing 101 article. This is the last post for 2018. Happy Holidays and Happy New Year to you all! I look forward to exploring more topics with you in 2019.

As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

Introduction

In this follow-up post, The Case of the Noisy Source Clock Tree Part 2, I will discuss in more detail exactly how to calculate the total jitter for a noisy source clock tree that includes a jitter attenuator. I will also provide a measurement and spreadsheet example.

Recap

In Part 1, I first discussed the low jitter source canonical clock tree, how to calculate the total jitter by Root Sum Square, and reviewed the terms jitter transfer, jitter generation, and additive jitter. I then moved on to the noisy source clock tree, the motivation for adding jitter attenuation, and introduced how to calculate its total jitter.

As I mentioned last time, following the clock signal from the source through the clock tree components to the sink or destination is best viewed as a system that processes phase noise. That is, if we know the phase noise characteristics of each clock tree component, we should be able to estimate the end clock phase noise and its phase jitter over a particular jitter bandwidth.

By best I mean that this approach is more universal and accurate. It can be applied to all types of clock trees, with or without noisy sources and jitter attenuators.

The Basic Idea

The general approach is illustrated below. Every clock tree can be regarded as a cascade of phase noise processing elements each of which, in the most general sense, can be modeled as the Root Sum Square or RSS of the Jitter Generation (JGEN) phase noise in contribution with the Jitter Transfer Function (JTF) applied to the scaled input clock phase noise.

Scaling is required so that the components contributing to the RSS are all at the same carrier frequency. The details will be made clearer in the example that follows.

The ith element above illustrates the general clock tree component model. All the contributions shown apply in the case of a jitter attenuator which also multiplies or divides the input clock. However, in practice, not all aspects of the general model apply, or are readily available, for every clock tree component:

1. The independent clock source such as an XO at Element “1”, the root of the clock tree, has no input clock so the JTF branch is zeroed out. It can be modeled simply as JGEN, i.e. the source’s output clock phase noise.
2. The typical clock generator has a wide bandwidth so the JTF contribution is negligible and it too is modeled simply as JGEN.
3. The clock buffer has no PLL so JGEN is not applicable. Unfortunately, a JTF is usually not available. We typically have to rely on additive jitter specified over a particular bandwidth or do further characterization.

A Practical Measurement Example

Consider the following simplified block diagram. I used an Arbitrary Waveform Generator or AWG as my noisy 50 MHz input clock source and followed it with an Si5345 evaluation board. The Si5345 does both jitter attenuation and clock multiplication as is the common practical case. I then followed the jitter attenuator (JA) with an Si53301 clock buffer evaluation board. The output clocks for both the jitter attenuator and clock buffer are 156.25 MHz.

No baluns or limiters were used. Just straightforward single-ended connections to and from test equipment and differential connections between the jitter attenuator and clock buffer. The unmeasured output clock polarity was terminated on the clock buffer EVB.

Calculating Phase Jitter

In the work that follows, we often want to calculate RMS phase jitter, i.e. integrated phase noise over a select frequency range, from a dataset of phase noise L(f) (dBc/Hz) versus offset frequency f (Hz). For the purpose of this exercise, we ignore spurs though they can certainly be included.

The general procedure is as follows.

1. Convert SSB phase noise data L(f) from dBc/Hz to W/Hz.                                                             
2. "Brickwall" filter the data over the selected jitter filter bandwidth. In this example, we take 12 kHz to 20 MHz. (Sloped filters can be used too but not in these particular spreadsheets.)                                      
3. Over the jitter filter bandwidth, take the average of the current and previous spot phase noise measurements (W/Hz) multiplied by the difference in offset frequencies (Hz).                                           
4. Sum all these jitter power contributions.                                                                   
5. Double to account for DSB or Double Sideband and then convert to UI or Unit Intervals.                       
6. Finally, convert from UI to time domain units, typically fs.             

As will be seen, the worksheets that use this technique calculate values very close to what the phase noise instrument reports.

Measurement Steps

I have attached a spreadsheet, PhaseJitterCalcsClockTreeWithoutSpurs.xlsx, that records the results and compares them to lab measurements in the form of Agilent E5052B screen caps. There are 9 total measurements steps listed below in worksheet order as follows with additional details. The convention on the calculations worksheets is that input data are in yellow colored cells.

1. 50 MHz AWG Meas Data - Measure the AWG’s 50 MHz phase noise. This is the clock phase noise that will be input to the jitter attenuator. This worksheet imports the CSV file containing the measured phase noise for an Arbitrary Waveform Generator (AWG) operating at nominal 0 dBm and 50 MHz.
2. 50 MHz AWG Calcs - Calculate the AWG’s 50 MHz phase jitter based on the measured phase noise data using the procedure described earlier. In this context, the term “phase jitter” always refers to the RMS quantity based on integrating phase noise over the 12 kHz – 20 MHz offset frequency range. The calculated result is 7917 fs or 7.7917 ps which is noisy indeed. This result is accurate to 0.1% compared to the figure reported by the Agilent E5052B screen cap.
3. 50 MHz Sig Gen Meas Data - Measure the signal generator’s 50 MHz phase noise. This worksheet imports the CSV file containing the measured phase noise for a signal generator also operating at nominal 0 dBm and 50 MHz.

Note: This is the clock phase noise that will be input to the jitter attenuator (JA) to estimate its Jitter Generation (JGEN) at the output frequency. It was presumed, based on previous experience, that the sig gen’s performance would be better than the AWG’s and so would be a good candidate for this role. However, this had to be confirmed.

1. 50 MHz Sig Gen Calcs - Calculate the sig gen’s 50 MHz phase jitter. The calculated result is 785 fs, accurate to 0.02% compared to the figure reported by the Agilent E5052B.  
2. 50 MHz AWG vs Sig Gen Plots - Here I compare the AWG versus the signal generator phase noise, both operating at 50 MHz. Generally speaking the sig gen’s phase noise is close to, or better than, that of the AWG’s performance. The previous worksheets’ calculations showed that the signal generator was roughly an order of magnitude better than the AWG in terms of phase jitter. Given this confirmation, it is reasonable to select the sig gen to be the low noise source for the subsequently estimated JGEN.

Note: It may also be expedient to operate a jitter attenuator in Free Run mode and use its output clock phase noise as a stand-in for JGEN. It does not account for all noise sources but can often get within 5% for typical jitter bandwidths. However, it will not be as accurate at low offset frequencies.

1. JGEN 156.25 MHz Meas Data - This worksheet imports the CSV file containing the JA’s 156.25 MHz output clock measured phase noise where the low noise RF signal generator supplies the 50 MHz input clock. This data is used to the estimate the JA’s JGEN.
2. JGEN 156.25 MHz Calcs - Calculates the JA’s JGEN phase jitter. The calculated result is 83.5 fs, accurate to 0.03% compared to the figure reported by the Agilent E5052B.
3. Clock Tree Calcs - This is the clock tree calculations worksheet that puts everything together. Inspecting the columns going from left to right you can see the following operations:

• Scale the input clock phase noise with reference to the output clock carrier frequency.
• Apply jitter attenuation. Here we assume a low pass filter response with 40 dB /dec attenuation starting at the loop BW frequency 100 Hz. This is a simplified version, accurate well beyond the corner frequency. (The more accurate the JTF, the better the results.)
• Bring in the JGEN data from worksheet “7. JGEN 156.25 MHz Meas Calcs”.
• RSS the contributions from the JGEN phase noise plus the scaled jitter attenuated phase noise.
• Calculate the phase jitter for the JA’s output clock.
• Finally, calculate the phase jitter for the clock buffer’s output clock. There is no JTF for this buffer but there is a specified typical spec of 145 fs additive phase jitter, 12 kHz – 20 MHz.

Two different E5052B screen caps are copied on to this last calculations worksheet, one for the JA output clock, and one for the buffer output clock.

1. Clock Tree Plots - All of the relevant input, interim, and output curves for the jitter attenuator are plotted here.

Overall Results

So how did it go? It went reasonably well with a caveat at the end.

The JA output clock phase jitter was calculated to be 83.47 fs which was 0.9% lower than the measured 84.19 fs. The shape of the measured phase noise plot looks close to the expected plot except close in.

The buffer output clock phase noise was calculated to be 167.31 fs which was -5.2 % lower than measured, based on using the datasheet typical value for additive jitter, 12 kHz – 20 MHz. We don’t simply see +1 or +2 dB added everywhere to the JA output clock phase noise. Rather, the shape of the measured phase noise plot showed more phase noise at far offset frequencies, where the “floor” rose from about -162 to -152 dBc/Hz.

Bottom line: These results are good from a phase jitter point of view. However, it appears that a buffer JTF would be needed to better predict the end phase noise plot.

Conclusion

I hope you have enjoyed this Timing 101 article. This is the last post for 2018. Happy Holidays and Happy New Year to you all! I look forward to exploring more topics with you in 2019.

As always, if you have topic suggestions, or there are questions you would like answered, appropriate for this blog, please send them to kevin.smith@silabs.com with the words Timing 101 in the subject line. I will give them consideration and see if I can fit them in. Thanks for reading. Keep calm and clock on.

Cheers,

Kevin

We have seen a support program bundled w/ CBPro flagged by some virus packages in the past. We have been able to get this white listed with the Virus vendors. The program was hex2boot.exe. This is a converted Python script to generate a hex file for certain supported devices.

Could you provide more detail on what Avira reported?