Can someone help me understand the definition of "HF RMS" Jitter as it pertains to the the PCIe Spec and the SILabs Clock Jitter Tool?
Reading Rev 5.0, Ver 0.9 01/07/21 of the PCIe Card Electromechanical Spec, Table 2-3 denotes 200fs of allowable Rj RMS jitter
I would like to understand the differences between the "HF RMS" and "LF RMS" values shown in the output of the SILabs Clock Jitter Tool (circled in the exert below).
Table 4-24 of the Rev 5.0, Ver 0.9 01/07/21 of the PCIe Card Electromechanical Spec states Rj is assessed 1.5MHz - 10MHz as low frequency and the upper limit is 1GHz. Does this mean that the SILabs clock jitter tool (or any other tool) assess a measured period trend and calculates jitter within two distinct frequency ranges, (a) Low Frequency between 1.5 and 10MHz and (b) 10MHz to 1GHz High Frequency?