We are designing a PCB using Si5345. On page 32 in "Si5345/44/42 Rev D Data Sheet Rev1.2", there is a description that "Ref clock rise time must be <200 ps."
Does "Ref clock" mean the input clock for IN0-3 pin or the external reference clock for XA/XB pin? If "Ref clock" means the input clock, we have to redesign the PCB.
The description that "Ref clock rise time must be <200 ps." on page 32 in "Si5345/44/42 Rev D Data Sheet Rev1.2" is for defining the test condition of Zero-Delay Mode Input-to-Output Delay. "Ref clock" here means IN0/1/2 since IN3/FB_IN is used as the input of external feedback at zero delay mode. If you are not using this mode, it may not cause a problem.
A general requirement for input clock is "Slew Rate". It should not be slower than 400V/us as stated on page 26 for specified jitter performance. Jitter performance could degrade if the minimum slew rate specification is not met.