Will SI53308 Dual clock buffer generate mixed clock outputs like -
25MHz LVCMOS input -CLKIN1
1 x 25MHz LVDS Output
4 x 25MHz LVCMOS outputs
24MHz LVCMOS input - CLKIN2
6 x 24MHz LVCMOS outputs
or the type of input clock decides the type of output clocks.
for example - if input clock is LVCMOS then output clock will also supports only LVCMOS format?
Please reply .
Thanks and Regards
Thanks for your question. The Si53308 is comprised of two output banks or 3 diff'l or 6 SE CMOS outputs each. Each bank can be pin configured for any output format (e.g. CMOS, LVDS, LVPECL, etc.) however, you cannot mix different output formats within a given Bank.
So, in your example, if CLKIN1 = 25MHz LVCMOS, then BankA can have up to 3, 25MHz (or 12.5MHz, or 6.25MHz) LVDS outputs or up to 6 LVCMOS outputs; CLKIN2 = 24MHz LVCMOS, then BankB can have up to 6, 24MHz (or 12MHz, or 6MHz) LVCMOS outputs (or 3, LVDS outputs).
Hope this helps!