What crystals are used in the different XO and VCXO product families?
There are currently 3 different crystals used in Silicon Labs' XO and VCXO product families as listed below: 1. 114.285 MHz 3rd overtone mode - Si53x/55x/57x 2. 39.17 MHz fundamental mode - Si59x 3. 31.98 MHz fundamental mode - Si51x These are all AT-cut crystals intended to operate over -40C to +85C ambient temperature. The crystal selection for a particular device family is based on a cost versus performance trade-off.
What is the origin and relevance of the 12 kHz to 20 kHz jitter bandwidth often specified for clock and oscillator products?
Oftentimes, clock and oscillator products are specified for RMS phase jitter, calculated by integrating phase noise, over the 12 kHz - 20 MHz bandwidth. This particular specification originated as a jitter generation requirement from SONET (Synchronous Optical Network) and related telecom standards for Optical Carrier network OC-48. (OC-48 networks transmit data up to 2488.32 Mbps using 155.52 MHz reference clocks.)
Industry adopted this measurement as a handy way to compare any clock or oscillator, even those not intended for SONET type applications. It is still generally useful for this purpose. However, non-SONET applications such as frequency synthesis, other serial I/O standards, or ADC reference clocks may want to consider different or wider jitter bandwidths.
Finally, it is not always the case that the 12 kHz to 20 MHz jitter bandwidth can be measured, or even makes sense, if the carrier or clock frequency is too low. Practical systems have digital sampling, or equivalent mixing and filtering limitations, which require the minimim carrier frequency to be roughly 2X or more than the max offset frequency. Even if this was not the case, you could not measure a clock with a carrier frequency < 20 MHz directly, with offsets out to 20 MHz, without violating the double sideband phase noise assumption.
How can one verify the presence of the Si530's OE internal pull-up resistor?
The Si530 crystal oscillator includes a 17 kOhm internal resistor from the OE (Output Enable) pin to VDD. However, you can't simply pick up a sample Si530 and measure the resistance between the OE and VDD pins. This is because the device must have power applied. The device's factory configuration is enabled on power-up.
The presence of the Si530's OE internal pull-up resistor can best be verified based on OE polarity. For example, if the P/N's OE polarity is OE active high, the device will yield an output even if OE is unconnected. Only driving OE LOW will disable the part's output clock.
Why do lower frequency oscillators often draw slightly more current than higher frequency oscillators within the same device family?
Depending on the specific device family, lower frequency oscillators can draw slightly more current than higher frequency oscillators. This is because, assuming the output clock is frequency synthesized, lower frequency outputs require more internal frequency division.
What IBIS models can be used for the Si59x oscillators?
The Si59x series of crystal oscillators (Si590, Si591, Si595, Si597, Si598, and Si599) use the same I/O buffers as the Si53x, Si55x, and Si57x devices. The most significant difference between these devices is the internal crystal. The Si53x, Si55x, and Si57x devices all use a 114.285 MHz 3rd overtone crystal. By contrast, the Si59x series uses a relatively cheaper fundamental mode 39.17 MHz crystal.
Since the I/O buffers are the same, IBIS simulation can be done using Si53x, Si55x, and Si57x IBIS file counterparts. For example, an Si590 with output format 3.3V LVPECL can be simulated using the Si530 3.3V LVPECL IBIS file, available online as si530_3v3_lvpecl.ibs.
What is a convenient method to both terminate the transmission line and attenuate the signal at a differential receiver input?
A convenient method to both terminate the transmission line and attenuate the signal at a differential receiver input is to employ a differential attenuating termination. All this means is that the termination at the end of the transmission line uses voltage division to attenuate the signal seen by the differential receiver.
For an example, please see the attached figure, Example_Differential_Attenuating_Termination.png. A nominal 100 Ohm differential termination has been implemented using 3 each 33 Ohm resistors. The termination seen by the transmission line is 99 Ohms differential, yet the the voltage signal to the receiver has been greatly attenuated, in this example, down to 1/3 of its value prior to the termination.