Please see the attached document for Frequently Asked Questions (FAQ) and their answers regarding the Si5348 Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks.

 

The topics from the Table of Contents are listed below.

 

PCB Design and Layout Guidance            

Where can I find the IBIS model for the Si5348?

Where can I find the Si5348 schematic footprints and symbols? 

Where can I find the package and PCB footprint information?    

Do you have layout recommendations I should follow? 

Do you have a list of recommended crystals?     

I don’t want to use a crystal with the Si5348. Can I use an XO or TCXO as the XA/XB reference instead?  And if so, how do I interface an external oscillator to the device?

Why do I need both an OCXO or TCXO and a crystal?      

What are the recommended bandwidths and why?       

Are there any power supply filtering requirements or recommendations?           

Is there any specific power supply sequencing requirement?     

What serial interfaces does the device support?              

How do I properly terminate input and output clocks?   

Where can I get detailed material composition information on these devices?   

Is the part RoHS compliant?       

What is the Moisture Sensitivity Level (MSL) rating for the Si5348?          

What is the recommend profile for solder reflow process?          

Frequency Plan and Clock Design Decisions       

What development software/tools do you have available to use with the Si5348?            

Where can I find ClockBuilder Pro Documentation?         

How do I select proper jitter attenuation bandwidth?    

Is there a recommended full device programming procedure?  

Do I need to update any divider if I write Soft_Rst_All? 

What input buffer should I select?          

How can I do DCO mode?            

Do I have to provide an input clock in DCO mode?           

How do I calculate a frequency plan without CBPro?       

Does the Si5348 support Zero-Delay Buffer operation? 

Can I change an output frequency on the fly?    

Does the Si5348 support 1Hz input clocks?           

Is there support for output frequencies down to 1Hz?  

Does the device support automatic input clock selection and does it support hitless switching? 

Can I do automatic switching on IN3 and IN4?    

Is LOS supported on the CMOS IN3 and IN4?      

Is OOF supported on the CMOS IN3 and IN4?    

Can I use IN3 or IN4 on DSPLL C or A?     

Can the Si5348 be used as a Grandmaster, Boundary Clock or Slave Clock?           

How do I know the output drift MTIE and TDEV

When should frequency ramp be enabled?        

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