AC Coupling, Capacitive Reactance and Clock Signals
Clock signals are usually AC coupled because AC coupling eliminates needing to consider the DC common mode voltages of the driver and receiver. The vast majority of clock signals have a constant 50% duty cycle, which makes AC coupling easy and straightforward. However, when selecting a value for the AC coupling cap, the frequency of the clock and the impedance being driven need to be taken into consideration.
For a cap value of C, the capacitive reactance Cx at a clock frequency of F is 1 / (2 * pi * F * C). For a 0.1 uF cap, the capacitve reactance at 10 MHz is
1 / (2 * pi * 10 MHz * 0.1 uF) = ~0.16 ohms
Looking at the attached termination schematic, Cx should be small compared to the termination resistance and the transmission line impedance of 50 ohms. A reasonable “rule of thumb” is to be sure that Cx < 5 ohms, which is 10% of 50 ohms.
If F were 1 MHz, Cx for a 0.1 uF cap would be 1.6 ohms, which would be OK.
However, if F were 100 kHz Cx would be 16 ohms, which is above 5 ohms and will be a problem unless the value of C is increased. The specific problem is that the input clock will be attenuated by the ratio of Cx to 100 ohms, which will reduce the pk-pk swing of the input clock.
A note of caution: The above discussion refers only to the fundamental of the clock input. Since the clock input is assumed to be a square wave, there will be considerable spectral content at the odd harmonics. Because these harmonics are all higher in frequency, they will be attenuated more than the fundamental. With severely attenuated odd harmonics, the rise/fall time of the clock signal will be significantly reduced, which will cause an increase in jitter at the input of the receiver. Unless the receiver provides jitter attenuation, the AC coupling cap should have an even lower Cx value at the frequency of operation. It is for this reason that the clock outputs are more sensitive to high Cx values than the clock inputs of a jitter attenuator.