1.1 Where can I get detailed material composition information on these devices?
1.2 Is the part RoHS compliant?
1.3 What is the Moisture Sensitivity Level (MSL) rating for the Si5388/89?
1.4 What is the recommend profile for solder reflow process?
2.1 Where can I find the IBIS model for the Si5388/89?
2.2 Do you have a list of recommended crystals?
2.3 I don’t want to use a crystal with the Si5388/89. Can I use an XO or TCXO as the XA/XB reference instead? And if so, how do I interface an external oscillator to the device?
3.1 What IEEE 1588 Profiles are included in the current solution
3.2 Does this solution meet ITU G.8262 for SyncE and G.8262.1 for Enhanced SyncE?
4.1 How do I get a complete evaluation system?
4.2 What software is available for the evaluation system
4.3 Why is a Xilinx FPGA evaluation board required?
4.4 My Xilinx Carrier Card (ZCU102 or ZCU111) is not passing self-test – what could be wrong?
5.1 What system architectures does this solution support?
5.2 What clock configurations does the Si5388/89 solution support?
6.1 Is a compliance report available?
6.2 What type of reference clocks can you provide G.8273.2 compliance reports for?
6.3 What class do you support for ITU-T G.8273.2 compliance?
7.1 What serial interfaces does the device support?
7.2 Does the Si5388/89 support Zero-Delay Mode?
7.3 Can the application FW and/or device configuration (i.e. Frequency Plan) be modified by the user independently and how is this done?
7.4 Are there any restrictions on which DSPLL can be used for IEEE 1588 synchronization?
8.1 What is the pull in range of the PTP loop and SyncE PLL?
8.2 Using the BMCA algorithm how long does it take to switch to a new master and what is the measurement criterion?
8.3 The cTE between my Master and Slave/Boundary Clock is very large - what could cause this?
8.4 How many slaves can this solution support and what are the dependent parameters?
8.5 What is DCO mode and how can it be exercised?
8.6 What OCXO vendor and part number do you recommend?
8.7 What type of reference oscillator should I use?
9.1 What operating system does the Si5388/89 solution run under?
9.2 What Linux kernel version does the SW use?
9.3 What modules does the SW in the Si5389 solution support?
9.4 What format is the SW delivered?
10.1 Can Silicon Labs provide source verilog files?
10.2 What Xilinx FPGA’s can Silicon Labs’ SW be ported to?