I'm using custom PCB board with EZR32HG220R67 together with EZR32HG development kit and Simplicity Studio to measure power consumption. According to EZR32HG datasheet power consumption should be equal to 22 mA when transmitting at +13dBm.
However, I performed some tests and current consumption is way too high. For example, when PA_PWR_LVL is set to 127(which I believe sets output power to +13dBm), I get ~44 mA(see screenshots attached).
Do you have any idea why there is such a huge difference between what is specified in datasheet and my measurements? I'm also attaching radio configuration file, which should help you understand my setup.
As a starting point the AN627 matching guide can be a good reference here. Please see "Table 15. Output Power and Current Consumption vs. Frequency" where you can see the proper power setting (DDAC) for a given output power level. The 127 (7Fh) is definitely not the proper setting, and your actual power output is likely higher.
Besides the power setting, the PA mode, RF schematic (including component types, especially for inductors) and RF layout also affect the power efficiency, so it would make sense to get them reviewed as well.
Thanks for reply. I've followed the document you mentioned and changed CLK_DUTY to setting number 3(TXP: 25%, TXN: 0). After that the measured output current seems more reasonable(27,34 mA for +13 dBm and 19,98 mA for +10 dBm).
One of the drawbacks I've noticed is slight drop in maximum range - is it expected? Are there any other disadvantages of changing CLK_DUTY?
Just want to clarify one more thing. When using Class E matching, OB field of the PA_BIAS_CLKDUTY register is ignored, right?
Right, for Class-E matches using R60/67 radios the CLK_DUTY needs to be 25% for the possible best power efficiency. 50% of CLK_DUTY at the same DDAC power setting would yield higher TX power (at low power settings where enough headroom is ensured it would theoretically and practically 3dB increase in TXP), so the achievable RF range is definitely affected by this setting too.
The 25% of CLK_DUTY slightly increases the 2nd harmonic (switching signal with 50% duty cycle mostly generates odd harmonics only, but a non-symmetric - e.g. 25% - switching signal will even produce even and odd harmonics too), as a disadvantage, so proper harmonic filtering is important in the RF-FE match.
In Class-E mode, the OB field of the PA_BIAS_CLKDUTY can be ignored, as a don't care register setting.