How can I design a dipole antenna with good harmonic suppression?
Designing a printed dipole antenna directly to differential chip RF outputs makes always sense. This is mainly driven by cost considerations since the balun function can be eliminated from the RF front-end in this way. On the other hand, the ground plane (which size is critical in many cases) does not affect the performance of the differential-type antennas.
But, the filtering becomes more challenging on dipole antennas and a result of this high radiated harmonic levels might be observed. To fix this or to achieve better harmonic suppression the following filtering and matching method is suggested.
- Dipole antenna can be matched by its total length and a parallel capacitor (C_par) between its two ports
- The required parallel capacitance between the dipole ports (C_par) can be divided into two parts: C_odd and C_even
- One capacitor with C_odd value is suggested to be placed between the dipole ports
- Two capacitors with C_even values are suggested to be placed from each dipole ports to GND
- The C_odd capacitor can be tuned to become a good filter at one of the odd harmonics
- The C_even capacitors can be tuned to become good filters at one of the even harmonics
- Meanwhile, the total parallel capacitance (C_par) required between the dipole ports should be C_par = C_odd + [C_even*C_even / (C_even+C_even)] = C_odd + C_even/2. Since, the two C_even capacitors are in series connection with each other (through the common GND connection) and they are in parallel connection with C_odd.
Here is an example printed dipole antenna design for 2.4 GHz.
- 22nH is an RF choke inductor (shows high impedance at the fundamental)
- 3.3nH is a parallel inductor between the RF output pins to match the RF chip output
- 1.2pF is the C_odd capacitor
- 2x2.4pF are the C_even capacitors
- SMD1206 12pF is just a large capacitor between the two GND islands what is a short circuit at the fundamental frequency. This is necessary to ensure good common GND connection for the C_even capacitors, since this example uses only one layer.
I see high radiated harmonics with a Si4010 keyfob using loop antenna. How can I reduce the unwanted harmonics?
To get better suppression on the radiated harmonics the followings are suggested to be tried.
An example antenna design is shown in the application note AN369.
What is the correct connection of pin 18 of the Si446x RF chips? GND or NC?
The recommended connection depends on the used crystal oscillator type.
- When using an XTAL, leave floating per our reference design schematic.
- When using a TCXO, connect to the TCXO’s GND what should be separated from the board’s reference ground plane per our reference design.
What is the correct connection of pin 5 of the Si446x RF chips? GND or NC?
It is recommended to connect this pin to GND per our reference design schematic. Not connected internally to any circuitry.
The reason for connecting this pin to GND is to achieve good RF grounding effect through that pin. In this way a good RF ground reference can be ensured for the VDD filtering capacitors by connecting the chip exposed pad's ground to the filtering capacitors' ground pads.