May I apply external DC voltage to the RXp/RXn LNA input pins on Si443x and Si446x chips? Or do I need to use external AC coupling to these pins?
Silicon Labs recommends the use of external AC coupling to the RXp/RXn LNA input pins on Si443x and Si446x devices.
Internally, the RXp/RXn input lines contain AC coupling capacitors before reaching the input of the LNA amplifier. However, there are also several switches that are located after the input pins but *BEFORE* these AC coupling capacitors. (These switches are used in Direct Tie matching applications; please refer to AN436 and AN627 Application Notes for further information on this functionality.) The performance of these switches is optimized when no external DC bias voltage is applied, i.e., when external AC coupling is used.
Do Si443x and Si446x RF Evaluation Boards (available for purchase on Silicon Labs website) carry FCC certification?
While these RF test boards are very useful for demonstration, evaluation, and development purposes, virtually all customers will lay out their own printed circuit board for their own wireless application. Silicon Labs assumes that no customer will use our RF Evaluation Board 'as is', without at least some modification. As a modification to the RF Evaluation Board or module would invalidate any existing certification, there is little point in certifying these boards.
However, customers desire assurance that wireless chips from Silicon Labs are CAPABLE of passing FCC certification. The FCC requirement on radiated spurious emissions (e.g., harmonics) is generally the most difficult element of obtaining certification. As a result, we have taken a variety of representative RF Evaluation Boards (of various frequencies) to an approved EMC test facility and have verified the ability to successfully pass FCC Part 15.205 / Part 15.209 radiated spurious emissions.
For our lower-power transmitters / transceivers (e.g., Si4431 or Si4460/67 at +13 dBm), compliance is quite readily achievable. For our higher power transmitters / transceivers (e.g., Si4432 or Si4463/68 at +20 dBm), compliance is influenced (and possibly limited) by board layout and shielding techniques. It may be necessary for a customer to use a combination of good RF layout techniques, shielding, and multiple-layer boards (i.e., 4-layer board with internal GND plane for better grounding).
In the Si4010 Calculator Spreadsheet how should the “Manual Impedance Entry” option be used in case of a 50 ohm monopole antenna?
The impedance can be specified in the Antenna Real(Z) and Antenna Img(Z) fields after choosing the “Yes” option of the Manual Impedance Entry. This is not the impedance of an antenna which can be connected to the single ended output of a 50Ohm matching network of the Si4010. Instead it is the impedance of an antenna which can be connected between the TXP and TXM pins of the Si4010 (i.e. the input impedance of a differential antenna).
For example, in case of the 4010-DKPB868 board a 50Ohm antenna can be connected to the SMA connector and the matching network of the Si4010 transforms the 50Ohm to the required load impedance.
So the Manual Impedance Entry should be 'Yes' only if a differential antenna with known input impedance connected directly to the TXP and TXM pins otherwise it should be left on 'No' and in that case the optimum load impedance is used for the calculations (and displayed in the Antenna Target fields). 'No' should be used for 50 ohm monopole antennas as well.
Does the output power of the Si4010 PA vary with VDD?
It may, depending upon the settings of the PA.
The PA in the Si4010 chip is essentially a pair of differential programmable switched current sources. The output power is given by Pout = Ibias^2*Rload, and so is not directly dependent upon VDD.
However, this assumes that there is sufficient voltage headroom on the output devices for them to remain functional as current sources over the range of variation of VDD. With larger values of PA bias current 'Ibias' or with large values of antenna load resistance 'Rload', the voltage swing on the output devices may reach a value where the current sources start to drop out of their linear region. At this point, clipping of the output voltage waveform may occur, and the output power may begin to drop as VDD is reduced.
A typical selection of antenna load resistance that provides maximum output power without voltage clipping (for the maximum possible value of Ibias = approx 10 mA) is about Rload = 500 to 600 ohms. For these conditions, the output power will remain relatively constant as the VDD supply voltage is reduced down to about VDD = 2.2V; below this some reduction in output power may occur.
If flat output power is desired across the full range of VDD = 1.8 to 3.6V, it will be necessary to re-configure the PA to target a slightly lower nominal value of output power (i.e., lower peak output voltage swing), thus allowing a greater reduction in VDD before voltage clipping occurs.
Is it possible to design a multi-band loop antenna for Si4010?
Theoretically this is possible. However this gets more complicated as the lowest/highest frequency band’s difference keeps increasing. The best situation is when the two frequency bands are close to each other. Let’s say: 434 and 470MHz. Here the bandwidth is 36MHz which could be compensated by a well designed antenna, using the Si4010’s internal PA capacitance bank to compensate the frequency shift. In this case the capacitance bank will tune to its lowest value in the 434 MHz band and into its highest value in the 470MHz band. However, to set this impedance range a proper EM simulated antenna is necessary.
On the other hand if someone is looking for a (let’s say) 434/868MHz antenna, the situation is more complicated. There are several ways:
1. Designing the antenna to work well in the middle of those two bands. This is a compromise, so the side effects will be: lower fundamental power radiation and increased harmonic radiation. To eliminate these issues the TX power level should be decreased to pass ETSI/FCC regulations.
2. Designing a dual band antenna by using different layout patterns in different frequency ranges. In this case 0 ohm resistors should select the appropriate antenna layout elements, which has to be populated correctly during PCB manufacturing. This would be a nice solution with a single PCB layout and different BOM to both EU and US markets, with acceptable output power.
3. Designing a dual band antenna which utilizes different layout patterns in the different frequency ranges and connected directly with each other, while one layout pattern shows optimal termination for one band and high-impedance at the other frequency band, and the other layout pattern does the opposite. This requires careful design and EM simulations.