I've a question about GLOBAL_CONFIG register. In rev. B1 bit6 of this register is set to 0, in rev. C2 bit6 must be set to 1. In API guide is written: "Description: This is a reserved field that should always be written to 1. Note that the recommended setting does not match the current default (wake-up) value of this bit."
Is this a problem?
On B1B it may cause a problem; if this bit was set to 0 and the RSSI threshold interrupt fired, the chip could potentially lock up. On C2A, however, it does not really matter whether you set it high or low. Nevertheless, we still document it as a mandatory high, just to be consistent.