Answer

Here are some layout hints that are suggested to follow for nay kind of RF board designs.

- use as large and continuous GND metallization as possible on all layers

- use plenty of GND stitching vias on the enrite PCB, especially at the board and GND metal pouring edges.

- do not route traces at the board edges

- place the high frequency crystal close to the RF chip

- connect the crystal case to GND

- use short VDD traces

- if possible, shield the VDD traces by ground metallization (with vias) from both sides

- put the matching network as close to the RF chip as possible to minimize the parasitics in the RF-FE match and avoid de-tuning

- make sure that there are many GND vias on the RF chip's exposed pad

- further recommendations are in the layout-related application notes.