At which pins should I apply DC feed for the sub-GHz and 2.4GHz PA of EFR32 Series 1 devices?
The EFR32 Series 1 2.4GHz PA has a dedicated power supply input pin (PAVDD), the 2.4GHz PA should be powered through this pin:
On the sub-GHz side, the PA does not have a dedicated power supply input pin, therefore the sub-GHz PA needs to be powered through the TX output pins: SUBGRF_OP and SUBGRF_ON. Depending on the matching network type and the sub-GHz frequency band, different power supply schemes are needed for the sub-GHz PA:
For high frequency bands (>500MHz) the recommended ceramic balun type is 0900BL15C050 from Johanson Technology. This balun has a dedicated BIAS input pin, which is in connection with BAL1 and BAL2 pins of the balun, therefore the DC bias will be present on the TX output pins supplying the sub-GHz PA.
An additional VDD filtering capacitor (C10) is required at the BIAS pin of the balun with appropriate value (see the EFR32 Series 1 Reference designs for the proper component values).
For low frequency bands (<500MHz) the recommended ceramic balun type is ATB2012-50011 from TDK Corporation. This balun has no dedicated BIAS input pin, which means that the PA power supply should be connected to the TX output pins on the other side of the ceramic balun. In order to avoid the PA supply circuit loading the PA matching network, the PA DC feed should be connected to the TX pins through choke inductors (L4 and L5) with appropriate values so that the inductors show high impedance at the frequency of operation.
An additional VDD filtering capacitor (C14) is required at the biasing point prior to the choke inductors (L4 and L5) with appropriate value (see the EFR32 Series 1 Reference designs for the proper component values).
In the full discrete match, the ceramic balun and the TX matching network is replaced by a 4-element discrete balun. The discrete balun contains a shunt inductor (L1), which can be separated into 2 halves, and the PA DC feed can be connected to the common point of these inductors (L1-1 and L1-2). Also, a capacitor for improved 2nd harmonic suppression (CH) is connected at this point.
In order to avoid the PA supply circuit loading the PA matching network, a choke inductor is necessary (LDC).
For further details on the full discrete matching solution, see AN1180: EFR32 Series 1 sub-GHz Discrete Matching Solutions.
EFR32 Series 1 IPDs are available for 434MHz and 868MHz frequency bands, see additional details in AN1081: Integrated Passive Devices for EFR32 Series 1 Sub-GHz RF Matching.
All 4 IPD types listed in AN1081 have dedicated VDD pins, which are in connection with the TXP and TXN pins of these IPDs, therefore the DC bias will be present on the TX output pins supplying the sub-GHz PA.
Note: When PAVDD (2.4GHz PA) = VBIAS (sub-GHz PA), limiting supply voltage of 2.4GHz PA to transmit at lower power will also limit the supply voltage at sub-GHz. Hence if different max TX power levels are expected from 2.4GHz and sub-GHz PA, then PAVDD and VBIAS net should be supplied separately with appropriate power supply voltages.