How should I route the traces on more-layer RF designs for optimal performance?
Answer
In order to achieve the possible best RF radiated performance the followings are suggested for more-layer RF board designs:
- Top Layer: Components and short traces. Top layer should use as large and continuous GND plane metallization as possible (with many stitching GND vias) on the entire PCB.
- 1st inner layer: GND plane and traces if necessary. The most important rule is to keep the GND pour metallization unbroken beneath the RF areas (between the antenna, matching network and RF chip). Traces can be routed under the non-RF areas and use GND pour where possible.
- 2nd, 3rd... inner layers: Traces. VDD and all other traces are suggested to be routed on these layers. Use GND pour where possible.
- Bottom Layer: GND plane. Use as large and continuous GND plane as possible. Do not route traces on this layer, just if it is necessary, e.g. short connection traces to connectors.
- Generic for each layer: Try to avoid routing traces along or close to the board edges. It is recommended to place ground stitching vias with GND pour along the PCB edges.
What are the general layout suggestions when designing the RF section of a PCB?
Answer
Here are some layout hints that are suggested to follow for any kind of RF board designs.
- Use as large and continuous GND metallization as possible on all layers.
- Use plenty of GND stitching vias on the entire PCB, especially at the board and GND metal pouring edges.
- Do not route traces at or close to the board edges.
- Place the high frequency crystal or TCXO close to the RF chip.
- Connect the crystal case to GND.
- Use short VDD traces.
- If possible, shield the VDD traces by ground metallization (with vias) from both sides.
- Put the matching network as close to the RF chip as possible to minimize the parasitics in the RF-FE match and avoid de-tuning.
- Make sure that there are many GND vias on the RF chip's exposed pad.
- If the design uses more than 2 layers it is always recommended to put the VDD line and as many digital traces as possible in an inner layer and use as large and continuous solid ground planes for the top and bottom layers as possible. In this way the top and bottom layers can act like natural shields and the risk of the unwanted harmonic and spur radiation issues can be minimized.
- It is also important to keep the ground plane area under the RF chip and matching network unbroken on the first inner layer.
- Minimize the distance between the neighboring matching components. Move the matching network as close to the RFIC as possible.
- Nearby inductors should be perpendicular to each other in order to avoid the couplings between them.
- Have at least 0.5mm separation between the traces/pads and GND top metal in the RF matching network.
- Place the RF output, antenna far away from any digital lines connected to the RFIC in order to avoid the possibility of latch-up issues (especially in high output power cases). Also, place the antenna far away from any switching, e.g. DCDC, circuitry.
- Have an option for shielding can above the matching/RFIC/XTAL area.
- Always try to follow as much as possible our reference designs' RF layout routing.
- More info can be found in the RF layout guides: AN629/685/791/928.
How to choose a suitable crystal for narrowband application to our Si4x6x/Si4x55 ISM band radios?
Answer
For low DR (narrowband) applications a TCXO is recommended. Calibrating an XO is time consuming at manufacturing and implementing a temperature compensation loop adds complexity into the system. Moreover at very low data rate (< 1.2 kbps; i.e. very narrowband) applications a TCXO is not only recommended but mandatory as its frequency stability is superior to an XO’s. This means that there is much less slow frequency drift on TCXOs than on XOs. At very narrowband applications where the packets tend to be long in time with an XO it may happen that the slow drift on the XO makes the receive detuned from the incoming signal.
How do I know what receive bandwidth has been configured on the Wireless Gecko (EFR32)?
Answer
The selected receive bandwidth in the EFR32 radio configurator (also referred to as IF bandwidth or channel bandwidth) depends on many input parameters.
Primarily the bandwidth is derived from the modulation format and the XO accuracy parameters at the Tx and Rx sides.
There is also an option to bypass the calculation and set the bandwidth explicitly in the advanced section.
If this latter option is not used it is a rather useful information to know what the bandwidth has been set to. You can extract this information from a log file that gets updated every time generation is run. At the preview section select the efr32_configurator_log.txt file that in turn will appear in the window below. Somewhere in the log file you will find the bandwidth the receiver has been configured to (as well as the IF frequency that is also an important piece of information especially when image rejection is to be tested.)
Proprietary Knowledge Base
Recommended routing technique for more-layer RF designs
Question
How should I route the traces on more-layer RF designs for optimal performance?
Answer
In order to achieve the possible best RF radiated performance the followings are suggested for more-layer RF board designs:
- Top Layer: Components and short traces. Top layer should use as large and continuous GND plane metallization as possible (with many stitching GND vias) on the entire PCB.
- 1st inner layer: GND plane and traces if necessary. The most important rule is to keep the GND pour metallization unbroken beneath the RF areas (between the antenna, matching network and RF chip). Traces can be routed under the non-RF areas and use GND pour where possible.
- 2nd, 3rd... inner layers: Traces. VDD and all other traces are suggested to be routed on these layers. Use GND pour where possible.
- Bottom Layer: GND plane. Use as large and continuous GND plane as possible. Do not route traces on this layer, just if it is necessary, e.g. short connection traces to connectors.
- Generic for each layer: Try to avoid routing traces along or close to the board edges. It is recommended to place ground stitching vias with GND pour along the PCB edges.
General RF Layout Routing Suggestions
Question
What are the general layout suggestions when designing the RF section of a PCB?
Answer
Here are some layout hints that are suggested to follow for any kind of RF board designs.
- Use as large and continuous GND metallization as possible on all layers.
- Use plenty of GND stitching vias on the entire PCB, especially at the board and GND metal pouring edges.
- Do not route traces at or close to the board edges.
- Place the high frequency crystal or TCXO close to the RF chip.
- Connect the crystal case to GND.
- Use short VDD traces.
- If possible, shield the VDD traces by ground metallization (with vias) from both sides.
- Put the matching network as close to the RF chip as possible to minimize the parasitics in the RF-FE match and avoid de-tuning.
- Make sure that there are many GND vias on the RF chip's exposed pad.
- If the design uses more than 2 layers it is always recommended to put the VDD line and as many digital traces as possible in an inner layer and use as large and continuous solid ground planes for the top and bottom layers as possible. In this way the top and bottom layers can act like natural shields and the risk of the unwanted harmonic and spur radiation issues can be minimized.
- It is also important to keep the ground plane area under the RF chip and matching network unbroken on the first inner layer.
- Minimize the distance between the neighboring matching components. Move the matching network as close to the RFIC as possible.
- Nearby inductors should be perpendicular to each other in order to avoid the couplings between them.
- Have at least 0.5mm separation between the traces/pads and GND top metal in the RF matching network.
- Place the RF output, antenna far away from any digital lines connected to the RFIC in order to avoid the possibility of latch-up issues (especially in high output power cases). Also, place the antenna far away from any switching, e.g. DCDC, circuitry.
- Have an option for shielding can above the matching/RFIC/XTAL area.
- Always try to follow as much as possible our reference designs' RF layout routing.
- More info can be found in the RF layout guides: AN629/685/791/928.
Crystal selection for narrowband application
Wireless Gecko (EFR32) Receive Bandwidth