The crystal or TCXO reference spur is located +/- XO frequency (typ. 38.4 MHz for EFR32 Series 1-based designs) from the RF carrier frequency. This KBA is focusing on the possible HW modifications that can be suggested to enhance the suppression of these XO reference spurs around the carrier frequency. Also, the KBA is based on the measurement results of EFR32 Series 1-based radio boards at the 868/915 MHz frequency bands.
An evident approach could be to apply a high-Q band-pass filter, e.g. SAW filter, in the RF path to filter out the XO reference spurs. This will ensure very low level of spurs in a reliable way, but on the other it will also increase the insertion loss at the fundamental frequency while it is not a desirable solution for cost sensitive applications.
The XO coupling is basically occurred through two main domains within the part: VCO and PA. These blocks are supplied through RFVDD and PAVDD and thus forming two coupling paths. The power supplies can be modulated either by VDD and/or GND. Leakage current paths outside the chip depend on board design through impedance at HFXO frequency between supply domains.
So, a filtering scheme focused for the XO frequency on both RFVDD and PAVDD nets can help suppress these spurs effectively. The table below shows some measurement data with different RFVDD and PAVDD filtering configurations, captured on BRD4164A Rev A02 radio board at 915 MHz / +20 dBm.
Fund power in dBm
XO spur at -38.4MHz
XO spur at +38.4MHz
subG PAVDD
RFVDD
dBm
dBc
dBm
dBc
19,48
-57,9
-77,4
-58,5
-78,0
ferrite + 1nF
ferrite + 1nF
19,51
-57,6
-77,1
-58,3
-77,8
ferrite + 1nF + 220pF
ferrite + 1nF
19,53
-57,7
-77,2
-58,3
-77,8
1nF + 220pF
ferrite + 1nF
19,57
-63,8
-83,4
-57,3
-76,9
ferrite + 56pF
1nF
19,6
-61,8
-81,4
-56,6
-76,2
56pF
1nF
19,57
-61,6
-81,2
-56,6
-76,2
56pF
56pF
19,49
-61,7
-81,2
-56,7
-76,2
1nF
56pF
19,46
-62,3
-81,8
-56,9
-76,4
ferrite + 1nF
56pF
19,45
-52,4
-71,9
-63,2
-82,7
ferrite + 1nF *
ferrite + 56pF *
19,48
-60,8
-80,3
-57,2
-76,7
ferrite + 1nF
ferrite + 56pF + 47nF
19,48
-60,9
-80,4
-57,2
-76,7
1nF
56pF + 47nF
19,5
-60,8
-80,3
-57
-76,5
47nF
56pF + 47nF
* Note: close to the original BOM of reference radio boards.
Some good performer configurations in terms of spur suppression are highlighted in yellow above.
The RFVDD is filtered at the RFVDD pin, while the subG PAVDD is filtered at the PAVDD pin and at the BIAS pin of the external ceramic balun.
Some conclusions:
The spur suppression of the radio board with the original filtering configuration can be improved.
Low-side XO spur is high when RFVDD has series ferrite but without nF-ranged capacitor. If RFVDD has no ferrite then a capacitor (either pF- or nF-ranged) is enough to have low-level low-side XO spur. Low-side spur is high on radio boards because RFVDD has a ferrite but with pF-ranged capacitors only.
The high-side XO spur is unfortunately pretty good only when the RFVDD has ferrite without nF-ranged capacitor.
Overall performance is better if the focus is on the low-side XO spur suppression, since that is more critical with the radio board's original BOM.
In absolute level, however, the spurs are well under -51dBm in any configuration shown above.
Further layout considerations:
If the RFVDD and PAVDD pins are supplied from the same power net, then consider adding a series filtering placeholder mounted between them.
Maximize the isolation between the crystal/TCXO, XO traces and RFVDD trace on the board layout. Ensure having a GND strip with stitching vias between the XO and RFVDD traces.
This is a short summary and notes about shutdown state and sleep timer:
There is no Si4010 sample application that uses the sleep timer, the keyfob_demo_2 example project can be used as a starting point to add and experiment sleep timer usage.
The Si4010 goes to shutdown state if vSys_Shutdown() was called. In shutdown state the RAM has no power, RAM content is lost, so further in-system-debugging is not possible. In shutdown most part of the chip is powered down. Waking up the chip from shutdown results a power on reset, boot and start of user code from address 0.
The wake up event can happen because of two causes:
- A GPIO is pulled low (e.g., a push button is pressed).
- The (previously enabled) sleep timer expires.
The sleep timer starts whenever you load a 24bit value in it other than zero. It can be seen as it counts down by reading the timer value by calling lSleepTim_GetCount(). Note that vSleepTim_GetCount() stops the sleep timer for the time of reading, so it prevents the sleep timer from counting if polled continuously.
The sleep timer keeps counting down also in shutdown state. When the sleep timer counts down to zero, it stops. If the chip is in shutdown state at the timeout and the 25th (power) bit of the sleep timer was set, the chip will wake up and boot and start execution from address 0.
The LSb of the sleep timer counts at about 2.4kHz. The lSleepTim_GetOneHourValue function returns a calibrated value which represents one hour count of the sleep timer of that particular chip. This can be used to achieve accuracy of ±1.5%.
Note that the vSys_FirstPowerUp function clears the sleep timer, so should not be called in a button-less application. There is no need to use it if vSys_BandGapLdo is never set to zero.
Proprietary Knowledge Base
Enhanced filtering of EFR32 Series 1-based designs for XO reference spur suppression
The crystal or TCXO reference spur is located +/- XO frequency (typ. 38.4 MHz for EFR32 Series 1-based designs) from the RF carrier frequency. This KBA is focusing on the possible HW modifications that can be suggested to enhance the suppression of these XO reference spurs around the carrier frequency. Also, the KBA is based on the measurement results of EFR32 Series 1-based radio boards at the 868/915 MHz frequency bands.
An evident approach could be to apply a high-Q band-pass filter, e.g. SAW filter, in the RF path to filter out the XO reference spurs. This will ensure very low level of spurs in a reliable way, but on the other it will also increase the insertion loss at the fundamental frequency while it is not a desirable solution for cost sensitive applications.
The XO coupling is basically occurred through two main domains within the part: VCO and PA. These blocks are supplied through RFVDD and PAVDD and thus forming two coupling paths. The power supplies can be modulated either by VDD and/or GND. Leakage current paths outside the chip depend on board design through impedance at HFXO frequency between supply domains.
So, a filtering scheme focused for the XO frequency on both RFVDD and PAVDD nets can help suppress these spurs effectively. The table below shows some measurement data with different RFVDD and PAVDD filtering configurations, captured on BRD4164A Rev A02 radio board at 915 MHz / +20 dBm.
* Note: close to the original BOM of reference radio boards.
Some good performer configurations in terms of spur suppression are highlighted in yellow above.
The RFVDD is filtered at the RFVDD pin, while the subG PAVDD is filtered at the PAVDD pin and at the BIAS pin of the external ceramic balun.
Some conclusions:
Further layout considerations:
Si4010 sleep timer usage example
This is a short summary and notes about shutdown state and sleep timer:
There is no Si4010 sample application that uses the sleep timer, the keyfob_demo_2 example project can be used as a starting point to add and experiment sleep timer usage.
The Si4010 goes to shutdown state if vSys_Shutdown() was called. In shutdown state the RAM has no power, RAM content is lost, so further in-system-debugging is not possible. In shutdown most part of the chip is powered down. Waking up the chip from shutdown results a power on reset, boot and start of user code from address 0.
The wake up event can happen because of two causes:
- A GPIO is pulled low (e.g., a push button is pressed).
- The (previously enabled) sleep timer expires.
The sleep timer starts whenever you load a 24bit value in it other than zero. It can be seen as it counts down by reading the timer value by calling lSleepTim_GetCount(). Note that vSleepTim_GetCount() stops the sleep timer for the time of reading, so it prevents the sleep timer from counting if polled continuously.
The sleep timer keeps counting down also in shutdown state. When the sleep timer counts down to zero, it stops. If the chip is in shutdown state at the timeout and the 25th (power) bit of the sleep timer was set, the chip will wake up and boot and start execution from address 0.
The LSb of the sleep timer counts at about 2.4kHz. The lSleepTim_GetOneHourValue function returns a calibrated value which represents one hour count of the sleep timer of that particular chip. This can be used to achieve accuracy of ±1.5%.
Example of a wake up timing of five minutes:
Note that the vSys_FirstPowerUp function clears the sleep timer, so should not be called in a button-less application. There is no need to use it if vSys_BandGapLdo is never set to zero.
For further details see sections 18. and 29. of the datasheet and chapter 7.15. of AN370 at https://www.silabs.com/documents/public/application-notes/AN370.pdf