The crystal or TCXO reference spur is located +/- XO frequency (typ. 38.4 MHz for EFR32 Series 1-based designs) from the RF carrier frequency. This KBA is focusing on the possible HW modifications that can be suggested to enhance the suppression of these XO reference spurs around the carrier frequency. Also, the KBA is based on the measurement results of EFR32 Series 1-based radio boards at the 868/915 MHz frequency bands.
An evident approach could be to apply a high-Q band-pass filter, e.g. SAW filter, in the RF path to filter out the XO reference spurs. This will ensure very low level of spurs in a reliable way, but on the other it will also increase the insertion loss at the fundamental frequency while it is not a desirable solution for cost sensitive applications.
The XO coupling is basically occurred through two main domains within the part: VCO and PA. These blocks are supplied through RFVDD and PAVDD and thus forming two coupling paths. The power supplies can be modulated either by VDD and/or GND. Leakage current paths outside the chip depend on board design through impedance at HFXO frequency between supply domains.
So, a filtering scheme focused for the XO frequency on both RFVDD and PAVDD nets can help suppress these spurs effectively. The table below shows some measurement data with different RFVDD and PAVDD filtering configurations, captured on BRD4164A Rev A02 radio board at 915 MHz / +20 dBm.
|Fund power in dBm||XO spur at -38.4MHz||XO spur at +38.4MHz||subG PAVDD||RFVDD|
|19,48||-57,9||-77,4||-58,5||-78,0||ferrite + 1nF||ferrite + 1nF|
|19,51||-57,6||-77,1||-58,3||-77,8||ferrite + 1nF + 220pF||ferrite + 1nF|
|19,53||-57,7||-77,2||-58,3||-77,8||1nF + 220pF||ferrite + 1nF|
|19,57||-63,8||-83,4||-57,3||-76,9||ferrite + 56pF||1nF|
|19,46||-62,3||-81,8||-56,9||-76,4||ferrite + 1nF||56pF|
|19,45||-52,4||-71,9||-63,2||-82,7||ferrite + 1nF *||ferrite + 56pF *|
|19,48||-60,8||-80,3||-57,2||-76,7||ferrite + 1nF||ferrite + 56pF + 47nF|
|19,48||-60,9||-80,4||-57,2||-76,7||1nF||56pF + 47nF|
|19,5||-60,8||-80,3||-57||-76,5||47nF||56pF + 47nF|
* Note: close to the original BOM of reference radio boards.
Some good performer configurations in terms of spur suppression are highlighted in yellow above.
The RFVDD is filtered at the RFVDD pin, while the subG PAVDD is filtered at the PAVDD pin and at the BIAS pin of the external ceramic balun.
Further layout considerations:
I see high radiated spur within the frequency range of the Si4x6x RF chip VCO signal. How can I suppress this?
In RX only boards due to the lack of additional filtering the VCO signal might be radiated via the antenna too. In that case some filtering between the antenna and the matching balun network is recommended.
Moreover, the filtering of the traces connected to the SDN, GPIO 2, 3 pins (and the DC supply line of a TCXO) is also suggested at the VCO frequency (not only in case of RX only boards).
Use cases where applying additional filtering on SDN, GPIO 2, 3 (and the DC supply line of a TCXO) is strongly recommended:
The actual level of this radiated spur can vary with the actual board design.
Note: Not all Si4x6x reference designs use this additional filtering on SDN, GPIO 2, 3 (and TCXO VDD supply) lines. If possible, it is recommended to apply the additional filtering inductors on all customer designs. If BOM cost is critical, these elements can be eliminated from the design, but be aware that depending on the actual PCB layout structure, increased radiated spur in the frequency range of the VCO signal might appear.
The SDN and GPIO 2, 3 filtering on Silicon Labs reference designs is shown in the following figure:
The inductor value should be selected in a way to ensure enhanced suppression at the VCO frequency, so inductors that have SRF at the ~ 3.5 GHz frequency range.
What Si4x6x reference designs need external power supply even if being connected to the Wireless Motherboard (WMB-930)?
Si4x6x reference designs with additional external FEM or FET require external power supply even if connected to the Wireless Motherboard, WMB-930. It means to use an external 4xAA battery pack connected to the RF Pico Board. The reference Pico Boards also use an external LDO in order to ensure the required 3.3 or 3.6V power supply for the radio and FEM/FET.
The external power supply is required due to the higher current consumption.
This KBA provides a brief summary about and highlights the possible need for board-level ESD protection for RF devices.
Radio chips are designed for and tested against different chip-level ESD standards, such as Human Body Model (HBM), Machine Model (MM) and Charged Device Model (CDM). These chip-level test results are summarized in the RF IC’s Qualification Reports.
However, in a real-world application a final module/board has to resist and stand against an ESD shock. For this purpose, the final electronic product has to be tested against a different, more stringent standard that simulates and replicates the real world ESD stress conditions. This system-level ESD standard is the IEC 61000-4-2, for instance. System/module designers should take care to comply with the IEC 61000-4-2 system-level ESD standard. This KBA provides some board-level insights about how to make an RF design more immune against ESD.
For more technical details, please refer to Silicon Labs' application note AN895. This application note provides recommendations on ESD protection circuits and shows test results measured with the Si4x6x chip family, however the suggested protection circuits can also be utilized with any other RF chip families.
For an RF design the most ESD-sensitive part is the RF path, including the antenna, matching network and RF ports. Secondly, the supply and GND paths are also sensitive, and lastly any GPIO or other paths connected to the RF chip directly.
So, the antenna definitely needs special care during design and assembly into the end product. ESD protection can be enhanced by:
- antenna placement: end-user shouldn't be able to touch it in any case.
- design an antenna with direct GND connection, e.g. inverted-F antenna.
- protection circuit elements in the RF path: parallel inductors, capacitors, TVS diodes.
Many circuit designs have the supply trace connected to the PA externally, for which cases the supply trace may also need care and ESD protection.
Lastly, any push-button or interface, that can be touched by the user of the end-product during normal usage, may also need to be ESD-protected. These are, typically, GPIO ports of RF devices.
Please see AN895 application note for recommended ESD protection circuits and for more technical details.
This KBA provides some hardware tips about how to maximize the isolation between multiple antennas mounted on the same PCB.
- Maximize the distance(s) between the antennas on the PCB in order to minimize the radiated coupling effects.
- Place the antennas in opposite orientation, i.e. opposite polarization in order to maximize the isolation.
- The radiation patterns of antennas can also be taken into account during placement, i.e. try to place one antenna in the null point (or less radiating) direction of the other one.
- Place the antennas on different layers, i.e. put one antenna on the top and the other on the bottom layer of the carrier PCB.
- Select antenna types which have a bit more concentrated and localized RF currents close to the antenna input ports. E.g. inverted F-antenna (over a simple monopole antenna).
- If each antenna is placed at the PCB edge, then GND slot(s) - one slot between two antennas - on the common GND plane can be ensured between the antennas in order to minimize the mutual current and thus decrease the coupling effects.
The shape and dimensions of these board-edge current-blocker slots can be the followings:
1. Simple straight slot with 3mm width and quater-wavelength length on the given PCB.
2. For a wider band approach, slot line radial stubs or even diamond-shaped slots can also be utilized - as shown in the design of 4455-LED-868 RF Stick, for instance (see the diamond-shaped slot in the printed balun area):
Si4x6x radios offer High-performance and Low-power operation modes. Selecting one over the other affects 3 RX mode parameters: RX current, RX Sensitivity, Adjacent Channel Selectivity. The following table summarizes the actual differences between these 2 modes:
|High-performance mode||Low-power mode|
|RX Current||~3mA higher||~3mA lower|
|RX Sensitivity||~2dB better||~2dB worse|
|~2dB better||~2dB worse|
The desired performance mode can be selected in GLOBAL_CONFIG API property:
- GLOBAL_CONFIG = 0 --> High-performance mode
- GLOBAL_CONFIG = 1 --> Low-power mode
Silicon Labs' sub-GHz reference designs for EFR32 Series 1 chip family (EFR32xG1x) utilize an external ceramic balun in the RF-FE matching network. This matching approach is documented and well-detailed in the application note AN923.
However, mostly due to cost reasons, full discrete matching designs might be more desirable. The KBA shows several options about how to apply a matching network for EFR32xG1x devices with utilizing SMD discrete components only. Design details on these solutions are also discussed in application note AN1180: https://www.silabs.com/documents/public/application-notes/an1180-efr32-series-1-sub-ghz-discrete-matching-solutions.pdf
Since the EFR32 wireless Gecko has differential TX and RX ports, the matching circuit has to have a balun function too, upon the impedance matching, so the standard 4-element matching balun approach can be applied here as well as shown in the application notes AN369/643 (however, these are discussed with other radios). The impedance goals for the matching network for EFR32 can be found in AN923.
Some extra details for simulations: TX bonding wire inductance is around 2 ... 2.5 nH; RX bonding wire inductance is around 1 ... 1.5 nH. LNA capacitance is around 1 ... 1.1 pF; PA capacitance is adjustable but it is recommended to use the min. value of it for the best efficiency which is around 2.5 pF. Impedance goals are e.g. 125 ohms in TX mode for +20 dBm running at 3.3 V and for +13/14 dBm too running from the on-chip DCDC converter (1.7 ... 1.8 V); and 500 ... 600 ohms in RX mode.
Here is a recommended schematic topology for a full discrete match in TX-RX direct-tie configuration:
- differential-to-differential L-C match for the first section of RX path [LGATE; CSER-1; CSER-2]
- 4-element matching balun approach [L1-1; L1-2; L2; C1; C2] + common mode suppressor [CH] applied on the TX path (+ rest part of RX match) + LPF [CHF0/1/2; LHF0/1]
Here is a recommended schematic topology for a full discrete match in split (separate TX and RX paths) configuration:
- TX path: 4-element matching balun approach [L1-1; L1-2; L2; C1; C2] + common mode suppressor [CH] applied + LPF [CHF0/1/2; LHF0/1]
- RX path: 4-element matching balun approach [LR1; LR2; CR1; CR2]
The split matching configuration can easily be re-used for designs with external SAW filter, FEM or RF switch utilized.
The common mode suppressor (CH) improves the balun function of circuit and can also be tuned for a specific even harmonic (typically 2nd or H2) where enhanced suppression can be achieved by the given notch filters composed by the L1-1 -- CH and L1-2 -- CH series resonances to GND.
The component values of LDC (RF choke inductor), CC (RF bypass - DC block capacitor), LGATE, CSER and LPF elements can be found in the application note AN923.
The simulated component values (simulated only, so bench tuning can likely be required) of the discrete matching balun networks - applicable for both schematics shown above - are summarized here:
TX path: (L1 here below is shown as total value, so L1 = L1-1 + L1-2; while L1-1 = L1-2)
Reference design package with measurement report is available for the direct-tie matching solution described above under the following link: https://www.silabs.com/documents/public/schematic-files/EFR32xG1x_DISC_REF_DES_A00.zip
These designs shown above are single- and typically narrow-band solutions, especially in the RX path due to the higher-Q impedance transformation needed. For dual-, multi- or wide-band matching solutions please refer to the application note AN1180: https://www.silabs.com/documents/public/application-notes/an1180-efr32-series-1-sub-ghz-discrete-matching-solutions.pdf
Si4x6x radios can operate in High-performance or Low-power modes, which can be set in GLOBAL_CONFIG property. In order to save some current consumption (typically 2-3mA), low-power mode can be enabled, however it has some tradeoff in RX performance (sensitivity, linearity).
If the crystal parameters meet the requirements listed in AN785 section 1, both high-performance mode and low-power mode should result robust crystal operation on a properly designed PCB layout (crystal placed as close to the XTAL pins as possible).
In high-performance mode there is some margin on the required crystal parameters, but still it is recommended to stay within the ranges listed in AN785 section 1 for safe operation. Crystal start-up issues might occur if the parameters are not met.
In low-power mode meeting the required crystal parameters is more critical, i.e crystal start-up issues might happen even if the RF crystal parameters are near the edge. Low-power mode can be used robustly with a crystal that easily meets the recommended parameters. AN785 Table 1 provides a list of recommended crystals that will ensure safe operation both in high-performance and low-power mode.
If crystal start-up problem occurs in low-power mode, there are 2 possible options to avoid the issue:
The BRD4001A board's key dimensions are shown in the flowing picture:
The available reference matching networks for the EFR32 wireless Gecko family (EFR32xG1x) at the sub-GHz frequency region utilize the so-called direct-tie topology where the TX and RX paths are directly connected to each other without using external RF switch. In order to be able to insert a SAW filter / RF switch or FEM into this matching structure it is recommended to separate the TX and RX paths, since it is not suggested utilizing SAW filter in the TX path, because of:
- the expected power efficiency degradation in TX mode due to the considerable insertion loss of the SAW filters,
- SAW filters are typically designed for low power levels, i.e. would yield TX power limitation,
- SAW filters typically do have weaker attenuation at the higher frequencies, i.e. at the RF harmonics, so discrete LPF would always be recommended.
The recommended schematic structure for EFR32 with SAW filter is shown below.
- TX path matching structure is kept from the reference radio board designs available, and the recommended component values here should be the values shown in AN923 plus 1.5...2nH for the series inductors, if those series inductors are placed close to the TX pins, despite as it is on our reference radio board designs due to the direct-tie TX-RX topology. The parallel capacitor should have the same value as shown in AN923.
- The order of the LPF section may be changed based on the power level, harmonic suppression requirements.
- RX path match utilizes a standard 4-element discrete matching balun network, similarly as detailed in AN643. Simulated component values are shown in the table below.
- RF switch is also being used in order to separate the TX and RX paths' matches, while being connected to the same antenna port.
- SAW filter's separate matching network may not be needed (LW1, LW2, CW1, CW2, CW3 and CW4) - refer to the given SAW filter datasheet.
For designs that use RF switch only, then the above schematic can be used without having the SAW filter and its matching components (LW1/2, CW1/2/3/4) mounted. However, a series RF bypass / DC blocking capacitor can be suggested between the 4-element discrete balun SE port and RF switch.
A typical design with FEM is being shown in the figure below. Here, the RF switch can basically be replaced by the FEM while the SAW filter is not shown below, but can be utilized between the FEM RX ports, if applicable. The recommended placement of SAW filter in FEM (with LNA) designs is between the separate RX ports of FEM that ensures the following order of RF blocks in the receiver path: Antenna --> discrete LPF (required due to TX harmonic suppression reasons) --> SAW filter --> FEM LNA --> 4-element discrete matching balun network --> EFR32 LNA. This approach will ensure robust receiver operation in an even noisy environment. Despite the fact that in a non-noisy environment, better link budget could be achieved if the SAW filter were placed between the 4-element matching balun and FEM LNA, Silicon Labs do recommend to use the approach described above, since introducing LNA in the receiver path in general yields however better sensitivity, but worse linearity and blocking performance. If the non-noisy environment can be ensured then the SAW filter is not necessary in the design.
For discrete matching solution on the TX path as well (i.e. eliminating the external ceramic balun between the EFR32 and FEM), please refer to the following KBA link reference.