Proprietary Knowledge Base

      • RF range factors

        zovida | 12/341/2017 | 11:16 AM

        The achievable RF range is affected by many factors as listed below. 

        - Transmit power and TX antenna gain

        - Receive sensitivity and RX antenna gain

        - Frequency: It is related to the gain and effective area of the antenna. It can simply translate into that the lower frequency the link operates at the better RF range can be achieved. 

        - Antenna radiation pattern: The best RF range can be achieved if the TX and RX antennas are facing to each other in their maximum radiation lobes. There could be some directions where the antennas' radiation patterns do have minimum notches and thus the RF range could be poor in these directions. 

        - Interference, noise: Any in-band noise does have severe negative effects on the range since it can mask out the wanted signal at the RX side (see the co-channel rejection parameter). But, stronger out-of-band noise can also degrade the RF range based on the receiver's ACS and blocking performances.  

        - Frequency offset between TX and RX: It can become more critical in narrow-band systems where the exact carrier frequencies must correctly be set. 

        - Final product placement and enclosure: The antenna performance can be affected by any material in the close proximity of the antenna and by the antenna placement. In order to avoid any de-tuning effect (and thus RF range degradation) make sure about the recommended antenna (or i.e. module) placement and clearance. 

        - Environment: Ideal case is an outdoor environment where there are no reflections (e.g. no walls, big obstacles, trees, houses) and there is a direct line-of-sight (LOS) between the TX and RX and there isn't any obstacle in the Fresnel ellipsoid too (see online calculators for the Fresnel zone/ellipsoid). Less ideal case is an urban area, or when there is no LOS between the TX and RX. The worst situation is an office indoor environment where there is typically no LOS and there are walls, obstacles and thus reflections. Propagation constant can describe the environment which is typically 2.5...3.5 in an outdoor environment with LOS between the TX and RX nodes, while can even be 4...6 in an indoor environment.  

        - Transmitter and receiver heights: This is also related whether there is any obstacle, e.g. ground, in the Fresnel ellipsoid. If so, the RF range is negatively affected. Thus, the higher the nodes are placed at the bigger RF range can be achieved.  


        See a related KBA link on this topic below which describes an example estimator/calculator for the RF range.


      • PCB antenna with wider bandwidth

        zovida | 04/94/2017 | 11:04 AM


        How can I make the frequency bandwidth of PCB antennas wider?


        In some cases/applications the BW of printed antennas might not be sufficient. This article summarizes some design tricks on how to make a printed antenna wider bandwidth.


        - Increase the board size (e.g. GND plane in the case of monopole-type antennas). Avoid using RF modules that have smaller size than quater-wavelength. Small modules generally have poor antenna gain and narrow bandwidth (due to the high Q factor).


        - Increase the board thickness. Of course, it's typically limited by design.


        - Decrease the dielectric constant of the PCB. Select PCB material with low epsilon value. 


        - Use wider and/or tapered traces in the PCB antenna structure.


        - Do some tricks in the external antenna matching network. I.e. use more components to do the match; create resonators in the matching network. Also, see Bode-Fano, Youla matching techniques.

      • Recommended external antenna matching network

        zovida | 04/94/2017 | 10:23 AM

        A number of antenna types can inherently be matched to the desired input impedance (typically, 50-ohm single-ended) without using any external tuning component (e.g. printed inverted-F antenna). However, board size, plastic enclosures, metal shielding, and components in close proximity to the antenna can affect antenna performance. For best performance, the antenna might require tuning that can be realized by two ways:

        • Dimension changes in the antenna layout structure, or
        • Applying external tuning components.

        It is typically a preferred solution when layout modification is not required on a custom design. To accomplish this, Silicon Labs generally recommends to ensure SMD placeholders for external antenna tuning components, where the suggested external antenna matching structure is a 3-element PI network. You can achieve a good match using as a maximum of two elements (with one series and one shunt component) of the PI network. Any unknown passive impedance can get matched to 50 ohms on this PI network, since all L, C, L-C, C-L combinations can be realized on it and therefore any de-tuning effect can be compensated out.

        Note that every implementation of an antenna design might require different combinations of inductors and capacitors.

        Recommended 3-element PI network for external antenna matching purposes:



      • EFR32 sub-GHz single-ended operation

        zovida | 11/313/2016 | 10:51 AM


        How can I use the EFR32 sub-GHz RF ports in single-ended way?


        Both TX and RX sub-GHz RF ports of EFR32 wireless geckos are truly differential ones. However, they can be used in more simple single-ended way as well, which will enable to use more simple matching networks, but, on the other hand, it will sacrifice some RF performance.



        For single-ended RX operation, sensitivity degradation of 6 dB is expected. The unused input pin can be connected to GND. Note, that it also affects the performance of RFSENSE.



        Regarding the TX, 3 dB lower output power is expected. Also, the harmonic performance will be degraded. The unused TX pin can be connected to GND (to save current). 


        The single-ended matching network should use halved impedance compared to the differential one, with removed ceramic balun. 

        • The single-ended RX and TX matches use the series elements of the original differential match without any change: i.e. the series capacitor in the RX match and the series inductor in the TX match will remain the same.
        • The shunt element impedances are halved in the single-ended match and connected to GND: i.e. half shunt inductor value in the RX match and double shunt capacitor values in the TX match are used. As the TX internal capacitor will be small as well an additional external shunt capacitor will be used right at the TX pin as well.
        • Remove the balun and connect the single ended match output directly to the single ended LPF.  
      • Replacement for the uPG2164 DPDT RF-switch

        zovida | 09/260/2016 | 12:06 PM


        What kind of RF-switch is recommended for the replacement of the uPG2164 DPDT RF-switch used in most of reference designs?


        The RF-switches listed below can be good alternatives to replace the uPG2164 DPDT RF-switch. These switches have approximately the same specifications/characteristics/ratings and footprint as the uPG2164.


        Example list of RF switches for the replacement:








        The RF switch used in the designs needs to have:
        - low insertion loss
        - high enough frequency capability
        - high isolation

        - high enough power capability

        - low harmonic re-generation, i.e. low distortion

        - small size

      • Recommended routing technique for more-layer RF designs

        zovida | 05/152/2016 | 09:10 AM


        How should I route the traces on more-layer RF designs for optimal performance?


        In order to achieve the possible best RF radiated performance the followings are suggested for more-layer RF board designs:

        - Top Layer: Components and short traces. Top layer should use as large and continuous GND plane metallization as possible (with many stitching GND vias) on the entire PCB.

        - 1st inner layer: GND plane and traces if necessary. The most important rule is to keep the GND pour metallization unbroken beneath the RF areas (between the antenna, matching network and RF chip). Traces can be routed under the non-RF areas and use GND pour where possible.

        - 2nd, 3rd... inner layers: Traces. VDD and all other traces are suggested to be routed on these layers. Use GND pour where possible.   

        - Bottom Layer: GND plane. Use as large and continuous GND plane as possible. Do not route traces on this layer, just if it is necessary, e.g. short connection traces to connectors.

      • General RF Layout Suggestions

        zovida | 05/152/2016 | 08:53 AM


        What are the general layout suggestions for RF board design?


        Here are some layout hints that are suggested to follow for nay kind of RF board designs.

        - use as large and continuous GND metallization as possible on all layers

        - use plenty of GND stitching vias on the enrite PCB, especially at the board and GND metal pouring edges.

        - do not route traces at the board edges

        - place the high frequency crystal close to the RF chip

        - connect the crystal case to GND

        - use short VDD traces

        - if possible, shield the VDD traces by ground metallization (with vias) from both sides

        - put the matching network as close to the RF chip as possible to minimize the parasitics in the RF-FE match and avoid de-tuning

        - make sure that there are many GND vias on the RF chip's exposed pad

        - further recommendations are in the layout-related application notes.

      • TCXO powered from Si4x6x GPIO

        zovida | 07/211/2015 | 06:34 AM


        Can one of the GPIOs of Si4x6x be used to supply the TCXO?


        The TCXO can be directly powered from GPIO0, GPIO2 or GPIO3. But, it cannot be supplied from GPIO1.

        GPIO1 changes its states during booting up, so it is not appropriate to constantly feed the TCXO. 

        The GPIO0 can also have enough drive capability to power the TCXO. 

        GPIO0,2,3 can be used with the "DRIVE1" or "IN_SLEEP" command to supply the TCXO. 

      • Si446x Sensitivity Loss in Direct-Tie Configuration

        zovida | 06/167/2015 | 11:35 AM


        What could be the main reason for the sensitivity loss in Direct-Tie configuration with Si446x?


        Considerable sensitivity loss can be observed in Direct-Tie board configuration (i.e. TX and RX paths are directly connected to each other without the use of external RF switch) with Si446x even if the transmit spectrum looks okay and the 4-element balun matching network is also good in terms of layout and component values (i.e. good RX sensitivity in Split board configuration). Typical problem what can cause even more than 10 dB sensitivity loss is the L0-C0-CPAoff resonance what shunts the RX path in Direct-Tie configuration in RX mode. 

        In Split configuration (i.e. separated TX and RX paths) optimum TX and RX performances can be achieved. However, in Direct-Tie configuration the TX path (typically L0-C0) needs to be slightly de-tuned (from the optimum TX split values) in order to avoid the above mentioned resonance what would shunt the RX path in RX mode. This is a typical effect in the high frequency bands (i.e. 868-915 MHz). The recommended way of the matching network tuning for the Direct-Tie topology is to get the resonance away from the RF carrier with the tuning of L0 value and then tune the C0 value to get back an acceptable TX performance (tuning of L0 has the significant effect on the L0-C0-CPAoff resonant frequency, since the CPAoff is a fixed about 1.5 - 2 pF, Silicon Labs recommend to tune this resonance to the higher frequencies, i.e. reduce the L0 value, and then slightly increase the value of C0). A few nH in the L0 value can cause considerable effect on the RX sensitivity, so it is also highly suggested copying the RF layout from Silicon Labs reference designs and place the L0, C0 components (with the connection point of RX to the TX path) as close the TX pin of Si446x as possible. A few mm longer trace between the TX pin, L0, C0 and Direct-Tie connection point (compared to Silicon Labs reference designs) introduces a few extra nH what is added to L0 and it can bring the L0-C0-CPAoff resonance back to the RF carrier.   

        Please refer to the "5.4. Detailed Matching Procedure for Direct Tie Board Configuration" section in AN627 application note for a more detailed explanation and simulations. 





      • Si4010 reduced power

        zovida | 06/167/2015 | 06:28 AM


        How can I further reduce the output power level of Si4010?


        The guaranteed output power level range of the Si4010 RF transmitter IC is between +10 and -13 dBm. This power output range can be covered by the settings of PA_Power_Level (bLevel) and PA_Max_Drive (bMaxDrv) API registers included in the vPA_Setup() function. The minimum, -13 dBm, output power level can be achieved with bLevel=0 and bMaxDrv=0. 

        However, the Si4010 RF chip is capable to transmit with a lower power output than -13 dBm. For this, the PA_LVL SFR has to be directly written. The address of the PA_LVL SFR is 0xCE. For a more detailed register description please refer to the "SFR Definition 12.1. PA_LVL" section in the Si4010 datasheet.

        After the vPA_Setup() function in the code the PA slice and bias settings can be overwritten by writing the PA_LVL SFR. For reference, the bLevel=0 and bMaxDrv=0 API settings are equivalent with the PA_LVL SFR value of 0x32. Smaller value of this SFR will provide lower power output than -13 dBm.