How is extended frequency operation implemented on the Si4133?
To implement the extended frequency option, the RFLA and RFLB pins should be connected with the shortest trace possible. The extended frequency is available only for on the MLP package of the Si4133 family. In addition, bit D1 of the main configuration register should be set to 1 and VDD set to between 3.0 and 3.6V. For more details, refer to Application Note 41 Extended Frequency Operation of Silicon Laboratories Radio Frequency Synthesizers.
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