I see high radiated harmonics with an EM35x design. How can I get more suppression on the critical harmonics?
If high radiated harmonics are observed the first thing should be to find the main sources of these unwanted radiated harmonics. We can split this - where the radiations could be coming from - into two options:
1. From the RF front-end, antenna
2. From the PCB itself, other (i.e. non-RF) traces
Reducing the conducted harmonics as much as possible always makes sense, since antennas can have quite large gain on the harmonics too. So, the first step has to be to get good and quite clean conducted spectrum in any case.
Regarding the non-RF traces radiation the main suspicious one could be the VDD trace itself in most cases. The RF pins of the EM35x chip must be pulled up to VDD for biasing the PA, so there is connection between the RF and VDD and some RF harmonic leakage can appear to VDD from the RF.
Here is a list what includes some tuning tips on how to get further suppression on the unwanted harmonics:
1. Use a proper 5th order low-pass filter before the antenna, see our reference designs.
2. Make sure whether the ground pads of the filtering capacitors are placed far from each other as possible (should be followed especially for the same-valued capacitors).
3. If extra antenna matching network is required at the antenna input port for the proper antenna impedance at the fundamental, make sure to apply a low-pass kind of matching network.
4. If the design uses FEM, please make sure to do not overdrive it, i.e. do not use the EM35x chip in a too large TX power state (typically set to -5).
5. Please make sure whether many grounding vias are used on the exposed pads of the EM35x chip and FEM. See our reference designs.
6. In more-layer designs, please make sure to put as many traces onto an inner layer as possible and create large and continuous ground reference planes on the top and bottom layers what can work as a natural shield. The top copper pouring is not suggested around the EM35x chip, XO and ceramic balun, but recommended around the RF filtering section.
7. In FEM designs, if the critical harmonic falls quite far from the fundamental (e.g. 5th harmonic) an extra notch filter can be applied between the FEM and EM35x chip. This extra filtering element is just an extra parallel capacitor between the RF pins what can be insert to the design in parallel with the single matching parallel inductor between the FEM and EM35x chip. For example, for the 5th harmonic suppression the suggested capacitor value is 0.4pF what is a short circuit at the 5th harmonic, but practically does not affect the fundamental operation.
8. The VDD trace(s) should be filtered by capacitors and inductors too if necessary (this could be the case when the conducted spectrum looks good, but the radiated harmonics are still too high). In a single EM35x design the 1.8V RF VDD trace, meanwhile in designs with FEM the 2.1 - 3.6V VDD traces too (connected to the supply pins of the FEM) should be filtered. This filter can include parallel capacitors from the VDD trace(s) to GND and/or series blocking inductors on the VDD trace(s) what are suggested to be placed as close to the VDD pins as possible. The recommended capacitor values for the 2nd and 3rd harmonic suppression are 2.4pF and 1pF, respectively. The suggested indcutor values for the 2nd and 3rd harmonic suppression are 7.5nH and 3.3nH, respectively.
9. Please make sure about the layout routing, suggested to follow our reference designs.
What is the optimum termination impedance for the EM35x RF chips? How does its matching network look?
The optimum load at the PA on the silicon die is approximately 700 Ω when the PA/LNA device capacitance is resonated-out. This maximizes the voltage swing at the drains of the PA devices within the available supply voltage.
However, the optimum load presented to the pins of the EM35x SOC must take into consideration not only the optimum PA load but also on-chip parasitic capacitance and package bond-wire inductance. It is estimated that the optimum load presented to the pins is 27 + j95 Ω (series impedance). This is equivalent to a parallel resistance of 368 Ω combined with a parallel inductance of 6.6nH.
Now, the question is: how to match it to achieve the best possible RF performance?
The term “matching” typically implies conjugate power matching. It is important to understand that the EM35x PA is not power matched according to the traditional definition. The term is applied to describe designing to optimal PA impedance.
PCB parasitics play a part in the impedance transformation and that, even with the tightest of layouts, traces between the matching elements will add significant reactance at 2.4 GHz. In particular, there will be some series inductance between the package pins and the first matching element. This is significant when that element is in shunt because it cannot be absorbed into that reactance. Since this effect cannot be avoided, it is best to take advantage of it.
The lowest loss, least complex arrangement is series inductance followed by shunt inductance. To make use of the PCB traces it must be recognized that they operate more like transmission lines, which travel slightly differently on the Smith chart compared with real inductors and this affects the shunt inductance value.
To summarize, the matching network includes:
- only one parallel inductor between the RF pins, typical value is between 2.7 and 3.9 nH
- PCB traces between the EM35x RF chip and the parallel inductor mentioned above
The required differential load impedance at the parallel indcutor pins is pure, real 100 Ω.
So, basically with only one parallel inductor (besides the PCB traces) the RF chip can be matched to pure 100 ohm differential impedance. After that a ceramic balun with filter, a FEM or a differential-type antenna can be directly placed. Or, even a discrete matching balun network with filter can be designed to get a single-ended output. See our reference designs.
But, in all cases the first parallel inductor is required (this can be imagined like it is necessary to resonate out the PA/LNA device capacitance). This inductor also comes handy in the PA biasing, where both RF pins need to be pulled-up to VDD. The suggested RF choke inductor value is 22 nH (shows high impedance at the fundamental frequency) what is connected between the VDD and RF path.
For more details please refer to the AN698 Application note and see our reference design schematics and layouts. If any questions, you may submit them along with your schematic design files to the support portal and request a review by the Wireless Hardware Support Team before finalizing your PCB layout design in order to make sure any concerns are resolved and the key design elements are included, especially important for some custom designs meant for high temperature applications, have reduced layer stack counts or are space constrained. When submitting a design for review, please also submit a completed Hardware Design Review Questionnaire to assist the support team in providing the most appropriate and comprehensive response.
Link to the EM35xx Hardware Design Review Questionnaire:
Which Serial Dataflash/EEPROM External Memory Parts are Natively Supported to be used with Ember Chips?
mc24aa1025.c: I2C Interface to Microchip 24AA1025/24LC2025 Serial EEPROM containing 128kBytes of memory.
stm24m02.c: I2C Interface to ST M24M02 Serial EEPROM containing 256kBytes of memory.
at45db021d.c: SPI Interface to Atmel/Adesto AT45DB021D/E Serial Flash Memory containing 264kBytes of memory.
m45pe20.c: SPI Interface to Micron/Numonyx M45PE20 Serial Flash Memory containing 256kBytes of memory.
spiflash-class1.c: SPIFlash driver that supports a variety of SPI flash parts:
Winbond W25X20BV (2Mbit), W25Q80BV (8Mbit)
Macronix MX25L2006E (2Mbit), MX25L8006E (8Mbit), MX25L1606E (16Mbit), MX25U1635E (16Mbit 2Volt)
Atmel/Adesto AT25DF041A (4Mbit), AT25DF081A (8Mbit)
Numonyx/Micron M25P20 (2Mbit), M25P40 (4Mbit), M25P80 (8Mbit), M25P16 (16Mbit)
Note: spiflash-class1.c could be easily extended to support other parts that use the same protocol as these.
Most of this information can be found in AN772_Using_Application_Bootloader under Table 2. Supported Serial Dataflash/EEPROM External Memory Parts.
Note: The Atmel/Adesto AT45DB021D/E is listed as 256kBytes in the above mentioned table. This is because while the device is actually 264kBytes, it is used as if it is 256kBytes. Due to this, do not change the page size to 264 if you are modifying at45db021d.c for an Atmel/Adesto part that is page sizes of 264.
Note: As of EmberZNet 5.4.3, spiflash-class1.c also supports Spansion S25FL208K (8Mbit) and MX25L4006E (4Mbit).