Answer

Maximum external pull-up / down resistor value for Indoor residential rated devices operating in temperatures up to +50° C.

EM358x, EM359x (all GPIOs): 10 M ohms

EM351, EM357 (all GPIOs): 10 M ohms

Maximum external pull-up resistor value for Industrial rated devices operating in temperatures up to +125° C.

EM358x, EM359x (all GPIOs): 7.87 M ohms

EM351, EM357 (except GPIO PB7): 7.87 M ohms

EM351, EM357 (GPIO PB7 only): 5.23 M ohms

Maximum external pull-down resistor value for Industrial rated devices operating in temperatures up to +125° C.

EM358x, EM359x (all GPIOs): 10 M ohms

EM351, EM357 (all GPIOs): 10 M ohms

A good reason to use an external pull-up or pull-down resistor on an EM358x GPIO is due to the external resistor can allow the opportunity for reduced current draw in certain applications, which can be very beneficial in battery powered designs.  The reason for this is the maximum value resistance that works as a pull-up or pull-down for an EM358x GPIO pin is much greater than the internal pull-up or pull-down resistance listed in the EM358x datasheets (around 30k ohms), which equates to significant power savings in battery powered applications in which one or more pull-up or pull-down resistors are frequently drawing current.  For example, a battery operated open / closed sensor switch may be required to have a pull-up or pull-down on the switch circuit.  The firmware may be monitoring for a high level on the switch / GPIO circuit.  In the case of a normally closed switch, when the switch is engaged, the resulting circuit to ground through the switch is detected by the firmware and acted upon. Depending upon how often or how long the switch is activated, the resulting power drain through the pull-up or pull-down could significantly shorten the overall lifespan of the battery.  In this type of situation, use a large value external resistor instead of the internal pull-up or pull-down configuration of the GPIO pin in order to reduce the current draw.

To arrive at 7.87M ohms / 10 M ohms / as the maximum safe resistor pull-up / down value to use, we first determine the GPIO maximum input leakage current. Characterization testing of Engineering IC test lots have revealed an upper limit of 50 nA for industrial rated devices and an upper limit of 30 nA for indoor / residential rated devices. The one exception is GPIO PB7 of the EM351, EM357 devices which is revealed to have an upper limit of 75nA at 125C. Having now determined the leakage current, we then apply the minimum supply Vin voltage, 2.1 V, found in Table 3.2 of the EM385x Datasheet, http://www.silabs.com/Support%20Documents/TechnicalDocs/EM358x.pdf.

Using the minimum Vin voltage, we calculate the maximum HIGH Schmitt switching threshold for the GPIO by multiplying the minimum supply Vin voltage by 0.8 per Table 3.5, giving us 1.68 V, (2.1 * 0.8 = 1.68 V).  Next, we determine the allowable voltage drop across the external pull-up by subtracting the High Schmitt switching threshold voltage from the Vin voltage, (2.1 V – 1.68 V = 0.42 V). By using Ohm’s Law to divide the voltage drop of the external pull-up by the threshold leakage current value and multiplying the result by 0.95, we safely determine the appropriate pull-up resistor value with a 5% margin. For the industrial / residential outdoor temperature range of -40° C to +125° C, (0.42 V / 0.00000005 A * 0.95 = 7.98 M ohms), we reduce the pull-up resistor value to 7.87 M ohms as the nearest commercially available resistor value. For the indoor temperature range of 0° C to +50° C, (0.42 V / 0.00000003 A * 0.95 = 13.3 M ohms), we limit the pull-up resistor value to 10 M ohms. The reason is anything greater in resistance than 10 M ohms is simply not reliable as the circuit will be affected by the resistances of many contaminants such as moisture and dirt, etc. For EM351 / 7 GPIO PB7, the equation is (0.42 V / 0.000000075 A * 0.95 = 5.32 M ohms), where we limit the pull-up resistor to 5.23 M ohms as the nearest commercially available resistor value.

Similarly for the pull-down value we calculate the maximum LOW Schmitt switching threshold for the GPIO by multiplying the allowable voltage drop for the external resistor found in the pull-up calculation above by Vin, giving us 0.882 V, (0.42 V * 2.1 V = 0.882 V).  The result, 0.882 V, is the allowable voltage drop for the external pull-down resistor. By using Ohm’s Law to divide the voltage drop of the external pull-down by the threshold leakage current value and multiplying the result by 0.95, we safely determine the appropriate pull-down resistor value with a 5% margin. For the industrial / residential outdoor temperature range of -40° C to +125° C, (0.882 V / 0.00000005 A * 0.95 = 16.758 M ohms), and for the indoor temperature range of 0° C to +50° C, (0.882 V / 0.00000003 A * 0.95 = 27.93 M ohms), we again limit the pull-down resistor value to 10 M ohms for reliability.

Answer

There are several possible causes of EM3xx programming issues.  Some examples are described below.

One possible cause for not being able to program EM3xx flash is having enabled read and write protection inadvertently. This is easy to identify, as em3xx_load will display a message stating that read protection is enabled.  To recover the device, simply disable read protection with the following command:

em3xx_load --disablerdprot

This operation will also erase the main flash block.

Another possible cause could be data corruption in the main flash block. This could be caused by programming a corrupt image into flash, where the application is in a tight reset loop that prevents the debugger from interfacing with the target device. In such a case, the EM3xx can be forced to enter FIB monitor mode, which will bypass the application, allowing the debugger to access the target and erase the corrupt image.  This is achieved by shorting pin PA5 to ground on a power-up/boot-up event.  You can verify that you know have a serial wire access to the device by issuing the following command, which reads the EUI-64 from the flash:

em3xx_load --reui64

This should display valid EUI-64 without any errors. Then, continuing to hold PA5 low, run either of the following commands:

em3xx_load --masserase

or

em3xx_load --erase

The command ‘masserase’ will perform a global erase operation and the entire flash block is erased at once, while the command ‘erase’ does a page by page erase operation.  Once erased, PA5 can be removed from ground.  Once the above action is done, programming operations on the EM3xx chip should now return to normal.

Answer

For the crystal itself, there are three tolerance considerations which go into determining the full crystal frequency tolerance:

1. Fundamental frequency tolerance at room temperature.
2. Frequency stability across a given range of temperature.
3. Frequency tolerance due to aging.

The reason crystal selection is so important is because for proper operation between the radios in a network, it is very important to have the transmit frequency offset between them as small as possible.  Since the transmit frequency offset is directly dependent on the crystal frequency offset, crystal tolerances become the key parameters to go by.  To properly specify the crystal within the three parameters above, the designer must also determine the temperature range the EM3xx is to operate in and how long the product is to be in use, i.e., the life expectancy of the product must be known.  The total of these three parameters must then be about +/- 35 ppm maximum in order for the crystal being considered to be used.  Additionally, the crystal circuit consists of the EM3xx and load capacitors as well as the crystal itself and these components must be taken into consideration.

The EM3xx has a TX frequency offset range which is +/- 2.4 ppm.  This range of the transmitter frequency must be subtracted from the 802.15.4-2003 +/- 40 ppm specification when determining the allowable crystal tolerance.  Additionally, there is a crystal frequency tolerance resulting from the tolerance of the load capacitors.  For example, a 5 % tolerance capacitor will result in a larger +/- ppm crystal frequency than will a 1 % tolerance capacitor.  For cost reasons, most designers select 5 % tolerance capacitors which generally result in about another +/- 2.5 ppm crystal frequency.  This really depends on both the internal crystal makeup in conjunction with the load capacitors, but +/- 2.5 ppm can generally be assumed during design and then verified in prototype hardware.  The load capacitor tolerance effect must also must be subtracted from the 802.15.4-2003 +/- 40 ppm specification leaving about +/- 35 ppm as the maximum allowable crystal frequency tolerance.

Application note AN700, http://www.silabs.com/Support%20Documents/TechnicalDocs/AN700.pdf, section 2.6, Transmit Frequency Test, provides details regarding the relationship between the EM3xx radio center frequency offset and the crystal frequency offset.  Use the method given in AN700 to adjust the value of the load capacitors by verifying the frequency offset of the radio.  Be aware the frequency offset at room temperature can vary from application to application, depending on the temperature range of the application and / or aging of the crystal.  For this reason, the designer should always check with the crystal manufacturer for the best room temperature frequency offset to use for a specific temperature range.  For example a particular crystal might shift in the positive direction over the life span and therefore require a slightly negative frequency offset at room temperature.

Contact the crystal vendor of choice any time there are special considerations for the end application.  Special considerations include when the parameters of the application the EM3xx is to be used in are extreme, for example, high temperature LED or automobile applications or very long life expectancies such as water and gas metering or solar applications.  In these type of applications, many crystal vendors have additional processes for their crystals to meet the requirements specified, but there are limitations and tradeoffs and generally extra cost.  For this reason it is best to involve a crystal vendor early on in the design cycle.

Finally, the designer must make sure the selected crystal meets the High-Frequency Crystal Oscillator Specification in the EM3xx datasheet, http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x.pdf.  For a list of crystal part numbers known to be a good fit for the EM3xx and are known to be in use in various product applications, refer to the schematic appendix page in one of the EM3xx reference designs on the Silicon Labs web site, for example the EM358x USB Ceramic Balun Reference Design, http://www.silabs.com/Support%20Documents/Software/EM358x_REF_DES_CER_USB_INV-F.zip

For more details about tuning the 24 MHz crystal, refer to following KBA article: http://community.silabs.com/t5/Wireless-Knowledge-Base/EM3xx-24MHz-Crystal-Tuning/ta-p/157154.